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Diffstat (limited to '1964/CH12/EX12.18/ex12_18.sce')
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1 files changed, 9 insertions, 0 deletions
diff --git a/1964/CH12/EX12.18/ex12_18.sce b/1964/CH12/EX12.18/ex12_18.sce new file mode 100755 index 000000000..8390c05ff --- /dev/null +++ b/1964/CH12/EX12.18/ex12_18.sce @@ -0,0 +1,9 @@ +//Chapter-12, Example 12.18, Page 365
+//=============================================================================
+clc
+clear
+//During the positive half of the input signal,the diode conducts and acts like a short circuit.Now,the output voltage,V0=0V.The capacitor is charged to 12V with polarities and it behaves like a battery.
+//during the negative half of the input signal,the diode does not conduct and acts like an open circuit.Hence the output voltage ,V0=-24V.This gives negatively clamped voltage.
+mprintf("V0=0V\n")
+mprintf("output voltage V0=-24V")
+//=================================END OF PROGRAM=======================================================================================================
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