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Diffstat (limited to '1964/CH12/EX12.17')
| -rwxr-xr-x | 1964/CH12/EX12.17/ex12_17.sce | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/1964/CH12/EX12.17/ex12_17.sce b/1964/CH12/EX12.17/ex12_17.sce new file mode 100755 index 000000000..10a87f0ec --- /dev/null +++ b/1964/CH12/EX12.17/ex12_17.sce @@ -0,0 +1,8 @@ +//Chapter-12, Example 12.17, Page 364
+//=============================================================================
+clc
+clear
+//During the negative half of the input signal,the diode conducts,and acts like a short circuit.Now,the output voltage,V0=0V.The capacitor is charged to 10V with polarities and it behaves like a battery.
+//During the positive half of the input signal,the diode does not conduct,and acts like an open circuit.Hence,the output voltage,V0=20V.This gives positively clamped voltage.
+mprintf("V0=10+10=20 V")
+//=================================END OF PROGRAM=======================================================================================================
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