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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /911/CH7/EX7.4.a/ex_7_4_a.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '911/CH7/EX7.4.a/ex_7_4_a.sce')
| -rw-r--r-- | 911/CH7/EX7.4.a/ex_7_4_a.sce | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/911/CH7/EX7.4.a/ex_7_4_a.sce b/911/CH7/EX7.4.a/ex_7_4_a.sce new file mode 100644 index 000000000..5fb691921 --- /dev/null +++ b/911/CH7/EX7.4.a/ex_7_4_a.sce @@ -0,0 +1,6 @@ +//example 7.4(a)//
+clc
+//clears the screen//
+clear
+//clears all variables//
+disp('Since all inputs are in logic 0 state, it implies that all inputs are active. Since D7 has the highest priority and all inputs and outputs are active when LOW, the output bits are A=0, B=0 and C=0')
\ No newline at end of file |