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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /863/CH9/EX9.1 | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '863/CH9/EX9.1')
| -rw-r--r-- | 863/CH9/EX9.1/Ex9_1.sce | 27 | ||||
| -rw-r--r-- | 863/CH9/EX9.1/Ex9_1.txt | 27 | ||||
| -rw-r--r-- | 863/CH9/EX9.1/Result9_1.txt | 10 |
3 files changed, 64 insertions, 0 deletions
diff --git a/863/CH9/EX9.1/Ex9_1.sce b/863/CH9/EX9.1/Ex9_1.sce new file mode 100644 index 000000000..66cdf1406 --- /dev/null +++ b/863/CH9/EX9.1/Ex9_1.sce @@ -0,0 +1,27 @@ +//Caption:Design RC ramp generator
+//Ex9.1
+clc;
+clear;
+close;
+V=5//Output voltage(in volts)
+Vs=15//Supply voltage(in volts)
+R=100//Load resistance(in kilo ohm)
+v=3//Amplitude of triggering pulse(in volts)
+vb=0.5//Bse voltage(in volts)
+p=1//Pulse width(in ms)
+t=0.1//Time interval(in ms)
+vbe=0.7//Base emitter voltage(in volts)
+E=0.2//Initial voltage(in volts)
+e=5//Final voltage(in volts)
+hfe=50
+Il=V/R
+I1=100*Il/1000
+R1=(Vs-V)/(I1*1000)
+C1=p/(R1*log((Vs-E)/(Vs-e)))
+Ic=10*I1
+Ib=Ic/hfe
+Rb=(Vs-vbe)/(Ib*1000)
+Vbb=v-vbe-vb
+I=(Vs+v)/Rb
+C2=I*p/Vbb
+disp(C2,C1,R1,Rb,'Components required to design circuit are resistances Rb,R1(in kilo ohm) and Capacitors C1,C2(in micro farad)=')
\ No newline at end of file diff --git a/863/CH9/EX9.1/Ex9_1.txt b/863/CH9/EX9.1/Ex9_1.txt new file mode 100644 index 000000000..66cdf1406 --- /dev/null +++ b/863/CH9/EX9.1/Ex9_1.txt @@ -0,0 +1,27 @@ +//Caption:Design RC ramp generator
+//Ex9.1
+clc;
+clear;
+close;
+V=5//Output voltage(in volts)
+Vs=15//Supply voltage(in volts)
+R=100//Load resistance(in kilo ohm)
+v=3//Amplitude of triggering pulse(in volts)
+vb=0.5//Bse voltage(in volts)
+p=1//Pulse width(in ms)
+t=0.1//Time interval(in ms)
+vbe=0.7//Base emitter voltage(in volts)
+E=0.2//Initial voltage(in volts)
+e=5//Final voltage(in volts)
+hfe=50
+Il=V/R
+I1=100*Il/1000
+R1=(Vs-V)/(I1*1000)
+C1=p/(R1*log((Vs-E)/(Vs-e)))
+Ic=10*I1
+Ib=Ic/hfe
+Rb=(Vs-vbe)/(Ib*1000)
+Vbb=v-vbe-vb
+I=(Vs+v)/Rb
+C2=I*p/Vbb
+disp(C2,C1,R1,Rb,'Components required to design circuit are resistances Rb,R1(in kilo ohm) and Capacitors C1,C2(in micro farad)=')
\ No newline at end of file diff --git a/863/CH9/EX9.1/Result9_1.txt b/863/CH9/EX9.1/Result9_1.txt new file mode 100644 index 000000000..e235c8e9b --- /dev/null +++ b/863/CH9/EX9.1/Result9_1.txt @@ -0,0 +1,10 @@ +Components required to design circuit are resistances Rb,R1(in kilo ohm) and Capacitors C1,C2(in micro farad)=
+
+ 14.3
+
+ 2.
+
+ 1.2753733
+
+ 0.6993007
+
\ No newline at end of file |