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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /863/CH15/EX15.4/Ex15_4.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '863/CH15/EX15.4/Ex15_4.sce')
| -rw-r--r-- | 863/CH15/EX15.4/Ex15_4.sce | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/863/CH15/EX15.4/Ex15_4.sce b/863/CH15/EX15.4/Ex15_4.sce new file mode 100644 index 000000000..73954288b --- /dev/null +++ b/863/CH15/EX15.4/Ex15_4.sce @@ -0,0 +1,18 @@ +//caption:Calculate the output voltage
+//Ex15.4
+clc;
+clear;
+close;
+Vie=1//Input voltage for resistor Re(in volts)
+Vid=0//Input voltage for resistor Rd(in volts)
+Vic=1//Input voltage for resistor Rc(in volts)
+Vib=1//Input voltag for resistor Rb(in volts)
+Via=0//Input voltage for resistor Ra(in volts)
+R=16//Input Resistor(in kilo ohm)
+re=1//Resistor(in kilo ohm)
+rd=2//Resistor(in kilo ohm)
+rc=4//Resistor(in kilo ohm)
+rb=8//Resistor(in kilo ohm)
+ra=16//Resistor(in kilo ohm)
+Vo=R*((Vie/re)+(Vid/rd)+(Vic/rc)+(Vib/rb)+(Via/ra))
+disp(Vo,'Output voltage(in volts)=')
\ No newline at end of file |