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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /863/CH12/EX12.4/Ex12_4.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '863/CH12/EX12.4/Ex12_4.sce')
| -rw-r--r-- | 863/CH12/EX12.4/Ex12_4.sce | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/863/CH12/EX12.4/Ex12_4.sce b/863/CH12/EX12.4/Ex12_4.sce new file mode 100644 index 000000000..5351ec93b --- /dev/null +++ b/863/CH12/EX12.4/Ex12_4.sce @@ -0,0 +1,20 @@ +//Caption:Design a interface circuit for CMOS
+//Ex12.4
+clc;
+clear;
+close;
+Vdd=15//Drain voltage(in volts)
+Rd=1//Drain resistance(in kilo ohm)
+Vcc=5//Supply voltage(in volts)
+Ih=40//Current(in micro ampere)
+hfe=20
+Vce=0.2//Saturated collector emitter voltage(in volts)
+vih=2//High input voltage(in volts)
+il=1.6//Low input current
+Vbe=0.7//Base emitter voltage(in volts)
+Rc=(Vcc-vih)*1000/(2*Ih)
+Ic=((Vcc-Vce)/Rc)+(2*il)
+Ib=Ic/hfe
+R=(Vdd-Vbe)/Ib
+Rb=R-Rd
+disp(Rc,Rb,'Components required to design circuit are resistors Rb and Rc(in kilo ohm)=')
\ No newline at end of file |