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author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
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committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /863/CH10/EX10.1/Ex10_1.sce | |
parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
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initial commit / add all books
Diffstat (limited to '863/CH10/EX10.1/Ex10_1.sce')
-rw-r--r-- | 863/CH10/EX10.1/Ex10_1.sce | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/863/CH10/EX10.1/Ex10_1.sce b/863/CH10/EX10.1/Ex10_1.sce new file mode 100644 index 000000000..6d2a1dbbc --- /dev/null +++ b/863/CH10/EX10.1/Ex10_1.sce @@ -0,0 +1,13 @@ +//Caption:Determine low and high voltage outputs and resistance for desinging the gate circuit
+//Ex10.1
+clc;
+clear;
+close;
+Vcc=5//Supply voltage(in volts)
+Vf=0.7//Diode forward voltage(in volts)
+I=0.5//Collector current(in mA)
+Vce=0.2//Collector emitter voltage(in volts)
+R=(Vcc-Vf-Vce)/I
+Vl=Vce+Vf
+Vh=Vcc
+disp(R,Vh,Vl,'Low and high voltage outputs(in volts) and Required resistance(in kilo ohm)=')
\ No newline at end of file |