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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /620/CH10/EX10.6/example10_6.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '620/CH10/EX10.6/example10_6.sce')
| -rw-r--r-- | 620/CH10/EX10.6/example10_6.sce | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/620/CH10/EX10.6/example10_6.sce b/620/CH10/EX10.6/example10_6.sce new file mode 100644 index 000000000..066db2309 --- /dev/null +++ b/620/CH10/EX10.6/example10_6.sce @@ -0,0 +1,20 @@ +vb=13.2;
+vg=14.4;
+rb=0.5;
+rg=0.1;
+i=(vg-vb)/(rb+rg);
+vrb=i*rb;
+vth=vb+vrb;
+rth=rb*rg/(rb+rg);
+disp("Part a");
+rl1=1;
+i1=vth/(rth+rl1);
+disp("current (in A) through the load resistor is"); disp(i1);
+disp("Part b");
+rl2=2;
+i2=vth/(rth+rl2);
+disp("current (in A) through the load resistor is"); disp(i2);
+disp("Part c");
+rl3=3;
+i3=vth/(rth+rl3);
+disp("current (in A) through the load resistor is"); disp(i3);
\ No newline at end of file |