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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /3872/CH5/EX5.4 | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '3872/CH5/EX5.4')
| -rw-r--r-- | 3872/CH5/EX5.4/Ex5_4.JPG | bin | 0 -> 19630 bytes | |||
| -rw-r--r-- | 3872/CH5/EX5.4/Ex5_4.sce | 22 |
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diff --git a/3872/CH5/EX5.4/Ex5_4.JPG b/3872/CH5/EX5.4/Ex5_4.JPG Binary files differnew file mode 100644 index 000000000..bed5bdabc --- /dev/null +++ b/3872/CH5/EX5.4/Ex5_4.JPG diff --git a/3872/CH5/EX5.4/Ex5_4.sce b/3872/CH5/EX5.4/Ex5_4.sce new file mode 100644 index 000000000..56fa8cbe0 --- /dev/null +++ b/3872/CH5/EX5.4/Ex5_4.sce @@ -0,0 +1,22 @@ +// Book - Power System: Analysis & Design 5th Edition
+// Authors - J. Duncan Glover, Mulukutla S. Sharma, Thomas J. Overbye
+// Chapter - 5 : Example 5.4
+// Scilab Version 6.0.0 : OS - Windows
+
+clc;
+clear;
+
+L = 300; // Line length in km
+SI = 266.1; // Surge impedance in Ohm
+lambda = 5000; // Wavelength in km
+Vs = 765; // Sending end voltage in kV
+Vr = Vs; // Receiving end voltage in kV
+
+SIL = (Vs)^2/SI; // Surge impedance load in MW
+Vspu = (765/765); // Sending end voltage in per unit
+Vrpu = (765/765); // Receiving end voltage in per unit
+Pmax = Vspu*Vrpu*SIL/sin(2*%pi*L/lambda); // The theoretical steady state stability limit of a lossless line in MW
+SSL = 2.72*SIL; // Theoretically steady state stability limit in MW; taken from Figure 5.12
+
+printf('\nThe steady state stability limit of a lossless line is (Pmax) = %0.0f MW', Pmax);
+printf('\n\n Theoretically steady state stability limit is (SSL) = %0.0f MW', SSL);
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