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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /3866/CH8/EX8.1 | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '3866/CH8/EX8.1')
| -rw-r--r-- | 3866/CH8/EX8.1/Ex8_1.sce | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/3866/CH8/EX8.1/Ex8_1.sce b/3866/CH8/EX8.1/Ex8_1.sce new file mode 100644 index 000000000..cd969657f --- /dev/null +++ b/3866/CH8/EX8.1/Ex8_1.sce @@ -0,0 +1,15 @@ +clc; clear; close;
+
+norm_ot=1;
+LEnand3=5/3;
+B_effort=16;
+LEnand2=4/3;
+mprintf(' Normalised output=%f\n',norm_ot);
+Ic=norm_ot/4;
+mprintf(' Inverter input capacitance=%f\n',Ic);
+In3=LEnand3*Ic/4;
+mprintf(' Input capacitance of NAND3 gate=%f\n',In3);
+Ic1=In3*B_effort/4;
+mprintf(' 2nd inverter input capacitance=%f\n',Ic1);
+In2=LEnand2*Ic1/4;
+mprintf(' Input capacitance of NAND2 gate=%f\n',In2);
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