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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /3760/CH1/EX1.71 | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '3760/CH1/EX1.71')
| -rw-r--r-- | 3760/CH1/EX1.71/Ex1_71.sce | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/3760/CH1/EX1.71/Ex1_71.sce b/3760/CH1/EX1.71/Ex1_71.sce new file mode 100644 index 000000000..08e1ab5fc --- /dev/null +++ b/3760/CH1/EX1.71/Ex1_71.sce @@ -0,0 +1,26 @@ +clc;
+P=20; // Rated KVA of transformer
+E1=250; // rated primary voltage
+E2=125; // rated secondary voltage
+r1=0.15; // resistance of primary side
+x1=0.25; // leakage reactance of primary side
+r2=0.03; // resistance of secondary side
+x2=0.04; // leakage reactance of secondary side
+// given E1=V1(primary terminal voltage)
+k=E2/E1; // turns ratio
+ip=(P*1000)/E1; // full load primary current
+// voltage regulation=0, because E1=V1 therefore
+pf=-atand(r1,x1); // phase angle between E1 and ip
+// negative sign indicates that current leads voltage
+re2=r2/k^2; // secondary resistance referred to primary
+xe2=x2/k^2; // secondary leakage reactance referred to primary
+ip=ip*(cos(pf*(%pi/180))-%i*sin(pf*(%pi/180))); // complex form of primary current
+V2=E1-ip*(re2+xe2*%i);
+pfl=-atand(imag(V2),real(V2))-pf; // phase angle by which primary current leads secondary terminal voltage referred to primary
+PF=cos(pfl*(%pi/180));
+vl=abs(V2)/2;
+isl=(P*1000)/E2;
+pl=vl*isl*PF;
+printf('Load voltage is %f v\n',vl);
+printf('Load power factor is %f leading\n',PF);
+printf('Load power is %f W',pl);
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