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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /3630/CH4/EX4.1/Ex4_1.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '3630/CH4/EX4.1/Ex4_1.sce')
| -rw-r--r-- | 3630/CH4/EX4.1/Ex4_1.sce | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/3630/CH4/EX4.1/Ex4_1.sce b/3630/CH4/EX4.1/Ex4_1.sce new file mode 100644 index 000000000..54cab93a7 --- /dev/null +++ b/3630/CH4/EX4.1/Ex4_1.sce @@ -0,0 +1,7 @@ +clc;
+Vin=12; //volt
+RL=5100; //ohm
+Rs=1000; //ohm
+VL=(RL/(RL+Rs))*Vin ; //volt //voltage divide rule
+disp('Vpk',VL,"VL=");//The answers vary due to round off error
+
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