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| author | priyanka | 2015-06-24 15:03:17 +0530 |
|---|---|---|
| committer | priyanka | 2015-06-24 15:03:17 +0530 |
| commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
| tree | ab291cffc65280e58ac82470ba63fbcca7805165 /3517/CH13 | |
| download | Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.gz Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.bz2 Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.zip | |
initial commit / add all books
Diffstat (limited to '3517/CH13')
| -rw-r--r-- | 3517/CH13/EX13.1/Ex13_1.sce | 20 | ||||
| -rw-r--r-- | 3517/CH13/EX13.4/Ex13_4.sce | 12 |
2 files changed, 32 insertions, 0 deletions
diff --git a/3517/CH13/EX13.1/Ex13_1.sce b/3517/CH13/EX13.1/Ex13_1.sce new file mode 100644 index 000000000..ef010ef46 --- /dev/null +++ b/3517/CH13/EX13.1/Ex13_1.sce @@ -0,0 +1,20 @@ +//Caption:Design a collector coupled bistable multivibrator
+//Ex13.1
+clc;
+clear;
+close;
+V=5//Supply voltage(in volts)
+Ic=2//Saturated collector current(in mA)
+Vce=0.2//Collector emitter voltage(in volts)
+hfe=70
+Vbe=0.7//Base emitter voltage(in volts)
+Vbb=-5//Base voltage(in volts)
+Rc=(V-Vce)/Ic
+Ib=Ic/hfe
+Vb1=Vbe-Vbb
+I2=Ic/10
+R2=Vb1/I2
+I2=Vb1/R2
+R=(V-Vbe)/(I2+Ib)
+R1=R-Rc
+disp(Rc,R1,R2,'Components required to design the circuit are resistors(in kilo ohm)=')
\ No newline at end of file diff --git a/3517/CH13/EX13.4/Ex13_4.sce b/3517/CH13/EX13.4/Ex13_4.sce new file mode 100644 index 000000000..18d5deb00 --- /dev/null +++ b/3517/CH13/EX13.4/Ex13_4.sce @@ -0,0 +1,12 @@ +//Caption:Determine the capacitance for flip flop design and triggering frequency
+//Ex13.4
+clc;
+clear;
+close;
+R1=15//Resistor(in kilo ohm)
+R2=27//Resistor(in kilo ohm)
+t=250//time(in ns)
+R=R1*R2/(R1+R2)
+C=t/(0.1*R)
+f=10^6/(2.3*C*R)
+disp(f,C,'Capacitance(in pF) and Frequency(in Khz)=')
\ No newline at end of file |