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| author | priyanka | 2015-06-24 15:03:17 +0530 |
|---|---|---|
| committer | priyanka | 2015-06-24 15:03:17 +0530 |
| commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
| tree | ab291cffc65280e58ac82470ba63fbcca7805165 /3507/CH13/EX1.2 | |
| download | Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.gz Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.bz2 Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.zip | |
initial commit / add all books
Diffstat (limited to '3507/CH13/EX1.2')
| -rw-r--r-- | 3507/CH13/EX1.2/Ex13_2.sce | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/3507/CH13/EX1.2/Ex13_2.sce b/3507/CH13/EX1.2/Ex13_2.sce new file mode 100644 index 000000000..f9ba15390 --- /dev/null +++ b/3507/CH13/EX1.2/Ex13_2.sce @@ -0,0 +1,8 @@ +// chapter 13
+// example 13.2
+// page 274
+
+printf("i)Refering to the Thevenin circuit, we see that voltage source \nis short and resistances except Rc and Re are bypassed.\nThus dc load = Rc + Re \n\n")
+printf(" Refering to ac equivalent circuit, Rc is parallel with Rl.\nThus ac load = Rc*Rl/(Rc+Rl) \n \n \n")
+printf("ii)Since Vcc=Vce+Ic*(Rc+Re) we get \n max Vce = Vcc and max Ic = Vcc/(Rc+Re) \n \n \n")
+printf("iii)On applying ac signal, collector current and collector emitter \nvoltage change about Q point.\nMaximum collector current = Ic.\nMaximum positive swing of ac collector emitter voltage = Ic*R_AC \n So total maximum collector emitter voltage = Vce+Ic*R_AC \n\nMaximum positive swing of ac collector current = Vce/R_AC so \nTotal maximum collector current = Ic+Vce/R_AC \n")
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