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| author | priyanka | 2015-06-24 15:03:17 +0530 |
|---|---|---|
| committer | priyanka | 2015-06-24 15:03:17 +0530 |
| commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
| tree | ab291cffc65280e58ac82470ba63fbcca7805165 /2498/CH2/EX2.30 | |
| download | Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.gz Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.bz2 Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.zip | |
initial commit / add all books
Diffstat (limited to '2498/CH2/EX2.30')
| -rwxr-xr-x | 2498/CH2/EX2.30/ex2_30.sce | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/2498/CH2/EX2.30/ex2_30.sce b/2498/CH2/EX2.30/ex2_30.sce new file mode 100755 index 000000000..425f09fc9 --- /dev/null +++ b/2498/CH2/EX2.30/ex2_30.sce @@ -0,0 +1,20 @@ +// Exa 2.30
+clc;
+clear;
+close;
+format('v',6)
+// Given data
+Vin = 10;// in V
+V1 = 2;// in V
+// Vin-V_C+V1 = 0;
+V_C = Vin+V1;// in V
+//During positive half cycle the output voltage
+Vout = Vin-V_C;// in V
+disp(Vout,"During positive half cycle the output voltage in V is");
+Vin = -10;// iin V
+V1 = 12;// in V
+// Vin-V1-Vout = 0;
+//During negative half cycle the output voltage
+Vout = Vin-V1;// in V
+disp(Vout,"During negative half cycle the output voltage in V is");
+
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