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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /2459/CH12/EX12.20/Ex12_20.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
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initial commit / add all books
Diffstat (limited to '2459/CH12/EX12.20/Ex12_20.sce')
| -rw-r--r-- | 2459/CH12/EX12.20/Ex12_20.sce | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/2459/CH12/EX12.20/Ex12_20.sce b/2459/CH12/EX12.20/Ex12_20.sce new file mode 100644 index 000000000..400a639a1 --- /dev/null +++ b/2459/CH12/EX12.20/Ex12_20.sce @@ -0,0 +1,30 @@ +//chapter12
+//example12.20
+//page256
+
+Vcc=8 // V
+Rb=360 // kilo ohm
+Rc=2 // kilo ohm
+gain_beta=100
+Vbe=0.7 // V
+
+// when Ic=0, Vce=Vcc i.e. Vce=8 and when Vce=0, Ic=Vcc/Rc i.e. Ic=8/2
+// so equation of load line becomes Ic=-0.5*Vce+4
+
+clf()
+x=linspace(0,8,5)
+y=-0.5*x+4
+plot2d(x,y,style=3,rect=[0,0,9,5])
+xtitle("dc load line","Vce(volts)","Ic(mA)")
+
+// since Vcc=Ib*Rb+Vbe we get
+Ib=(Vcc-Vbe)/Rb
+Ic=Ib*gain_beta
+Vce=Vcc-Ic*Rc
+
+printf("the operating point is %.3f V and %.3f mA \n",Vce,Ic)
+if Vce<Vcc/2+0.1 | Vce>Vcc/2-0.1 // check if V_CE is nearly half of V_CC
+ printf("circuit is mid-point biased \n")
+else
+ printf("circuit is not mid-point biased. \n")
+end
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