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author | priyanka | 2015-06-24 15:03:17 +0530 |
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committer | priyanka | 2015-06-24 15:03:17 +0530 |
commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
tree | ab291cffc65280e58ac82470ba63fbcca7805165 /226/CH12/EX12.23 | |
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initial commit / add all books
Diffstat (limited to '226/CH12/EX12.23')
-rwxr-xr-x | 226/CH12/EX12.23/example23_sce.sce | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/226/CH12/EX12.23/example23_sce.sce b/226/CH12/EX12.23/example23_sce.sce new file mode 100755 index 000000000..d673d3aef --- /dev/null +++ b/226/CH12/EX12.23/example23_sce.sce @@ -0,0 +1,17 @@ +//chapter 12
+//example 12.23
+//page 528
+printf("\n")
+printf("given")
+hie=1*10^3;hfe=50;hoe=10*10^-6;Cc=5*10^-12;Cp=330*10^-12;Lp=75*10^-6;Rw=1;Rl=5*10^3;fo=1*10^6;zP=224*10^3;rC=100*10^3;K=.015;Ls=50*10^-6;
+RL=(Zp*Rc)/(Rc+Zp)
+disp("voltage gain from the input to the primary memory winding")
+Avp=(hfe*RL)/hie
+Vsp=K*sqrt(Ls/Lp)
+disp("overall voltage gain from the input to teh secondary winding")
+Av=Avp*Vsp
+Qp=Rc/(2*3.14*fo*Lp)
+Ql=471;
+Q=(Ql*Qp)/(Ql+Qp)
+B=fo/Q;
+printf("bandwidth is %dHz\n",B)
\ No newline at end of file |