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| author | priyanka | 2015-06-24 15:03:17 +0530 |
|---|---|---|
| committer | priyanka | 2015-06-24 15:03:17 +0530 |
| commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
| tree | ab291cffc65280e58ac82470ba63fbcca7805165 /226/CH10/EX10.13 | |
| download | Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.gz Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.tar.bz2 Scilab-TBC-Uploads-b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b.zip | |
initial commit / add all books
Diffstat (limited to '226/CH10/EX10.13')
| -rwxr-xr-x | 226/CH10/EX10.13/example13_sce.sce | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/226/CH10/EX10.13/example13_sce.sce b/226/CH10/EX10.13/example13_sce.sce new file mode 100755 index 000000000..3549cb20f --- /dev/null +++ b/226/CH10/EX10.13/example13_sce.sce @@ -0,0 +1,17 @@ +//chapter 10
+//example 10.13
+//page 416
+printf("\n")
+printf("given")
+Idss=9*10^-3;Vgsoff=7;Vdd=22;R1=4.7*10^6;R2=1*10^6;Rs=2.7*10^3;Rd=Rs;
+Vg=(Vdd*R2)/(R1+R2)
+disp("when Vgs=0, Vgs/Vgsoff=0")
+Id=Vg/Rs
+disp("when Vgs/Vgsoff=.5")
+Vgs=.5*(-Vgsoff)
+Id=(Vg-Vgs)/Rs
+x=Id/Idss
+disp(" point Y on universal characteristic x=.3 and Vgs/Vgsoff=.5")
+disp("draw voltage divider bias line through X nad Y where bisa line intersect transfer curve")
+Id=.29*Idss
+Vds=Vdd-Id*(Rd+Rs)
\ No newline at end of file |