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author | priyanka | 2015-06-24 15:03:17 +0530 |
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committer | priyanka | 2015-06-24 15:03:17 +0530 |
commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
tree | ab291cffc65280e58ac82470ba63fbcca7805165 /1529/CH18/EX18.1/18_01.sce | |
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Diffstat (limited to '1529/CH18/EX18.1/18_01.sce')
-rwxr-xr-x | 1529/CH18/EX18.1/18_01.sce | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/1529/CH18/EX18.1/18_01.sce b/1529/CH18/EX18.1/18_01.sce new file mode 100755 index 000000000..9459885f4 --- /dev/null +++ b/1529/CH18/EX18.1/18_01.sce @@ -0,0 +1,17 @@ +//Chapter 18, Problem 1
+clc;
+v=120; //dc supply
+c=15e-6; //capacitance in farad
+r=47e3; //resistance in ohms
+taw=r*c; //time constant
+t1=taw;
+vcta= v*(1-%e^(-1*t1/taw));
+vct = v/2;
+t = 0:0.1:10
+vc = v*(1-%e^(-1*t/taw));
+plot(t,vc)
+xtitle("capacitor voltage/time characteristic", "t", "Vc")
+t = -1*taw*log(1 - vct/v);
+
+printf("\n (a)The capacitor voltage at a time equal to one time constant = %.2f V",vcta)
+printf("\n (b)The time for the capacitor voltage to reach one half of its steady state value = %.1f sec",t)
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