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author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
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committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /147/CH13/EX13.16/Example13_16.sce | |
parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
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Diffstat (limited to '147/CH13/EX13.16/Example13_16.sce')
-rw-r--r-- | 147/CH13/EX13.16/Example13_16.sce | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/147/CH13/EX13.16/Example13_16.sce b/147/CH13/EX13.16/Example13_16.sce new file mode 100644 index 000000000..957097c38 --- /dev/null +++ b/147/CH13/EX13.16/Example13_16.sce @@ -0,0 +1,14 @@ +//Transformer frequency fr, Source frequency fs
+close();
+clear;
+clc;
+Pr = 500;//VA
+ft = 25;//Hz
+fs = 60;
+V1 = 120;
+V2 = 30;
+//Maximum permissible primary voltage 'V1max'
+V1max = fs/ft*V1;
+V2r = fs/ft*V2;
+I2r = Pr/V2;
+mprintf('Maximum primary voltage = %0.0f V\nrated V2 = %0.0f V\nrated I2 = %0.2f A',V1max,V2r,I2r);
\ No newline at end of file |