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| author | prashantsinalkar | 2017-10-10 12:38:01 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:38:01 +0530 |
| commit | f35ea80659b6a49d1bb2ce1d7d002583f3f40947 (patch) | |
| tree | eb72842d800ac1233e9d890e020eac5fd41b0b1b /1445/CH1/EX1.18/Ex1_18.sce | |
| parent | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (diff) | |
| download | Scilab-TBC-Uploads-f35ea80659b6a49d1bb2ce1d7d002583f3f40947.tar.gz Scilab-TBC-Uploads-f35ea80659b6a49d1bb2ce1d7d002583f3f40947.tar.bz2 Scilab-TBC-Uploads-f35ea80659b6a49d1bb2ce1d7d002583f3f40947.zip | |
updated the code
Diffstat (limited to '1445/CH1/EX1.18/Ex1_18.sce')
| -rw-r--r-- | 1445/CH1/EX1.18/Ex1_18.sce | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/1445/CH1/EX1.18/Ex1_18.sce b/1445/CH1/EX1.18/Ex1_18.sce index 3dec1c69c..4c51456e7 100644 --- a/1445/CH1/EX1.18/Ex1_18.sce +++ b/1445/CH1/EX1.18/Ex1_18.sce @@ -1,6 +1,7 @@ //CHAPTER 1- D.C. CIRCUIT ANALYSIS AND NETWORK THEOREMS //Example 18 +clc; disp("CHAPTER 1"); disp("EXAMPLE 18"); |