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author | priyanka | 2015-06-24 15:03:17 +0530 |
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committer | priyanka | 2015-06-24 15:03:17 +0530 |
commit | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (patch) | |
tree | ab291cffc65280e58ac82470ba63fbcca7805165 /1445/CH1/EX1.12 | |
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-rw-r--r-- | 1445/CH1/EX1.12/Ex1_12.sce | 27 |
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diff --git a/1445/CH1/EX1.12/Ex1_12.sce b/1445/CH1/EX1.12/Ex1_12.sce new file mode 100644 index 000000000..6ca51aa27 --- /dev/null +++ b/1445/CH1/EX1.12/Ex1_12.sce @@ -0,0 +1,27 @@ +//CHAPTER 1- D.C. CIRCUIT ANALYSIS AND NETWORK THEOREMS +//Example 12 + +disp("CHAPTER 1"); +disp("EXAMPLE 12"); + +//VARIABLE INITIALIZATION +v=10; //voltage source in Volts +I=5; //current source in Amperes +r1=2; //in Ohms +r2=2; //in Ohms +r3=4; //in Ohms + +//SOLUTION + +//deactivating current source +v1=(v/r1)/((1/r1)+(1/r2)+(1/r3)); //using nodal analysis +I1=v1/r3; + +//deactivating voltage source +v2=I/((1/r1)+(1/r2)+(1/r3)); //using nodal analysis +I2=v2/r3; +I_tot=I1+I2; //applying Superposition Theorem (I1 and I2 are in same direction) + +disp(sprintf("By Superposition Theorem, the current through resistor R3 is %d A",I_tot)); + +//END |