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| author | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
|---|---|---|
| committer | prashantsinalkar | 2017-10-10 12:27:19 +0530 |
| commit | 7f60ea012dd2524dae921a2a35adbf7ef21f2bb6 (patch) | |
| tree | dbb9e3ddb5fc829e7c5c7e6be99b2c4ba356132c /1445/CH1/EX1.10/ch1_ex_10.sce | |
| parent | b1f5c3f8d6671b4331cef1dcebdf63b7a43a3a2b (diff) | |
| download | Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.gz Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.tar.bz2 Scilab-TBC-Uploads-7f60ea012dd2524dae921a2a35adbf7ef21f2bb6.zip | |
initial commit / add all books
Diffstat (limited to '1445/CH1/EX1.10/ch1_ex_10.sce')
| -rw-r--r-- | 1445/CH1/EX1.10/ch1_ex_10.sce | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/1445/CH1/EX1.10/ch1_ex_10.sce b/1445/CH1/EX1.10/ch1_ex_10.sce new file mode 100644 index 000000000..4bd8f0826 --- /dev/null +++ b/1445/CH1/EX1.10/ch1_ex_10.sce @@ -0,0 +1,21 @@ +//CHAPTER 1- D.C. CIRCUIT ANALYSIS AND NETWORK THEOREMS +//Example 10 + +disp("CHAPTER 1"); +disp("EXAMPLE 10"); + +//VARIABLE INITIALIZATION +v=10; //voltage source in Volts +I=5; //current source in Amperes +r1=2; //in Ohms +r2=2; //in Ohms +r3=4; //in Ohms + +//SOLUTION +res=I+(v/r1); +v1=res/((1/r1)+(1/r2)+(1/r3)); +I1=v1/r3; +disp(sprintf("By Nodal analysis, the current through resistor R3 is %d A",I1)); + +//END + |