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| author | hardythe1 | 2015-05-05 14:21:39 +0530 |
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| committer | hardythe1 | 2015-05-05 14:21:39 +0530 |
| commit | 435840cef00c596d9e608f9eb2d96f522ea8505a (patch) | |
| tree | 4c783890c984c67022977ca98432e5e4bab30678 /sample_notebooks/sriragap/CHAPTER_2_1.ipynb | |
| parent | aa1863f344766ca7f7c20a395e58d0fb23c52130 (diff) | |
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diff --git a/sample_notebooks/sriragap/CHAPTER_2_1.ipynb b/sample_notebooks/sriragap/CHAPTER_2_1.ipynb new file mode 100755 index 00000000..426e33a5 --- /dev/null +++ b/sample_notebooks/sriragap/CHAPTER_2_1.ipynb @@ -0,0 +1,294 @@ +{
+ "metadata": {
+ "name": "",
+ "signature": "sha256:5bde2d708f0f6314a9ce2bbaebd8be7d8b932147d24c3a735ae61026c957a8a8"
+ },
+ "nbformat": 3,
+ "nbformat_minor": 0,
+ "worksheets": [
+ {
+ "cells": [
+ {
+ "cell_type": "heading",
+ "level": 1,
+ "metadata": {},
+ "source": [
+ "Chapter 2-MICROPROCESSOR ARCHITECHTURE AND MICROCOMPUTER SYSTEMS"
+ ]
+ },
+ {
+ "cell_type": "heading",
+ "level": 2,
+ "metadata": {},
+ "source": [
+ "Example E1-Pg 39"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "collapsed": false,
+ "input": [
+ "#page no 39\n",
+ "#example no 2.1\n",
+ "#MEMORY ADDRESS RANGE.\n",
+ "print ('A7-A0 are address lines for register select. \\n');\n",
+ "print ('A15-A8 are address lines for chip select. \\n \\n');\n",
+ "print ('A15 A14 A13 A12 A11 A10 A9 A8 \\n');\n",
+ "print (' 0 0 0 0 0 0 0 0 =00H \\n \\n'); #chip select bits have to be active low always to select that chip.\n",
+ "print ('A7 A6 A5 A4 A3 A2 A1 A0 \\n');\n",
+ "print (' 0 0 0 0 0 0 0 0 =00H \\n'); #this selects the register 00.\n",
+ "print ('The above combination selects the memory address 0000H. \\n \\n');\n",
+ "print ('A15 A14 A13 A12 A11 A10 A9 A8 \\n');\n",
+ "print (' 0 0 0 0 0 0 0 0 =00H \\n \\n'); #chip select bits have to be active low always to select that chip.\n",
+ "print ('A7 A6 A5 A4 A3 A2 A1 A0 \\n');\n",
+ "print (' 1 1 1 1 1 1 1 1 =FFH \\n'); #this selects the register FF.\n",
+ "print ('The above combination selects the memory address 00FFH. \\n \\n');\n",
+ "#thus this chip can select any memory location from 0000H to 00FFH.\n",
+ "#the memory addressed of the chip can be changed by modifying the hardware.For example if we remove the inverter on line A15.\n",
+ "print ('A15 A14 A13 A12 A11 A10 A9 A8 \\n');\n",
+ "print (' 1 0 0 0 0 0 0 0 =80H \\n \\n'); #chip select bits have to be active low always to select that chip.\n",
+ "print ('A7 A6 A5 A4 A3 A2 A1 A0 \\n');\n",
+ "print (' 0 0 0 0 0 0 0 0 =00H \\n'); #this selects the register 00.\n",
+ "print ('The above combination selects the memory address 8000H. \\n \\n');\n",
+ "#The memory address range from above change will be 8000H to 80FFH.\n",
+ "#Thus a memory can be assigned address in various locations over the entire map of 0000H to FFFFH.\n"
+ ],
+ "language": "python",
+ "metadata": {},
+ "outputs": [
+ {
+ "output_type": "stream",
+ "stream": "stdout",
+ "text": [
+ "A7-A0 are address lines for register select. \n",
+ "\n",
+ "A15-A8 are address lines for chip select. \n",
+ " \n",
+ "\n",
+ "A15 A14 A13 A12 A11 A10 A9 A8 \n",
+ "\n",
+ " 0 0 0 0 0 0 0 0 =00H \n",
+ " \n",
+ "\n",
+ "A7 A6 A5 A4 A3 A2 A1 A0 \n",
+ "\n",
+ " 0 0 0 0 0 0 0 0 =00H \n",
+ "\n",
+ "The above combination selects the memory address 0000H. \n",
+ " \n",
+ "\n",
+ "A15 A14 A13 A12 A11 A10 A9 A8 \n",
+ "\n",
+ " 0 0 0 0 0 0 0 0 =00H \n",
+ " \n",
+ "\n",
+ "A7 A6 A5 A4 A3 A2 A1 A0 \n",
+ "\n",
+ " 1 1 1 1 1 1 1 1 =FFH \n",
+ "\n",
+ "The above combination selects the memory address 00FFH. \n",
+ " \n",
+ "\n",
+ "A15 A14 A13 A12 A11 A10 A9 A8 \n",
+ "\n",
+ " 1 0 0 0 0 0 0 0 =80H \n",
+ " \n",
+ "\n",
+ "A7 A6 A5 A4 A3 A2 A1 A0 \n",
+ "\n",
+ " 0 0 0 0 0 0 0 0 =00H \n",
+ "\n",
+ "The above combination selects the memory address 8000H. \n",
+ " \n",
+ "\n"
+ ]
+ }
+ ],
+ "prompt_number": 1
+ },
+ {
+ "cell_type": "heading",
+ "level": 2,
+ "metadata": {},
+ "source": [
+ "Example E2-Pg 41"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "collapsed": false,
+ "input": [
+ "##page no 41\n",
+ "##example no 2.2\n",
+ "##MEMORY ADDRESS RANGE.\n",
+ "print ('A9-A0 are address lines for register select. \\n');\n",
+ "print ('A15-A10 are address lines for chip select. \\n \\n');\n",
+ "print ('A15 A14 A13 A12 A11 A10 \\n');\n",
+ "print (' 0 0 0 0 0 0 \\n \\n'); ##chip select bits have to be active low always to select that chip.\n",
+ "print ('A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \\n');\n",
+ "print (' 0 0 0 0 0 0 0 0 0 0 \\n'); ##this selects the register \n",
+ "print ('The above combination selects the memory address 0000H. \\n \\n');\n",
+ "print ('A15 A14 A13 A12 A11 A10 \\n');\n",
+ "print (' 0 0 0 0 0 0 \\n \\n'); ##chip select bits have to be active low always to select that chip.\n",
+ "print ('A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \\n');\n",
+ "print (' 1 1 1 1 1 1 1 1 1 1 \\n'); ##this selects the register \n",
+ "print ('The above combination selects the memory address 03FFH. \\n \\n');\n",
+ "##thus this chip can select any memory location from 0000H to 03FFH.\n",
+ "##the memory addressed of the chip can be changed by modifying the hardware.Like we did in the previous example.\n"
+ ],
+ "language": "python",
+ "metadata": {},
+ "outputs": [
+ {
+ "output_type": "stream",
+ "stream": "stdout",
+ "text": [
+ "A9-A0 are address lines for register select. \n",
+ "\n",
+ "A15-A10 are address lines for chip select. \n",
+ " \n",
+ "\n",
+ "A15 A14 A13 A12 A11 A10 \n",
+ "\n",
+ " 0 0 0 0 0 0 \n",
+ " \n",
+ "\n",
+ "A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n",
+ "\n",
+ " 0 0 0 0 0 0 0 0 0 0 \n",
+ "\n",
+ "The above combination selects the memory address 0000H. \n",
+ " \n",
+ "\n",
+ "A15 A14 A13 A12 A11 A10 \n",
+ "\n",
+ " 0 0 0 0 0 0 \n",
+ " \n",
+ "\n",
+ "A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 \n",
+ "\n",
+ " 1 1 1 1 1 1 1 1 1 1 \n",
+ "\n",
+ "The above combination selects the memory address 03FFH. \n",
+ " \n",
+ "\n"
+ ]
+ }
+ ],
+ "prompt_number": 2
+ },
+ {
+ "cell_type": "heading",
+ "level": 2,
+ "metadata": {},
+ "source": [
+ "Example E3-Pg 43"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "collapsed": false,
+ "input": [
+ "##page no 43\n",
+ "##example no 2.3\n",
+ "##CALCULATING ADDRESS LINES\n",
+ "##number of address lines are given by x\n",
+ "import math\n",
+ "x=(math.log(8192))/(math.log(2));\n",
+ "print ('Number of address lines= ')\n",
+ "print (x);\n"
+ ],
+ "language": "python",
+ "metadata": {},
+ "outputs": [
+ {
+ "output_type": "stream",
+ "stream": "stdout",
+ "text": [
+ "Number of address lines= \n",
+ "13.0\n"
+ ]
+ }
+ ],
+ "prompt_number": 3
+ },
+ {
+ "cell_type": "heading",
+ "level": 2,
+ "metadata": {},
+ "source": [
+ "Example E4-Pg 43"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "collapsed": false,
+ "input": [
+ "##page no 43\n",
+ "##example no 2.4\n",
+ "##CALCULATING NO OF CHIPS.\n",
+ "##chip 1024*1 has 1024(1k) registers & each register can store one bit with one data line. We need 8 data lines for byte size memory. Therefore 8 chips are necessary for 1k byte memory.For 1k byte memory we will need 64 chips. We can arrive at the same ans by dividing 8k byte by 1k*1 as follows:\n",
+ "import math\n",
+ "no=(8192*8)/(1024*1);\n",
+ "print ('No of chips= ');\n",
+ "print (no);\n"
+ ],
+ "language": "python",
+ "metadata": {},
+ "outputs": [
+ {
+ "output_type": "stream",
+ "stream": "stdout",
+ "text": [
+ "No of chips= \n",
+ "64\n"
+ ]
+ }
+ ],
+ "prompt_number": 4
+ },
+ {
+ "cell_type": "heading",
+ "level": 2,
+ "metadata": {},
+ "source": [
+ "Example E5-Pg 44"
+ ]
+ },
+ {
+ "cell_type": "code",
+ "collapsed": false,
+ "input": [
+ "##page no 44\n",
+ "##example no 2.5\n",
+ "##FETCHING AN INSTRUCTION.\n",
+ "print ('Memory Location 2005H= 4FH \\n');\n",
+ "print ('Address bus= 2005H \\n') ##program counter places the 16-bit address on the address bus.\n",
+ "print ('Control bus--> (MEMR) \\n'); ##control bus sends memory read control signal.\n",
+ "print ('Data bus= 4FH \\n'); ##instruction 4FH is fetched and transferred to instruction decoder.\n"
+ ],
+ "language": "python",
+ "metadata": {},
+ "outputs": [
+ {
+ "output_type": "stream",
+ "stream": "stdout",
+ "text": [
+ "Memory Location 2005H= 4FH \n",
+ "\n",
+ "Address bus= 2005H \n",
+ "\n",
+ "Control bus--> (MEMR) \n",
+ "\n",
+ "Data bus= 4FH \n",
+ "\n"
+ ]
+ }
+ ],
+ "prompt_number": 5
+ }
+ ],
+ "metadata": {}
+ }
+ ]
+}
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