| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | analysis | 26 | logplain |
| -rw-r--r-- | example_5.2-cache.lib | 1895 | logplain |
| -rw-r--r-- | example_5.2.bak | 3021 | logplain |
| -rw-r--r-- | example_5.2.cir | 510 | logplain |
| -rw-r--r-- | example_5.2.cir.ckt | 391 | logplain |
| -rw-r--r-- | example_5.2.cir.out | 428 | logplain |
| -rw-r--r-- | example_5.2.pro | 1410 | logplain |
| -rw-r--r-- | example_5.2.proj | 30 | logplain |
| -rw-r--r-- | example_5.2.sch | 4004 | logplain |
| -rw-r--r-- | ua741.bak | 3660 | logplain |
| -rw-r--r-- | ua741.cir | 460 | logplain |
| -rw-r--r-- | ua741.cir.ckt | 217 | logplain |
| -rw-r--r-- | ua741.cir.out | 217 | logplain |
| -rw-r--r-- | ua741.pro | 1621 | logplain |
| -rw-r--r-- | ua741.sch | 3876 | logplain |
| -rw-r--r-- | ua741.sub | 253 | logplain |
 |
index : FreeEDA/.git | |
| Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
| summaryrefslogtreecommitdiff |