| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | analysis | 26 | logplain |
| -rw-r--r-- | diode.lib | 185 | logplain |
| -rw-r--r-- | example_2.4-cache.bak | 1872 | logplain |
| -rw-r--r-- | example_2.4-cache.lib | 1861 | logplain |
| -rw-r--r-- | example_2.4.bak | 2283 | logplain |
| -rw-r--r-- | example_2.4.cir | 403 | logplain |
| -rw-r--r-- | example_2.4.cir.ckt | 250 | logplain |
| -rw-r--r-- | example_2.4.cir.out | 290 | logplain |
| -rw-r--r-- | example_2.4.pro | 1966 | logplain |
| -rw-r--r-- | example_2.4.proj | 30 | logplain |
| -rw-r--r-- | example_2.4.sch | 2405 | logplain |
 |
index : FreeEDA/.git | |
| Tool for circuit design, simulation, analysis and PCB design (previously known as Oscad) |
| summaryrefslogtreecommitdiff |