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-rw-r--r--OSCAD/subcktLibrary/lm555n.bak435
-rw-r--r--OSCAD/subcktLibrary/lm555n.cir25
-rw-r--r--OSCAD/subcktLibrary/lm555n.cir.ckt35
-rw-r--r--OSCAD/subcktLibrary/lm555n.cir.out35
-rw-r--r--OSCAD/subcktLibrary/lm555n.pro73
-rw-r--r--OSCAD/subcktLibrary/lm555n.sch435
-rw-r--r--OSCAD/subcktLibrary/lm555n.sub37
-rw-r--r--OSCAD/subcktLibrary/lm741.sub14
-rw-r--r--OSCAD/subcktLibrary/ua741-cache.bak100
-rw-r--r--OSCAD/subcktLibrary/ua741-cache.lib100
-rw-r--r--OSCAD/subcktLibrary/ua741.bak208
-rw-r--r--OSCAD/subcktLibrary/ua741.cir15
-rw-r--r--OSCAD/subcktLibrary/ua741.cir.ckt9
-rw-r--r--OSCAD/subcktLibrary/ua741.cir.out9
-rw-r--r--OSCAD/subcktLibrary/ua741.pro72
-rw-r--r--OSCAD/subcktLibrary/ua741.sch219
-rw-r--r--OSCAD/subcktLibrary/ua741.sub11
17 files changed, 0 insertions, 1832 deletions
diff --git a/OSCAD/subcktLibrary/lm555n.bak b/OSCAD/subcktLibrary/lm555n.bak
deleted file mode 100644
index 92d1f7a..0000000
--- a/OSCAD/subcktLibrary/lm555n.bak
+++ /dev/null
@@ -1,435 +0,0 @@
-EESchema Schematic File Version 2 date Monday 17 December 2012 10:48:46 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:analogXSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:digitalXSpice
-LIBS:lm555n-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "17 dec 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L D_INVERTER U5
-U 1 1 50CEA9C5
-P 6700 4050
-F 0 "U5" H 6550 4150 40 0000 C CNN
-F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN
- 1 6700 4050
- 1 0 0 -1
-$EndComp
-$Comp
-L D_SRLATCH U6
-U 1 1 50CEA9AE
-P 7100 3400
-F 0 "U6" H 6900 3650 60 0000 C CNN
-F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN
- 1 7100 3400
- 1 0 0 -1
-$EndComp
-Text Notes 5750 3050 0 60 ~ 0
-IC 555
-Wire Wire Line
- 4700 3000 4900 3000
-Wire Wire Line
- 4700 4750 4700 4650
-Connection ~ 4400 3550
-Connection ~ 4400 4900
-Wire Wire Line
- 4300 4900 7700 4900
-Wire Wire Line
- 4400 4200 4400 4100
-Wire Wire Line
- 7700 4900 7700 4800
-Wire Wire Line
- 7700 3250 7850 3250
-Wire Wire Line
- 7400 4600 7100 4600
-Wire Wire Line
- 7100 4600 7100 4250
-Wire Wire Line
- 7700 3650 7700 3550
-Wire Wire Line
- 6350 4050 6450 4050
-Wire Wire Line
- 6950 3900 6950 4000
-Wire Wire Line
- 7150 4000 7150 4050
-Wire Wire Line
- 7150 4050 6950 4050
-Wire Wire Line
- 6500 3550 6200 3550
-Wire Wire Line
- 6350 3250 6500 3250
-Wire Wire Line
- 5400 3250 5100 3250
-Wire Wire Line
- 5100 3250 5100 3750
-Wire Wire Line
- 5550 4500 5550 4350
-Wire Wire Line
- 5700 3550 5800 3550
-Wire Wire Line
- 5900 3250 6000 3250
-Wire Wire Line
- 6000 3850 6350 3850
-Wire Wire Line
- 5800 4150 6200 4150
-Wire Wire Line
- 5200 3550 5200 3700
-Wire Wire Line
- 5200 3700 5550 3700
-Wire Wire Line
- 5550 3700 5550 3750
-Connection ~ 5550 4450
-Wire Wire Line
- 5750 4400 5750 4450
-Wire Wire Line
- 5100 4350 5100 4450
-Wire Wire Line
- 5100 4450 5750 4450
-Wire Wire Line
- 6500 3400 6450 3400
-Wire Wire Line
- 6450 3400 6450 4050
-Wire Wire Line
- 6950 4000 7250 4000
-Wire Wire Line
- 7250 4000 7250 3900
-Connection ~ 7150 4000
-Wire Wire Line
- 7600 4250 7700 4250
-Wire Wire Line
- 7700 4400 7700 4350
-Wire Wire Line
- 7700 4350 7800 4350
-Wire Wire Line
- 7850 3850 7900 3850
-Wire Wire Line
- 4400 4900 4400 4700
-Wire Wire Line
- 4400 3600 4400 3500
-Wire Wire Line
- 4300 3000 4400 3000
-Wire Wire Line
- 4400 4150 4700 4150
-Connection ~ 4400 4150
-Wire Wire Line
- 4300 3550 4700 3550
-Wire Wire Line
- 4700 3550 4700 3500
-Wire Wire Line
- 6350 4750 6350 4650
-Text Label 4850 4100 0 60 ~ 0
-d
-$Comp
-L VCVS E2
-U 1 1 50AA12FF
-P 5050 4050
-F 0 "E2" H 4850 4150 50 0000 C CNN
-F 1 "10000" H 4850 4000 50 0000 C CNN
- 1 5050 4050
- 0 1 1 0
-$EndComp
-$Comp
-L LIMIT8 U4
-U 2 1 50B4E21B
-P 6000 3550
-F 0 "U4" H 6000 3650 30 0000 C CNN
-F 1 "LIMIT8" H 6000 3550 30 0000 C CNN
- 2 6000 3550
- 0 1 1 0
-$EndComp
-$Comp
-L LIMIT8 U4
-U 1 1 50B4E215
-P 5800 3850
-F 0 "U4" H 5800 3950 30 0000 C CNN
-F 1 "LIMIT8" H 5800 3850 30 0000 C CNN
- 1 5800 3850
- 0 1 1 0
-$EndComp
-$Comp
-L DAC8 U3
-U 2 1 50AAFCE7
-P 7700 3950
-F 0 "U3" H 7600 4050 40 0000 C CNN
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- 2 7700 3950
- 0 1 1 0
-$EndComp
-$Comp
-L DAC8 U3
-U 1 1 50AAFC9A
-P 7850 3550
-F 0 "U3" H 7750 3650 40 0000 C CNN
-F 1 "DAC8" H 7850 3550 40 0000 C CNN
- 1 7850 3550
- 0 1 1 0
-$EndComp
-$Comp
-L ADC8 U2
-U 3 1 50AAFB76
-P 6350 4350
-F 0 "U2" H 6250 4450 40 0000 C CNN
-F 1 "ADC8" H 6350 4350 40 0000 C CNN
- 3 6350 4350
- 0 -1 -1 0
-$EndComp
-$Comp
-L ADC8 U2
-U 2 1 50AAFB64
-P 6350 3550
-F 0 "U2" H 6250 3650 40 0000 C CNN
-F 1 "ADC8" H 6350 3550 40 0000 C CNN
- 2 6350 3550
- 0 -1 -1 0
-$EndComp
-$Comp
-L ADC8 U2
-U 1 1 50AAFB55
-P 6200 3850
-F 0 "U2" H 6100 3950 40 0000 C CNN
-F 1 "ADC8" H 6200 3850 40 0000 C CNN
- 1 6200 3850
- 0 -1 -1 0
-$EndComp
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 50AA39A3
-P 5750 4400
-F 0 "#FLG01" H 5750 4670 30 0001 C CNN
-F 1 "PWR_FLAG" H 5750 4630 30 0000 C CNN
- 1 5750 4400
- 1 0 0 -1
-$EndComp
-$Comp
-L PORT U1
-U 5 1 50AA2210
-P 4050 3550
-F 0 "U1" H 4050 3500 30 0000 C CNN
-F 1 "PORT" H 4050 3550 30 0000 C CNN
- 5 4050 3550
- 1 0 0 -1
-$EndComp
-$Comp
-L PORT U1
-U 1 1 50AA21C7
-P 4050 4900
-F 0 "U1" H 4050 4850 30 0000 C CNN
-F 1 "PORT" H 4050 4900 30 0000 C CNN
- 1 4050 4900
- 1 0 0 -1
-$EndComp
-$Comp
-L PORT U1
-U 2 1 50AA21BC
-P 4700 5000
-F 0 "U1" H 4700 4950 30 0000 C CNN
-F 1 "PORT" H 4700 5000 30 0000 C CNN
- 2 4700 5000
- 0 -1 -1 0
-$EndComp
-$Comp
-L PORT U1
-U 4 1 50AA21A9
-P 6350 5000
-F 0 "U1" H 6350 4950 30 0000 C CNN
-F 1 "PORT" H 6350 5000 30 0000 C CNN
- 4 6350 5000
- 0 -1 -1 0
-$EndComp
-$Comp
-L PORT U1
-U 7 1 50AA21A0
-P 8050 4350
-F 0 "U1" H 8050 4300 30 0000 C CNN
-F 1 "PORT" H 8050 4350 30 0000 C CNN
- 7 8050 4350
- -1 0 0 1
-$EndComp
-$Comp
-L PORT U1
-U 3 1 50AA2181
-P 8150 3850
-F 0 "U1" H 8150 3800 30 0000 C CNN
-F 1 "PORT" H 8150 3850 30 0000 C CNN
- 3 8150 3850
- -1 0 0 1
-$EndComp
-$Comp
-L PORT U1
-U 6 1 50AA2171
-P 5150 3000
-F 0 "U1" H 5150 2950 30 0000 C CNN
-F 1 "PORT" H 5150 3000 30 0000 C CNN
- 6 5150 3000
- -1 0 0 1
-$EndComp
-$Comp
-L PORT U1
-U 8 1 50AA2162
-P 4050 3000
-F 0 "U1" H 4050 2950 30 0000 C CNN
-F 1 "PORT" H 4050 3000 30 0000 C CNN
- 8 4050 3000
- 1 0 0 -1
-$EndComp
-$Comp
-L R R8
-U 1 1 50AA20DA
-P 7350 4250
-F 0 "R8" V 7430 4250 50 0000 C CNN
-F 1 "1500" V 7350 4250 50 0000 C CNN
- 1 7350 4250
- 0 1 1 0
-$EndComp
-$Comp
-L NPN Q1
-U 1 1 50AA2050
-P 7600 4600
-F 0 "Q1" H 7600 4450 50 0000 R CNN
-F 1 "QNOM" H 7600 4750 50 0000 R CNN
- 1 7600 4600
- 1 0 0 -1
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 50AA140C
-P 5550 4500
-F 0 "#PWR02" H 5550 4500 30 0001 C CNN
-F 1 "GND" H 5550 4430 30 0001 C CNN
- 1 5550 4500
- 1 0 0 -1
-$EndComp
-Text Label 4850 4000 0 60 ~ 0
-c
-Text Label 4700 4650 0 60 ~ 0
-d
-Text Label 4700 4150 0 60 ~ 0
-c
-$Comp
-L R R7
-U 1 1 50AA12F7
-P 5650 3250
-F 0 "R7" V 5730 3250 50 0000 C CNN
-F 1 "25" V 5650 3250 50 0000 C CNN
- 1 5650 3250
- 0 -1 -1 0
-$EndComp
-$Comp
-L R R6
-U 1 1 50AA12B0
-P 5450 3550
-F 0 "R6" V 5530 3550 50 0000 C CNN
-F 1 "25" V 5450 3550 50 0000 C CNN
- 1 5450 3550
- 0 -1 -1 0
-$EndComp
-Text Label 5300 4000 0 60 ~ 0
-b
-Text Label 5300 4100 0 60 ~ 0
-a
-Text Label 4700 3000 0 60 ~ 0
-b
-Text Label 4700 3500 0 60 ~ 0
-a
-$Comp
-L VCVS E1
-U 1 1 50AA11B6
-P 5500 4050
-F 0 "E1" H 5300 4150 50 0000 C CNN
-F 1 "10000" H 5300 4000 50 0000 C CNN
- 1 5500 4050
- 0 1 1 0
-$EndComp
-$Comp
-L R R4
-U 1 1 50A9E00B
-P 4700 3250
-F 0 "R4" V 4780 3250 50 0000 C CNN
-F 1 "2E6" V 4700 3250 50 0000 C CNN
- 1 4700 3250
- 1 0 0 -1
-$EndComp
-$Comp
-L R R5
-U 1 1 50A9E001
-P 4700 4400
-F 0 "R5" V 4780 4400 50 0000 C CNN
-F 1 "2E6" V 4700 4400 50 0000 C CNN
- 1 4700 4400
- 1 0 0 -1
-$EndComp
-$Comp
-L R R3
-U 1 1 50A9DF09
-P 4400 4450
-F 0 "R3" V 4480 4450 50 0000 C CNN
-F 1 "5000" V 4400 4450 50 0000 C CNN
- 1 4400 4450
- 1 0 0 -1
-$EndComp
-$Comp
-L R R2
-U 1 1 50A9DF03
-P 4400 3850
-F 0 "R2" V 4480 3850 50 0000 C CNN
-F 1 "5000" V 4400 3850 50 0000 C CNN
- 1 4400 3850
- 1 0 0 -1
-$EndComp
-$Comp
-L R R1
-U 1 1 50A9DEFE
-P 4400 3250
-F 0 "R1" V 4480 3250 50 0000 C CNN
-F 1 "5000" V 4400 3250 50 0000 C CNN
- 1 4400 3250
- 1 0 0 -1
-$EndComp
-$EndSCHEMATC
diff --git a/OSCAD/subcktLibrary/lm555n.cir b/OSCAD/subcktLibrary/lm555n.cir
deleted file mode 100644
index 9483a64..0000000
--- a/OSCAD/subcktLibrary/lm555n.cir
+++ /dev/null
@@ -1,25 +0,0 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 10:57:49 AM IST
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-*Sheet Name:/
-U5 5 21 D_INVERTER
-U6 1 4 5 21 21 8 10 D_SRLATCH
-E2 18 0 23 14 10000
-U4 19 20 11 12 LIMIT8
-U3 8 10 7 9 DAC8
-U2 11 12 6 4 1 5 ADC8
-U1 22 14 7 6 15 16 3 13 PORT
-R8 9 2 1500
-Q1 22 2 3 QNOM
-R7 18 20 25
-R6 17 19 25
-E1 17 0 16 15 10000
-R4 16 15 2E6
-R5 23 14 2E6
-R3 23 22 5000
-R2 15 23 5000
-R1 13 15 5000
-
-.end
diff --git a/OSCAD/subcktLibrary/lm555n.cir.ckt b/OSCAD/subcktLibrary/lm555n.cir.ckt
deleted file mode 100644
index 90f04a3..0000000
--- a/OSCAD/subcktLibrary/lm555n.cir.ckt
+++ /dev/null
@@ -1,35 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist
-
-* Inverter d_inverter
-* SR Latch d_srlatch
-e2 18 0 23 14 10000
-* Limiter limit8
-* Digital to Analog converter dac8
-* Analog to Digital converter adc8
-u1 22 14 7 6 15 16 3 13 port
-r8 9 2 1500
-q1 3 2 22 qnom
-r7 18 20 25
-r6 17 19 25
-e1 17 0 16 15 10000
-r4 16 15 2e6
-r5 23 14 2e6
-r3 23 22 5000
-r2 15 23 5000
-r1 13 15 5000
-a1 5 21 u5
-.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12)
-a2 1 4 5 21 21 8 10 u6
-.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0
-+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12
-+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12)
-a3 19 11 u4
-a4 20 12 u4
-.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0)
-a5 [8] [7] u3
-a6 [10] [9] u3
-.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 )
-a7 [11] [4] u2
-a8 [12] [1] u2
-a9 [6] [5] u2
-.model u2 adc_bridge(in_low=0.8 in_high=2.0 )
diff --git a/OSCAD/subcktLibrary/lm555n.cir.out b/OSCAD/subcktLibrary/lm555n.cir.out
deleted file mode 100644
index 90f04a3..0000000
--- a/OSCAD/subcktLibrary/lm555n.cir.out
+++ /dev/null
@@ -1,35 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist
-
-* Inverter d_inverter
-* SR Latch d_srlatch
-e2 18 0 23 14 10000
-* Limiter limit8
-* Digital to Analog converter dac8
-* Analog to Digital converter adc8
-u1 22 14 7 6 15 16 3 13 port
-r8 9 2 1500
-q1 3 2 22 qnom
-r7 18 20 25
-r6 17 19 25
-e1 17 0 16 15 10000
-r4 16 15 2e6
-r5 23 14 2e6
-r3 23 22 5000
-r2 15 23 5000
-r1 13 15 5000
-a1 5 21 u5
-.model u5 d_inverter(rise_delay=1e-12 fall_delay=1e-12 input_load=1e-12)
-a2 1 4 5 21 21 8 10 u6
-.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0
-+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12
-+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12)
-a3 19 11 u4
-a4 20 12 u4
-.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0)
-a5 [8] [7] u3
-a6 [10] [9] u3
-.model u3 dac_bridge(out_low=0.2 out_high=5.0 out_undef=5.0 )
-a7 [11] [4] u2
-a8 [12] [1] u2
-a9 [6] [5] u2
-.model u2 adc_bridge(in_low=0.8 in_high=2.0 )
diff --git a/OSCAD/subcktLibrary/lm555n.pro b/OSCAD/subcktLibrary/lm555n.pro
deleted file mode 100644
index 09fa54e..0000000
--- a/OSCAD/subcktLibrary/lm555n.pro
+++ /dev/null
@@ -1,73 +0,0 @@
-update=Monday 19 November 2012 04:56:38 PM IST
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=/home/yogesh/OSCAD/library
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-LibName31=analogSpice
-LibName32=analogXSpice
-LibName33=converterSpice
-LibName34=digitalSpice
-LibName35=linearSpice
-LibName36=measurementSpice
-LibName37=portSpice
-LibName38=sourcesSpice
-LibName39=digitalXSpice
diff --git a/OSCAD/subcktLibrary/lm555n.sch b/OSCAD/subcktLibrary/lm555n.sch
deleted file mode 100644
index fabbb66..0000000
--- a/OSCAD/subcktLibrary/lm555n.sch
+++ /dev/null
@@ -1,435 +0,0 @@
-EESchema Schematic File Version 2 date Monday 17 December 2012 10:57:52 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:analogXSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:digitalXSpice
-LIBS:lm555n-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "17 dec 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-$Comp
-L D_INVERTER U5
-U 1 1 50CEA9C5
-P 6700 4050
-F 0 "U5" H 6550 4150 40 0000 C CNN
-F 1 "D_INVERTER" H 6800 4150 40 0000 C CNN
- 1 6700 4050
- 1 0 0 -1
-$EndComp
-$Comp
-L D_SRLATCH U6
-U 1 1 50CEA9AE
-P 7100 3400
-F 0 "U6" H 6900 3650 60 0000 C CNN
-F 1 "D_SRLATCH" H 7100 3500 60 0000 C CNN
- 1 7100 3400
- 1 0 0 -1
-$EndComp
-Text Notes 5750 3050 0 60 ~ 0
-IC 555
-Wire Wire Line
- 4700 3000 4900 3000
-Wire Wire Line
- 4700 4750 4700 4650
-Connection ~ 4400 3550
-Connection ~ 4400 4900
-Wire Wire Line
- 4300 4900 7700 4900
-Wire Wire Line
- 4400 4200 4400 4100
-Wire Wire Line
- 7700 4900 7700 4800
-Wire Wire Line
- 7700 3250 7850 3250
-Wire Wire Line
- 7400 4600 7100 4600
-Wire Wire Line
- 7100 4600 7100 4250
-Wire Wire Line
- 7700 3650 7700 3550
-Wire Wire Line
- 6350 4050 6450 4050
-Wire Wire Line
- 6950 3900 6950 4000
-Wire Wire Line
- 7150 4000 7150 4050
-Wire Wire Line
- 7150 4050 6950 4050
-Wire Wire Line
- 6500 3550 6200 3550
-Wire Wire Line
- 6350 3250 6500 3250
-Wire Wire Line
- 5400 3250 5100 3250
-Wire Wire Line
- 5100 3250 5100 3750
-Wire Wire Line
- 5550 4500 5550 4350
-Wire Wire Line
- 5700 3550 5800 3550
-Wire Wire Line
- 5900 3250 6000 3250
-Wire Wire Line
- 6000 3850 6350 3850
-Wire Wire Line
- 5800 4150 6200 4150
-Wire Wire Line
- 5200 3550 5200 3700
-Wire Wire Line
- 5200 3700 5550 3700
-Wire Wire Line
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diff --git a/OSCAD/subcktLibrary/lm555n.sub b/OSCAD/subcktLibrary/lm555n.sub
deleted file mode 100644
index 254c530..0000000
--- a/OSCAD/subcktLibrary/lm555n.sub
+++ /dev/null
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-* Subcircuit lm555n
-.subckt lm555n 22 14 7 6 15 16 3 13
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 10:57:49 am ist
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-* SR Latch d_srlatch
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-a2 1 4 5 21 21 8 10 u6
-.model u6 d_srlatch(rise_delay=1e-12 fall_delay=1e-12 ic=0
-+sr_load=1e-12 enable_load=1e-12 set_load=1e-12 reset_load=1e-12
-+sr_delay=1e-12 enable_delay=1e-12 set_delay=1e-12 reset_delay=1e-12)
-a3 19 11 u4
-a4 20 12 u4
-.model u4 limit(out_lower_limit=0.0 out_upper_limit=5.0)
-a5 [8] [7] u3
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-a7 [11] [4] u2
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diff --git a/OSCAD/subcktLibrary/lm741.sub b/OSCAD/subcktLibrary/lm741.sub
deleted file mode 100644
index aabd579..0000000
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-* EESchema Netlist Version 1.1 (Spice format) creation date: Saturday 20 October 2012 08:46:50 PM IST
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-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
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deleted file mode 100644
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diff --git a/OSCAD/subcktLibrary/ua741-cache.lib b/OSCAD/subcktLibrary/ua741-cache.lib
deleted file mode 100644
index 9114d34..0000000
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-EESchema-LIBRARY Version 2.3 Date: Saturday 17 November 2012 08:10:48 AM IST
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diff --git a/OSCAD/subcktLibrary/ua741.bak b/OSCAD/subcktLibrary/ua741.bak
deleted file mode 100644
index 6be9280..0000000
--- a/OSCAD/subcktLibrary/ua741.bak
+++ /dev/null
@@ -1,208 +0,0 @@
-EESchema Schematic File Version 2 date Monday 17 December 2012 11:17:01 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
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-LIBS:cypress
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deleted file mode 100644
index de79742..0000000
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+++ /dev/null
@@ -1,15 +0,0 @@
-* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 17 December 2012 11:16:58 AM IST
-
-* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
-* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
-
-*Sheet Name:/
-U1 6 7 3 PORT
-Rout1 3 2 75
-Eout1 2 0 1 0 1
-Cbw1 1 0 31.85e-9
-Rbw1 1 4 0.5e6
-Ein1 4 0 7 6 100e3
-Rin1 7 6 2e6
-
-.end
diff --git a/OSCAD/subcktLibrary/ua741.cir.ckt b/OSCAD/subcktLibrary/ua741.cir.ckt
deleted file mode 100644
index 3661a9a..0000000
--- a/OSCAD/subcktLibrary/ua741.cir.ckt
+++ /dev/null
@@ -1,9 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-
-u1 6 7 3 port
-rout1 3 2 75
-eout1 2 0 1 0 1
-cbw1 1 0 31.85e-9
-rbw1 1 4 0.5e6
-ein1 4 0 7 6 100e3
-rin1 7 6 2e6
diff --git a/OSCAD/subcktLibrary/ua741.cir.out b/OSCAD/subcktLibrary/ua741.cir.out
deleted file mode 100644
index 3661a9a..0000000
--- a/OSCAD/subcktLibrary/ua741.cir.out
+++ /dev/null
@@ -1,9 +0,0 @@
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-
-u1 6 7 3 port
-rout1 3 2 75
-eout1 2 0 1 0 1
-cbw1 1 0 31.85e-9
-rbw1 1 4 0.5e6
-ein1 4 0 7 6 100e3
-rin1 7 6 2e6
diff --git a/OSCAD/subcktLibrary/ua741.pro b/OSCAD/subcktLibrary/ua741.pro
deleted file mode 100644
index 9aa118e..0000000
--- a/OSCAD/subcktLibrary/ua741.pro
+++ /dev/null
@@ -1,72 +0,0 @@
-update=Monday 17 December 2012 06:14:06 PM IST
-last_client=eeschema
-[eeschema]
-version=1
-LibDir=/home/yogesh/OSCAD/library
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-LibName31=analogSpice
-LibName32=converterSpice
-LibName33=digitalSpice
-LibName34=linearSpice
-LibName35=measurementSpice
-LibName36=portSpice
-LibName37=sourcesSpice
-LibName38=analogXSpice
diff --git a/OSCAD/subcktLibrary/ua741.sch b/OSCAD/subcktLibrary/ua741.sch
deleted file mode 100644
index 7dfc5e1..0000000
--- a/OSCAD/subcktLibrary/ua741.sch
+++ /dev/null
@@ -1,219 +0,0 @@
-EESchema Schematic File Version 2 date Wednesday 19 December 2012 10:15:16 AM IST
-LIBS:power
-LIBS:device
-LIBS:transistors
-LIBS:conn
-LIBS:linear
-LIBS:regul
-LIBS:74xx
-LIBS:cmos4000
-LIBS:adc-dac
-LIBS:memory
-LIBS:xilinx
-LIBS:special
-LIBS:microcontrollers
-LIBS:dsp
-LIBS:microchip
-LIBS:analog_switches
-LIBS:motorola
-LIBS:texas
-LIBS:intel
-LIBS:audio
-LIBS:interface
-LIBS:digital-audio
-LIBS:philips
-LIBS:display
-LIBS:cypress
-LIBS:siliconi
-LIBS:opto
-LIBS:atmel
-LIBS:contrib
-LIBS:valves
-LIBS:analogSpice
-LIBS:converterSpice
-LIBS:digitalSpice
-LIBS:linearSpice
-LIBS:measurementSpice
-LIBS:portSpice
-LIBS:sourcesSpice
-LIBS:analogXSpice
-LIBS:ua741-cache
-EELAYER 25 0
-EELAYER END
-$Descr A4 11700 8267
-encoding utf-8
-Sheet 1 1
-Title ""
-Date "19 dec 2012"
-Rev ""
-Comp ""
-Comment1 ""
-Comment2 ""
-Comment3 ""
-Comment4 ""
-$EndDescr
-Text Notes 3800 2400 0 60 ~ 0
-Op-Amp
-Text Notes 3750 2850 0 60 ~ 0
-VCCS
-Text Notes 5800 2500 0 60 ~ 0
-out
-Text Notes 2750 3100 0 60 ~ 0
--
-Text Notes 2700 2600 0 60 ~ 0
-+
-$Comp
-L PORT U1
-U 6 1 5082C027
-P 6250 2500
-F 0 "U1" H 6250 2450 30 0000 C CNN
-F 1 "PORT" H 6250 2500 30 0000 C CNN
- 6 6250 2500
- -1 0 0 1
-$EndComp
-$Comp
-L PORT U1
-U 2 1 5082C011
-P 2300 3100
-F 0 "U1" H 2300 3050 30 0000 C CNN
-F 1 "PORT" H 2300 3100 30 0000 C CNN
- 2 2300 3100
- 1 0 0 -1
-$EndComp
-$Comp
-L PORT U1
-U 3 1 5082C00B
-P 2250 2600
-F 0 "U1" H 2250 2550 30 0000 C CNN
-F 1 "PORT" H 2250 2600 30 0000 C CNN
- 3 2250 2600
- 1 0 0 -1
-$EndComp
-Connection ~ 3700 3200
-Wire Wire Line
- 3450 3200 3700 3200
-Connection ~ 5000 3300
-Wire Wire Line
- 3700 3300 5250 3300
-Wire Wire Line
- 5250 3300 5250 3200
-Connection ~ 4550 3300
-Wire Wire Line
- 5000 3300 5000 2950
-Connection ~ 3700 3300
-Wire Wire Line
- 4550 3300 4550 3100
-Wire Wire Line
- 3900 2500 3700 2500
-Wire Wire Line
- 3700 2500 3700 2550
-Wire Wire Line
- 3450 2900 3300 2900
-Wire Wire Line
- 3300 2900 3300 3200
-Wire Wire Line
- 3300 3200 2950 3200
-Connection ~ 2950 3100
-Wire Wire Line
- 2950 3200 2950 3100
-Wire Wire Line
- 3000 2600 2500 2600
-Wire Wire Line
- 2550 3100 3000 3100
-Wire Wire Line
- 2950 2600 2950 2500
-Connection ~ 2950 2600
-Wire Wire Line
- 2950 2500 3300 2500
-Wire Wire Line
- 3300 2500 3300 2800
-Wire Wire Line
- 3300 2800 3450 2800
-Wire Wire Line
- 3700 3150 3700 3400
-Wire Wire Line
- 4550 2500 4550 2700
-Wire Wire Line
- 4400 2500 5000 2500
-Wire Wire Line
- 5000 2500 5000 2850
-Connection ~ 4550 2500
-Wire Wire Line
- 5250 2600 5250 2500
-Wire Wire Line
- 5250 2500 5350 2500
-Wire Wire Line
- 5850 2500 6000 2500
-$Comp
-L PWR_FLAG #FLG01
-U 1 1 508152A0
-P 3450 3200
-F 0 "#FLG01" H 3450 3470 30 0001 C CNN
-F 1 "PWR_FLAG" H 3450 3430 30 0000 C CNN
- 1 3450 3200
- 1 0 0 -1
-$EndComp
-$Comp
-L R Rout1
-U 1 1 50813F5B
-P 5600 2500
-F 0 "Rout1" V 5680 2500 50 0000 C CNN
-F 1 "75" V 5600 2500 50 0000 C CNN
- 1 5600 2500
- 0 1 1 0
-$EndComp
-$Comp
-L VCVS Eout1
-U 1 1 50813F0F
-P 5200 2900
-F 0 "Eout1" H 5000 3000 50 0000 C CNN
-F 1 "1" H 5000 2850 50 0000 C CNN
- 1 5200 2900
- 0 1 1 0
-$EndComp
-$Comp
-L C Cbw1
-U 1 1 50813EE0
-P 4550 2900
-F 0 "Cbw1" H 4600 3000 50 0000 L CNN
-F 1 "31.85e-9" H 4600 2800 50 0000 L CNN
- 1 4550 2900
- 1 0 0 -1
-$EndComp
-$Comp
-L R Rbw1
-U 1 1 50813EAB
-P 4150 2500
-F 0 "Rbw1" V 4230 2500 50 0000 C CNN
-F 1 "0.5e6" V 4150 2500 50 0000 C CNN
- 1 4150 2500
- 0 1 1 0
-$EndComp
-$Comp
-L GND #PWR02
-U 1 1 50813E0D
-P 3700 3400
-F 0 "#PWR02" H 3700 3400 30 0001 C CNN
-F 1 "GND" H 3700 3330 30 0001 C CNN
- 1 3700 3400
- 1 0 0 -1
-$EndComp
-$Comp
-L VCVS Ein1
-U 1 1 50813D7C
-P 3650 2850
-F 0 "Ein1" H 3450 2950 50 0000 C CNN
-F 1 "100e3" H 3450 2800 50 0000 C CNN
- 1 3650 2850
- 0 1 1 0
-$EndComp
-$Comp
-L R Rin1
-U 1 1 50813C57
-P 3000 2850
-F 0 "Rin1" V 3080 2850 50 0000 C CNN
-F 1 "2e6" V 3000 2850 50 0000 C CNN
- 1 3000 2850
- 1 0 0 -1
-$EndComp
-$EndSCHEMATC
diff --git a/OSCAD/subcktLibrary/ua741.sub b/OSCAD/subcktLibrary/ua741.sub
deleted file mode 100644
index 1edba9f..0000000
--- a/OSCAD/subcktLibrary/ua741.sub
+++ /dev/null
@@ -1,11 +0,0 @@
-* Subcircuit ua741
-.subckt ua741 6 7 3
-* eeschema netlist version 1.1 (spice format) creation date: monday 17 december 2012 11:16:58 am ist
-rout1 3 2 75
-eout1 2 0 1 0 1
-cbw1 1 0 31.85e-9
-rbw1 1 4 0.5e6
-ein1 4 0 7 6 100e3
-rin1 7 6 2e6
-
-.ends ua741 \ No newline at end of file