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path: root/OSCAD/Examples/sedra_smith/chapter_8/example_8.4
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Diffstat (limited to 'OSCAD/Examples/sedra_smith/chapter_8/example_8.4')
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis1
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.libbin0 -> 2003 bytes
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir41
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt53
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out58
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro74
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj1
-rw-r--r--OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch573
8 files changed, 801 insertions, 0 deletions
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis
new file mode 100644
index 0000000..722124c
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/analysis
@@ -0,0 +1 @@
+.dc v1 0e-00 15e-00 1e-00
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib
new file mode 100644
index 0000000..e93b428
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4-cache.lib
Binary files differ
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir
new file mode 100644
index 0000000..7f3611e
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir
@@ -0,0 +1,41 @@
+* EESchema Netlist Version 1.1 (Spice format) creation date: Monday 29 April 2013 11:24:11 AM IST
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+*Sheet Name:/
+U3 0 25 0 21 25 24 22 21 VPLOT8_1
+U13 23 VPLOT8_1
+v2 0 8 15
+U14 12 6 IPLOT
+U11 5 18 IPLOT
+R7 7 8 3k
+U15 9 7 IPLOT
+Q9 9 23 6 NPN
+U12 23 1 IPLOT
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+Q6 2 25 4 NPN
+U8 3 4 IPLOT
+R5 12 5 2.3k
+U10 19 22 IPLOT
+U7 13 21 IPLOT
+U4 14 24 IPLOT
+U5 15 16 IPLOT
+U1 17 25 IPLOT
+Q8 23 22 18 NPN
+R4 12 19 3k
+Q7 3 21 22 NPN
+Q5 3 24 12 NPN
+R1 0 17 28.6k
+Q1 10 25 25 NPN
+Q3 11 25 16 NPN
+R3 12 13 20k
+Q4 15 0 21 NPN
+v1 12 0 15
+R2 12 14 20k
+Q2 15 0 24 NPN
+
+.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt
new file mode 100644
index 0000000..14076b8
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.ckt
@@ -0,0 +1,53 @@
+* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist
+
+* Plotting option vplot8_1
+* Plotting option vplot8_1
+v2 0 8 15
+V_u14 12 6 0
+V_u11 5 18 0
+r7 7 8 3k
+V_u15 9 7 0
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+r3 12 13 20k
+q4 21 0 15 npn
+v1 12 0 15
+r2 12 14 20k
+q2 24 0 15 npn
+
+.dc v1 0e-00 15e-00 1e-00
+.plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21)
+.plot v(23)
+.plot i(V_u14)
+.plot i(V_u11)
+.plot i(V_u15)
+.plot i(V_u12)
+.plot i(V_u9)
+.plot i(V_u6)
+.plot i(V_u2)
+.plot i(V_u8)
+.plot i(V_u10)
+.plot i(V_u7)
+.plot i(V_u4)
+.plot i(V_u5)
+.plot i(V_u1)
+.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out
new file mode 100644
index 0000000..a08c832
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.cir.out
@@ -0,0 +1,58 @@
+* eeschema netlist version 1.1 (spice format) creation date: monday 29 april 2013 11:24:11 am ist
+
+* Plotting option vplot8_1
+* Plotting option vplot8_1
+v2 0 8 15
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+V_u11 5 18 0
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+V_u15 9 7 0
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+q4 21 0 15 npn
+v1 12 0 15
+r2 12 14 20k
+q2 24 0 15 npn
+
+.dc v1 0e-00 15e-00 1e-00
+
+* Control Statements
+.control
+run
+plot v(0) v(25) v(0) v(21) v(25) v(24) v(22) v(21)
+plot v(23)
+plot i(V_u14)
+plot i(V_u11)
+plot i(V_u15)
+plot i(V_u12)
+plot i(V_u9)
+plot i(V_u6)
+plot i(V_u2)
+plot i(V_u8)
+plot i(V_u10)
+plot i(V_u7)
+plot i(V_u4)
+plot i(V_u5)
+plot i(V_u1)
+.endc
+.end
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro
new file mode 100644
index 0000000..767e17f
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.pro
@@ -0,0 +1,74 @@
+update=Monday 29 April 2013 10:50:36 AM IST
+last_client=eeschema
+[eeschema]
+version=1
+LibDir=
+NetFmt=1
+HPGLSpd=20
+HPGLDm=15
+HPGLNum=1
+offX_A4=0
+offY_A4=0
+offX_A3=0
+offY_A3=0
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+offX_A1=0
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+offX_A0=0
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+offX_A=0
+offY_A=0
+offX_B=0
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+offX_C=0
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+offX_D=0
+offY_D=0
+offX_E=0
+offY_E=0
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=60
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=special
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
+LibName31=/home/holy/OSCAD/library/analogSpice
+LibName32=/home/holy/OSCAD/library/analogXSpice
+LibName33=/home/holy/OSCAD/library/convergenceAidSpice
+LibName34=/home/holy/OSCAD/library/converterSpice
+LibName35=/home/holy/OSCAD/library/digitalSpice
+LibName36=/home/holy/OSCAD/library/digitalXSpice
+LibName37=/home/holy/OSCAD/library/linearSpice
+LibName38=/home/holy/OSCAD/library/measurementSpice
+LibName39=/home/holy/OSCAD/library/portSpice
+LibName40=/home/holy/OSCAD/library/sourcesSpice
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj
new file mode 100644
index 0000000..c332699
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.proj
@@ -0,0 +1 @@
+schematicFile example_8.4.sch
diff --git a/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch
new file mode 100644
index 0000000..cc68262
--- /dev/null
+++ b/OSCAD/Examples/sedra_smith/chapter_8/example_8.4/example_8.4.sch
@@ -0,0 +1,573 @@
+EESchema Schematic File Version 2 date Monday 29 April 2013 11:24:17 AM IST
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:analogSpice
+LIBS:analogXSpice
+LIBS:convergenceAidSpice
+LIBS:converterSpice
+LIBS:digitalSpice
+LIBS:digitalXSpice
+LIBS:linearSpice
+LIBS:measurementSpice
+LIBS:portSpice
+LIBS:sourcesSpice
+EELAYER 43 0
+EELAYER END
+$Descr A4 11700 8267
+encoding utf-8
+Sheet 1 1
+Title ""
+Date "29 apr 2013"
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
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