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author | Fahim | 2014-09-09 16:11:17 +0530 |
---|---|---|
committer | Fahim | 2014-09-09 16:11:17 +0530 |
commit | c632c1009c9e095135220c809d7c799841f160b3 (patch) | |
tree | 3be2def8313164c3bf32799714ba53a4a1326ed6 /OSCAD/Examples/sedra_smith/chapter_3/example_3.20 | |
parent | e338c2a59389c22b8cca9a78d75e626ae779c405 (diff) | |
download | FreeEDA-c632c1009c9e095135220c809d7c799841f160b3.tar.gz FreeEDA-c632c1009c9e095135220c809d7c799841f160b3.tar.bz2 FreeEDA-c632c1009c9e095135220c809d7c799841f160b3.zip |
Subject: Changing all content and name of directory and file to FreeEDA
Description: The content of file,name of directory and file has been
changed in the below format.
1. Oscad to FreeEDA
2. OSCAD to FreeEDA
3. oscad to freeeda
Diffstat (limited to 'OSCAD/Examples/sedra_smith/chapter_3/example_3.20')
11 files changed, 0 insertions, 721 deletions
diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis deleted file mode 100644 index 31f2ad8..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/analysis +++ /dev/null @@ -1 +0,0 @@ -.dc v1 0e-00 2e-00 2e-03 diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak deleted file mode 100644 index 646744a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.bak +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:00:58 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib deleted file mode 100644 index b92ac3a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20-cache.lib +++ /dev/null @@ -1,107 +0,0 @@ -EESchema-LIBRARY Version 2.3 Date: Friday 26 April 2013 04:23:31 PM IST -#encoding utf-8 -# -# dc -# -DEF dc v 0 40 Y Y 1 F N -F0 "v" -200 100 60 H V C CNN -F1 "dc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# GND -# -DEF ~GND #PWR 0 0 Y Y 1 F P -F0 "#PWR" 0 0 30 H I C CNN -F1 "GND" 0 -70 30 H I C CNN -DRAW -P 4 0 1 0 -50 0 0 -50 50 0 -50 0 N -X GND 1 0 0 0 U 30 30 1 1 W N -ENDDRAW -ENDDEF -# -# Idc -# -DEF Idc i 0 40 Y Y 1 F N -F0 "i" -200 100 60 H V C CNN -F1 "Idc" -200 -50 60 H V C CNN -F2 "R1" -300 0 60 H V C CNN -$FPLIST - 1_pin -$ENDFPLIST -DRAW -C 0 0 150 0 1 0 N -X + 1 0 450 300 D 50 50 1 1 P -X - 2 0 -450 300 U 50 50 1 1 P -ENDDRAW -ENDDEF -# -# iplot -# -DEF iplot U 0 20 Y Y 1 F N -F0 "U" -150 100 50 H V C CNN -F1 "iplot" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 -250 0 150 R 30 30 1 1 I -X - 2 250 0 150 L 30 30 1 1 I -ENDDRAW -ENDDEF -# -# NPN -# -DEF NPN Q 0 0 Y Y 1 F N -F0 "Q" 0 -150 50 H V R CNN -F1 "NPN" 0 150 50 H V R CNN -DRAW -C 50 0 111 0 1 10 N -P 2 0 1 0 0 0 100 100 N -P 3 0 1 10 0 75 0 -75 0 -75 N -P 3 0 1 0 50 -50 0 0 0 0 N -P 3 0 1 0 90 -90 100 -100 100 -100 N -P 5 0 1 0 90 -90 70 -30 30 -70 90 -90 90 -90 F -X E 1 100 -200 100 U 40 40 1 1 P -X B 2 -200 0 200 R 40 40 1 1 I -X C 3 100 200 100 D 40 40 1 1 P -ENDDRAW -ENDDEF -# -# PWR_FLAG -# -DEF PWR_FLAG #FLG 0 0 N N 1 F P -F0 "#FLG" 0 270 30 H I C CNN -F1 "PWR_FLAG" 0 230 30 H V C CNN -DRAW -X pwr 1 0 0 0 U 20 20 0 0 w -P 3 0 1 0 0 0 0 100 0 100 N -P 5 0 1 0 0 100 -100 150 0 200 100 150 0 100 N -ENDDRAW -ENDDEF -# -# vplot8_1 -# -DEF vplot8_1 U 0 40 Y Y 8 F N -F0 "U" -150 100 50 H V C CNN -F1 "vplot8_1" 150 100 50 H V C CNN -DRAW -C 0 0 100 0 0 0 N -X + 1 0 -300 200 U 40 40 1 1 I -X + 2 0 -300 200 U 40 40 2 1 I -X + 3 0 -300 200 U 40 40 3 1 I -X + 4 0 -300 200 U 40 40 4 1 I -X + 5 0 -300 200 U 40 40 5 1 I -X + 6 0 -300 200 U 40 40 6 1 I -X + 7 0 -300 200 U 40 40 7 1 I -X + 8 0 -300 200 U 40 40 8 1 I -ENDDRAW -ENDDEF -# -#End Library diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak deleted file mode 100644 index 65ec82c..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.bak +++ /dev/null @@ -1,188 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:00:58 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5350 -Connection ~ 5950 5450 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 6350 4200 6350 5350 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 5950 5600 5950 4700 -Wire Wire Line - 6350 5350 5450 5350 -Wire Wire Line - 5450 5350 5450 5100 -Wire Wire Line - 5450 5100 4750 5100 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5350 -F 0 "#FLG01" H 5950 5620 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5580 30 0000 C CNN - 1 5950 5350 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5600 -F 0 "#PWR03" H 5950 5600 30 0001 C CNN -F 1 "GND" H 5950 5530 30 0001 C CNN - 1 5950 5600 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir deleted file mode 100644 index 419bc05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir +++ /dev/null @@ -1,15 +0,0 @@ -* EESchema Netlist Version 1.1 (Spice format) creation date: Friday 26 April 2013 03:55:55 PM IST - -* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N -* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 - -*Sheet Name:/ -i1 5 0 IDC -U4 0 1 IPLOT -U2 3 5 IPLOT -U3 4 6 IPLOT -U1 6 1 VPLOT8_1 -v1 4 0 2 -Q1 1 3 6 NPN - -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt deleted file mode 100644 index a91b990..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.ckt +++ /dev/null @@ -1,17 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 -.plot i(V_u4) -.plot i(V_u2) -.plot i(V_u3) -.plot v(6) v(1) -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out deleted file mode 100644 index b2caa59..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.cir.out +++ /dev/null @@ -1,22 +0,0 @@ -* eeschema netlist version 1.1 (spice format) creation date: friday 26 april 2013 03:55:55 pm ist -.include npn.lib - -i1 5 0 idc -V_u4 0 1 0 -V_u2 3 5 0 -V_u3 4 6 0 -* Plotting option vplot8_1 -v1 4 0 2 -q1 6 3 1 npn - -.dc v1 0e-00 2e-00 2e-03 - -* Control Statements -.control -run -plot i(V_u4) -plot i(V_u2) -plot i(V_u3) -plot v(6) v(1) -.endc -.end diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro deleted file mode 100644 index d4ac2ef..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.pro +++ /dev/null @@ -1,74 +0,0 @@ -update=Tuesday 16 April 2013 12:53:24 PM IST -last_client=eeschema -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -LabSize=60 -[eeschema/libraries] -LibName1=power -LibName2=device -LibName3=transistors -LibName4=conn -LibName5=linear -LibName6=regul -LibName7=74xx -LibName8=cmos4000 -LibName9=adc-dac -LibName10=memory -LibName11=xilinx -LibName12=special -LibName13=microcontrollers -LibName14=dsp -LibName15=microchip -LibName16=analog_switches -LibName17=motorola -LibName18=texas -LibName19=intel -LibName20=audio -LibName21=interface -LibName22=digital-audio -LibName23=philips -LibName24=display -LibName25=cypress -LibName26=siliconi -LibName27=opto -LibName28=atmel -LibName29=contrib -LibName30=valves -LibName31=/home/holy/OSCAD/library/analogSpice -LibName32=/home/holy/OSCAD/library/analogXSpice -LibName33=/home/holy/OSCAD/library/convergenceAidSpice -LibName34=/home/holy/OSCAD/library/converterSpice -LibName35=/home/holy/OSCAD/library/digitalSpice -LibName36=/home/holy/OSCAD/library/digitalXSpice -LibName37=/home/holy/OSCAD/library/linearSpice -LibName38=/home/holy/OSCAD/library/measurementSpice -LibName39=/home/holy/OSCAD/library/portSpice -LibName40=/home/holy/OSCAD/library/sourcesSpice diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj deleted file mode 100644 index 231747a..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.proj +++ /dev/null @@ -1 +0,0 @@ -schematicFile example_3.20.sch diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch deleted file mode 100644 index a694eb1..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/example_3.20.sch +++ /dev/null @@ -1,183 +0,0 @@ -EESchema Schematic File Version 2 date Friday 26 April 2013 04:23:31 PM IST -LIBS:power -LIBS:device -LIBS:transistors -LIBS:conn -LIBS:linear -LIBS:regul -LIBS:74xx -LIBS:cmos4000 -LIBS:adc-dac -LIBS:memory -LIBS:xilinx -LIBS:special -LIBS:microcontrollers -LIBS:dsp -LIBS:microchip -LIBS:analog_switches -LIBS:motorola -LIBS:texas -LIBS:intel -LIBS:audio -LIBS:interface -LIBS:digital-audio -LIBS:philips -LIBS:display -LIBS:cypress -LIBS:siliconi -LIBS:opto -LIBS:atmel -LIBS:contrib -LIBS:valves -LIBS:analogSpice -LIBS:analogXSpice -LIBS:convergenceAidSpice -LIBS:converterSpice -LIBS:digitalSpice -LIBS:digitalXSpice -LIBS:linearSpice -LIBS:measurementSpice -LIBS:portSpice -LIBS:sourcesSpice -LIBS:example_3.20-cache -EELAYER 25 0 -EELAYER END -$Descr A4 11700 8267 -encoding utf-8 -Sheet 1 1 -Title "" -Date "26 apr 2013" -Rev "" -Comp "" -Comment1 "" -Comment2 "" -Comment3 "" -Comment4 "" -$EndDescr -Wire Wire Line - 6350 4200 6350 5100 -Wire Wire Line - 6350 3300 6350 2800 -Wire Wire Line - 6350 2800 5950 2800 -Wire Wire Line - 4750 4200 4950 4200 -Wire Wire Line - 5450 4200 5650 4200 -Wire Wire Line - 5950 3300 5950 3650 -Wire Wire Line - 5950 4200 5950 4050 -Connection ~ 5950 5100 -Connection ~ 5950 3450 -Connection ~ 5950 4100 -Wire Wire Line - 5650 4200 5650 3850 -Connection ~ 5650 3850 -Connection ~ 5650 3950 -Wire Wire Line - 6350 5100 4750 5100 -Wire Wire Line - 5950 5200 5950 4700 -$Comp -L IDC i1 -U 1 1 517A17EC -P 4750 4650 -F 0 "i1" H 4550 4750 60 0000 C CNN -F 1 "IDC" H 4550 4600 60 0000 C CNN -F 2 "R1" H 4450 4650 60 0000 C CNN - 1 4750 4650 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG01 -U 1 1 517A1753 -P 5950 5100 -F 0 "#FLG01" H 5950 5370 30 0001 C CNN -F 1 "PWR_FLAG" H 5950 5330 30 0000 C CNN - 1 5950 5100 - 1 0 0 -1 -$EndComp -$Comp -L PWR_FLAG #FLG02 -U 1 1 517A174B -P 5650 3950 -F 0 "#FLG02" H 5650 4220 30 0001 C CNN -F 1 "PWR_FLAG" H 5650 4180 30 0000 C CNN - 1 5650 3950 - 1 0 0 -1 -$EndComp -$Comp -L IPLOT U4 -U 1 1 517A172B -P 5950 4450 -F 0 "U4" H 5800 4550 50 0000 C CNN -F 1 "IPLOT" H 6100 4550 50 0000 C CNN - 1 5950 4450 - 0 -1 -1 0 -$EndComp -$Comp -L IPLOT U2 -U 1 1 517A1709 -P 5200 4200 -F 0 "U2" H 5050 4300 50 0000 C CNN -F 1 "IPLOT" H 5350 4300 50 0000 C CNN - 1 5200 4200 - -1 0 0 1 -$EndComp -$Comp -L IPLOT U3 -U 1 1 517A16C8 -P 5950 3050 -F 0 "U3" H 5800 3150 50 0000 C CNN -F 1 "IPLOT" H 6100 3150 50 0000 C CNN - 1 5950 3050 - 0 1 1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 2 1 5166CA3C -P 5650 4100 -F 0 "U1" H 5500 4200 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 4200 50 0000 C CNN - 2 5650 4100 - 0 -1 -1 0 -$EndComp -$Comp -L VPLOT8_1 U1 -U 1 1 5166C9F3 -P 5650 3450 -F 0 "U1" H 5500 3550 50 0000 C CNN -F 1 "VPLOT8_1" H 5800 3550 50 0000 C CNN - 1 5650 3450 - 0 -1 -1 0 -$EndComp -$Comp -L GND #PWR03 -U 1 1 5166C87D -P 5950 5200 -F 0 "#PWR03" H 5950 5200 30 0001 C CNN -F 1 "GND" H 5950 5130 30 0001 C CNN - 1 5950 5200 - 1 0 0 -1 -$EndComp -$Comp -L DC v1 -U 1 1 5166C79C -P 6350 3750 -F 0 "v1" H 6150 3850 60 0000 C CNN -F 1 "2" H 6150 3700 60 0000 C CNN -F 2 "R1" H 6050 3750 60 0000 C CNN - 1 6350 3750 - 1 0 0 -1 -$EndComp -$Comp -L NPN Q1 -U 1 1 5166C72A -P 5850 3850 -F 0 "Q1" H 5850 3700 50 0000 R CNN -F 1 "NPN" H 5850 4000 50 0000 R CNN - 1 5850 3850 - 1 0 0 -1 -$EndComp -$EndSCHEMATC diff --git a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib b/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib deleted file mode 100644 index 1ff6b05..0000000 --- a/OSCAD/Examples/sedra_smith/chapter_3/example_3.20/npn.lib +++ /dev/null @@ -1,6 +0,0 @@ -.model npn NPN( Vtf=4 Cjc=3.638p Nc=2 Tr=239.5n Ne=1.259 -+ Cje=4.493p Isc=0 Xtb=1.5 Rb=10 Rc=1 -+ Tf=301.2p Xti=3 Ikr=0 Bf=416.4 Fc=.5 -+ Ise=6.734f Br=.7371 Ikf=66.78m Mje=.2593 Mjc=.3085 -+ Vaf=74.03 Vjc=.75 Vje=.75 Xtf=2 Itf=.4 -+ Is=6.734f Eg=1.11 ) |