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| author | Jayaram Pai | 2014-05-19 11:02:57 +0530 |
|---|---|---|
| committer | Jayaram Pai | 2014-05-19 11:02:57 +0530 |
| commit | 8377256e7d90aa7ba1cb51f6164e99f81e2eb53c (patch) | |
| tree | 5afcc8e82d7f7d4f6fbff900520bd8f05eb343ca /OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt | |
| download | FreeEDA-8377256e7d90aa7ba1cb51f6164e99f81e2eb53c.tar.gz FreeEDA-8377256e7d90aa7ba1cb51f6164e99f81e2eb53c.tar.bz2 FreeEDA-8377256e7d90aa7ba1cb51f6164e99f81e2eb53c.zip | |
initial commit
Diffstat (limited to 'OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt')
| -rw-r--r-- | OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt new file mode 100644 index 0000000..543e15f --- /dev/null +++ b/OSCAD/Examples/InvertingAmplifier/InvertingAmplifier.cir.ckt @@ -0,0 +1,13 @@ +* eeschema netlist version 1.1 (spice format) creation date: wednesday 19 december 2012 10:36:45 am ist +.include ua741.sub + +* Plotting option vplot8_1 +x1 2 0 4 ua741 +v1 3 0 sine(0 5 50 0 0) +r3 4 0 10000 +r1 2 3 1000 +r2 4 2 2000 + +.tran 100e-06 40e-03 0e-00 +.plot v(3) v(4) +.end |