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authorfahim-oscad2014-09-26 14:35:16 +0530
committerfahim-oscad2014-09-26 14:35:16 +0530
commita2fcd504370e2922420075d44668eaa452cc1168 (patch)
tree50c20b4156b99a4056a8665a9d169092d3f4f3b1
parent3f60f64ee4efa336a2b933e4b6744dbcbe8393ae (diff)
parentb4aaf84bf6812246dafc8a944790d3984e64dfa7 (diff)
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Merge pull request #1 from ambikeshwar1991/master
sub-circuit bug has been resolved by removing opamp1
-rwxr-xr-xFreeEDA/kicadtoNgspice/KicadtoNgspice.py4
1 files changed, 0 insertions, 4 deletions
diff --git a/FreeEDA/kicadtoNgspice/KicadtoNgspice.py b/FreeEDA/kicadtoNgspice/KicadtoNgspice.py
index 99b8cca..6132dc1 100755
--- a/FreeEDA/kicadtoNgspice/KicadtoNgspice.py
+++ b/FreeEDA/kicadtoNgspice/KicadtoNgspice.py
@@ -2270,10 +2270,6 @@ def convertICintoBasicBlocks(schematicInfo,outputOption,guimodelvalue):
ic=' Enter initial condition on output (default=0): '
print "-----------------------------------------------------------"
guimodelvalue.append([index,compline,compType,compName,Comment,Title,words[1],ic])
- elif compType=="opamp1":
- f = open(FreeEDA_HOME)
- data = f.read()
- schematicInfo.insert(index,data)
elif compType=="transfo":
schematicInfo.append("a"+str(k)+" ("+words[1]+" "+words[2]+") (2mmf "+words[2]+") "+compName+"_primary")
k=k+1