diff options
Diffstat (limited to 'board/pxa255_idp/pxa_reg_calcs.out')
| -rwxr-xr-x | board/pxa255_idp/pxa_reg_calcs.out | 119 |
1 files changed, 119 insertions, 0 deletions
diff --git a/board/pxa255_idp/pxa_reg_calcs.out b/board/pxa255_idp/pxa_reg_calcs.out new file mode 100755 index 0000000..bda9946 --- /dev/null +++ b/board/pxa255_idp/pxa_reg_calcs.out @@ -0,0 +1,119 @@ +gafr0_l: 0x80001005 +gafr0_u: 0xa5128012 +gafr1_l: 0x699a9558 +gafr1_u: 0xaaa5aa6a +gafr2_l: 0xaaaaaaaa +gafr2_u: 0x2 +gpcr0: 0x1800400 +gpcr1: 0x0 +gpcr2: 0x0 +gpdr0: 0xc1818440 +gpdr1: 0xfcffab82 +gpdr2: 0x1ffff +gpsr0: 0x8000 +gpsr1: 0x3f0002 +gpsr2: 0x1c000 + + +#define CFG_GAFR0_L_VAL 0x80001005 +#define CFG_GAFR0_U_VAL 0xa5128012 +#define CFG_GAFR1_L_VAL 0x699a9558 +#define CFG_GAFR1_U_VAL 0xaaa5aa6a +#define CFG_GAFR2_L_VAL 0xaaaaaaaa +#define CFG_GAFR2_U_VAL 0x2 +#define CFG_GPCR0_VAL 0x1800400 +#define CFG_GPCR1_VAL 0x0 +#define CFG_GPCR2_VAL 0x0 +#define CFG_GPDR0_VAL 0xc1818440 +#define CFG_GPDR1_VAL 0xfcffab82 +#define CFG_GPDR2_VAL 0x1ffff +#define CFG_GPSR0_VAL 0x8000 +#define CFG_GPSR1_VAL 0x3f0002 +#define CFG_GPSR2_VAL 0x1c000 + + +GPIO: 0, dir=0, set=0, clr=0, alt=none, desc=USER_RESET# +GPIO: 1, dir=0, set=0, clr=0, alt=gpio reset, desc=USER_RESET# +GPIO: 2, dir=0, set=0, clr=0, alt=gpio, desc=BAT_DATA +GPIO: 3, dir=0, set=0, clr=0, alt=gpio, desc=MQ_IRQ# +GPIO: 4, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_ETH +GPIO: 5, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_TOUCH# +GPIO: 6, dir=1, set=0, clr=0, alt=MMC clk, desc=MMC_CLK +GPIO: 7, dir=0, set=0, clr=0, alt=gpio, desc=PCC_S0_CD# +GPIO: 8, dir=0, set=0, clr=0, alt=gpio, desc=PCC_S1_CD# +GPIO: 9, dir=0, set=0, clr=0, alt=gpio, desc=MMC_CD# +GPIO: 10, dir=1, set=0, clr=1, alt=gpio, desc=GPIO_10/RTC_CLK/debug LED +GPIO: 11, dir=0, set=0, clr=0, alt=gpio, desc=3M6_CLK +GPIO: 12, dir=0, set=0, clr=0, alt=gpio, desc=GPIO_12/32K_CLK +GPIO: 13, dir=0, set=0, clr=0, alt=gpio, desc=MBGNT +GPIO: 14, dir=0, set=0, clr=0, alt=gpio, desc=MBREQ +GPIO: 15, dir=1, set=1, clr=0, alt=nCS_1, desc=CS1# +GPIO: 16, dir=1, set=0, clr=0, alt=PWM0, desc=PWM0 +GPIO: 17, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_AXB +GPIO: 18, dir=0, set=0, clr=0, alt=RDY, desc=RDY +GPIO: 19, dir=0, set=0, clr=0, alt=gpio, desc=XB_DREQ1, PCC_SO_IRQ_O# +GPIO: 20, dir=0, set=0, clr=0, alt=gpio, desc=XB_DREQ0 +GPIO: 21, dir=0, set=0, clr=0, alt=gpio, desc=IRQ_IDE, PFI +GPIO: 22, dir=0, set=0, clr=0, alt=gpio, desc=Consumer IR, PCC_S1_IRQ_O# +GPIO: 23, dir=1, set=0, clr=1, alt=SSP SCLK, desc=SSP_SCLK +GPIO: 24, dir=1, set=0, clr=1, alt=SSP SFRM, desc=SSP_SFRM +GPIO: 25, dir=0, set=0, clr=0, alt=gpio, desc=SSP_TXD +GPIO: 26, dir=0, set=0, clr=0, alt=SSP RXD, desc=SSP_RXD +GPIO: 27, dir=0, set=0, clr=0, alt=gpio, desc=SSP_EXTCLK +GPIO: 28, dir=0, set=0, clr=0, alt=AC97 bitclk in, I2S bitclock out, desc=AC_BITCLK +GPIO: 29, dir=0, set=0, clr=0, alt=AC97 SDATA_IN0, desc=AUD_SDIN0 +GPIO: 30, dir=1, set=0, clr=0, alt=AC97 SDATA_OUT, desc=AC_SDOUT +GPIO: 31, dir=1, set=0, clr=0, alt=AC97 SYNC, desc=AC_SYNC +GPIO: 32, dir=0, set=0, clr=0, alt=gpio, desc=AUD_SDIN1 +GPIO: 33, dir=1, set=1, clr=0, alt=nCS_5, desc=CS5# +GPIO: 34, dir=0, set=0, clr=0, alt=FF RXD, desc=FF_RXD +GPIO: 35, dir=0, set=0, clr=0, alt=FF CTS, desc=FF_CTS +GPIO: 36, dir=0, set=0, clr=0, alt=FF DCD, desc=FF_DCD +GPIO: 37, dir=0, set=0, clr=0, alt=FF DSR, desc=FF_DSR +GPIO: 38, dir=0, set=0, clr=0, alt=FF RI, desc=FF_RI +GPIO: 39, dir=1, set=0, clr=0, alt=FF TXD, desc=FF_TXD +GPIO: 40, dir=1, set=0, clr=0, alt=FF DTR, desc=FF_DTR +GPIO: 41, dir=1, set=0, clr=0, alt=FF RTS, desc=FF_RTS +GPIO: 42, dir=0, set=0, clr=0, alt=BT RXD, desc=BT_RXD +GPIO: 43, dir=1, set=0, clr=0, alt=BT TXD, desc=BT_TXD +GPIO: 44, dir=0, set=0, clr=0, alt=BT CTS, desc=BT_CTS +GPIO: 45, dir=1, set=0, clr=0, alt=BT RTS, desc=BT_RTS +GPIO: 46, dir=0, set=0, clr=0, alt=STD RXD, desc=IR_RXD +GPIO: 47, dir=1, set=0, clr=0, alt=STD TXD, desc=IR_TXD +GPIO: 48, dir=1, set=1, clr=0, alt=nPOE, desc=PCC_OE# +GPIO: 49, dir=1, set=1, clr=0, alt=nPWE, desc=PCC_WE# +GPIO: 50, dir=1, set=1, clr=0, alt=nPIOR, desc=PCC_IOR# +GPIO: 51, dir=1, set=1, clr=0, alt=nPIOW, desc=PCC_IOW# +GPIO: 52, dir=1, set=1, clr=0, alt=nPCE[1], desc=PCC_CE1# +GPIO: 53, dir=1, set=1, clr=0, alt=nPCE[2], desc=PCC_CE2# +GPIO: 54, dir=1, set=0, clr=0, alt=nPSKSEL, desc=PCC_SCKSEL +GPIO: 55, dir=1, set=0, clr=0, alt=nPREG, desc=PCC_REG# +GPIO: 56, dir=0, set=0, clr=0, alt=nPWAIT, desc=PCC_WAIT# +GPIO: 57, dir=0, set=0, clr=0, alt=nIOIS16, desc=PCC_IOIS16# +GPIO: 58, dir=1, set=0, clr=0, alt=LDD[0], desc=LDD0 +GPIO: 59, dir=1, set=0, clr=0, alt=LDD[1], desc=LDD1 +GPIO: 60, dir=1, set=0, clr=0, alt=LDD[2], desc=LDD2 +GPIO: 61, dir=1, set=0, clr=0, alt=LDD[3], desc=LDD3 +GPIO: 62, dir=1, set=0, clr=0, alt=LDD[4], desc=LDD4 +GPIO: 63, dir=1, set=0, clr=0, alt=LDD[5], desc=LDD5 +GPIO: 64, dir=1, set=0, clr=0, alt=LDD[6], desc=LDD6 +GPIO: 65, dir=1, set=0, clr=0, alt=LDD[7], desc=LDD7 +GPIO: 66, dir=1, set=0, clr=0, alt=LDD[8], desc=LDD8 +GPIO: 67, dir=1, set=0, clr=0, alt=LDD[9], desc=LDD9 +GPIO: 68, dir=1, set=0, clr=0, alt=LDD[10], desc=LDD10 +GPIO: 69, dir=1, set=0, clr=0, alt=LDD[11], desc=LDD11 +GPIO: 70, dir=1, set=0, clr=0, alt=LDD[12], desc=LDD12 +GPIO: 71, dir=1, set=0, clr=0, alt=LDD[13], desc=LDD13 +GPIO: 72, dir=1, set=0, clr=0, alt=LDD[14], desc=LDD14 +GPIO: 73, dir=1, set=0, clr=0, alt=LDD[15], desc=LDD15 +GPIO: 74, dir=1, set=0, clr=0, alt=LCD_FCLK, desc=FCLK +GPIO: 75, dir=1, set=0, clr=0, alt=LCD_LCLK, desc=LCLK +GPIO: 76, dir=1, set=0, clr=0, alt=LCD_PCLK, desc=PCLK +GPIO: 77, dir=1, set=0, clr=0, alt=LCD_ACBIAS, desc=ACBIAS +GPIO: 78, dir=1, set=1, clr=0, alt=nCS_2, desc=CS2# +GPIO: 79, dir=1, set=1, clr=0, alt=nCS_3, desc=CS3# +GPIO: 80, dir=1, set=1, clr=0, alt=nCS_4, desc=CS4# +GPIO: 81, dir=0, set=0, clr=0, alt=gpio, desc= +GPIO: 82, dir=0, set=0, clr=0, alt=gpio, desc= +GPIO: 83, dir=0, set=0, clr=0, alt=gpio, desc= +GPIO: 84, dir=0, set=0, clr=0, alt=gpio, desc= |