diff options
Diffstat (limited to 'ANDROID_3.4.5/include/drm')
49 files changed, 0 insertions, 14602 deletions
diff --git a/ANDROID_3.4.5/include/drm/Kbuild b/ANDROID_3.4.5/include/drm/Kbuild deleted file mode 100644 index 1e38a19d..00000000 --- a/ANDROID_3.4.5/include/drm/Kbuild +++ /dev/null @@ -1,15 +0,0 @@ -header-y += drm.h -header-y += drm_fourcc.h -header-y += drm_mode.h -header-y += drm_sarea.h -header-y += exynos_drm.h -header-y += i810_drm.h -header-y += i915_drm.h -header-y += mga_drm.h -header-y += nouveau_drm.h -header-y += r128_drm.h -header-y += radeon_drm.h -header-y += savage_drm.h -header-y += sis_drm.h -header-y += via_drm.h -header-y += vmwgfx_drm.h diff --git a/ANDROID_3.4.5/include/drm/drm.h b/ANDROID_3.4.5/include/drm/drm.h deleted file mode 100644 index 64ff02d5..00000000 --- a/ANDROID_3.4.5/include/drm/drm.h +++ /dev/null @@ -1,824 +0,0 @@ -/** - * \file drm.h - * Header for the Direct Rendering Manager - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * - * \par Acknowledgments: - * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DRM_H_ -#define _DRM_H_ - -#if defined(__linux__) - -#include <linux/types.h> -#include <asm/ioctl.h> -typedef unsigned int drm_handle_t; - -#else /* One of the BSDs */ - -#include <sys/ioccom.h> -#include <sys/types.h> -typedef int8_t __s8; -typedef uint8_t __u8; -typedef int16_t __s16; -typedef uint16_t __u16; -typedef int32_t __s32; -typedef uint32_t __u32; -typedef int64_t __s64; -typedef uint64_t __u64; -typedef unsigned long drm_handle_t; - -#endif - -#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ -#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ -#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ -#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ - -#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ -#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ -#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) -#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) -#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) - -typedef unsigned int drm_context_t; -typedef unsigned int drm_drawable_t; -typedef unsigned int drm_magic_t; - -/** - * Cliprect. - * - * \warning: If you change this structure, make sure you change - * XF86DRIClipRectRec in the server as well - * - * \note KW: Actually it's illegal to change either for - * backwards-compatibility reasons. - */ -struct drm_clip_rect { - unsigned short x1; - unsigned short y1; - unsigned short x2; - unsigned short y2; -}; - -/** - * Drawable information. - */ -struct drm_drawable_info { - unsigned int num_rects; - struct drm_clip_rect *rects; -}; - -/** - * Texture region, - */ -struct drm_tex_region { - unsigned char next; - unsigned char prev; - unsigned char in_use; - unsigned char padding; - unsigned int age; -}; - -/** - * Hardware lock. - * - * The lock structure is a simple cache-line aligned integer. To avoid - * processor bus contention on a multiprocessor system, there should not be any - * other data stored in the same cache line. - */ -struct drm_hw_lock { - __volatile__ unsigned int lock; /**< lock variable */ - char padding[60]; /**< Pad to cache line */ -}; - -/** - * DRM_IOCTL_VERSION ioctl argument type. - * - * \sa drmGetVersion(). - */ -struct drm_version { - int version_major; /**< Major version */ - int version_minor; /**< Minor version */ - int version_patchlevel; /**< Patch level */ - size_t name_len; /**< Length of name buffer */ - char __user *name; /**< Name of driver */ - size_t date_len; /**< Length of date buffer */ - char __user *date; /**< User-space buffer to hold date */ - size_t desc_len; /**< Length of desc buffer */ - char __user *desc; /**< User-space buffer to hold desc */ -}; - -/** - * DRM_IOCTL_GET_UNIQUE ioctl argument type. - * - * \sa drmGetBusid() and drmSetBusId(). - */ -struct drm_unique { - size_t unique_len; /**< Length of unique */ - char __user *unique; /**< Unique name for driver instantiation */ -}; - -struct drm_list { - int count; /**< Length of user-space structures */ - struct drm_version __user *version; -}; - -struct drm_block { - int unused; -}; - -/** - * DRM_IOCTL_CONTROL ioctl argument type. - * - * \sa drmCtlInstHandler() and drmCtlUninstHandler(). - */ -struct drm_control { - enum { - DRM_ADD_COMMAND, - DRM_RM_COMMAND, - DRM_INST_HANDLER, - DRM_UNINST_HANDLER - } func; - int irq; -}; - -/** - * Type of memory to map. - */ -enum drm_map_type { - _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ - _DRM_REGISTERS = 1, /**< no caching, no core dump */ - _DRM_SHM = 2, /**< shared, cached */ - _DRM_AGP = 3, /**< AGP/GART */ - _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ - _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ - _DRM_GEM = 6, /**< GEM object */ -}; - -/** - * Memory mapping flags. - */ -enum drm_map_flags { - _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ - _DRM_READ_ONLY = 0x02, - _DRM_LOCKED = 0x04, /**< shared, cached, locked */ - _DRM_KERNEL = 0x08, /**< kernel requires access */ - _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ - _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ - _DRM_REMOVABLE = 0x40, /**< Removable mapping */ - _DRM_DRIVER = 0x80 /**< Managed by driver */ -}; - -struct drm_ctx_priv_map { - unsigned int ctx_id; /**< Context requesting private mapping */ - void *handle; /**< Handle of map */ -}; - -/** - * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls - * argument type. - * - * \sa drmAddMap(). - */ -struct drm_map { - unsigned long offset; /**< Requested physical address (0 for SAREA)*/ - unsigned long size; /**< Requested physical size (bytes) */ - enum drm_map_type type; /**< Type of memory to map */ - enum drm_map_flags flags; /**< Flags */ - void *handle; /**< User-space: "Handle" to pass to mmap() */ - /**< Kernel-space: kernel-virtual address */ - int mtrr; /**< MTRR slot used */ - /* Private data */ -}; - -/** - * DRM_IOCTL_GET_CLIENT ioctl argument type. - */ -struct drm_client { - int idx; /**< Which client desired? */ - int auth; /**< Is client authenticated? */ - unsigned long pid; /**< Process ID */ - unsigned long uid; /**< User ID */ - unsigned long magic; /**< Magic */ - unsigned long iocs; /**< Ioctl count */ -}; - -enum drm_stat_type { - _DRM_STAT_LOCK, - _DRM_STAT_OPENS, - _DRM_STAT_CLOSES, - _DRM_STAT_IOCTLS, - _DRM_STAT_LOCKS, - _DRM_STAT_UNLOCKS, - _DRM_STAT_VALUE, /**< Generic value */ - _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ - _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ - - _DRM_STAT_IRQ, /**< IRQ */ - _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ - _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ - _DRM_STAT_DMA, /**< DMA */ - _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ - _DRM_STAT_MISSED /**< Missed DMA opportunity */ - /* Add to the *END* of the list */ -}; - -/** - * DRM_IOCTL_GET_STATS ioctl argument type. - */ -struct drm_stats { - unsigned long count; - struct { - unsigned long value; - enum drm_stat_type type; - } data[15]; -}; - -/** - * Hardware locking flags. - */ -enum drm_lock_flags { - _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ - _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ - _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ - _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ - /* These *HALT* flags aren't supported yet - -- they will be used to support the - full-screen DGA-like mode. */ - _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ - _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ -}; - -/** - * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. - * - * \sa drmGetLock() and drmUnlock(). - */ -struct drm_lock { - int context; - enum drm_lock_flags flags; -}; - -/** - * DMA flags - * - * \warning - * These values \e must match xf86drm.h. - * - * \sa drm_dma. - */ -enum drm_dma_flags { - /* Flags for DMA buffer dispatch */ - _DRM_DMA_BLOCK = 0x01, /**< - * Block until buffer dispatched. - * - * \note The buffer may not yet have - * been processed by the hardware -- - * getting a hardware lock with the - * hardware quiescent will ensure - * that the buffer has been - * processed. - */ - _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ - _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ - - /* Flags for DMA buffer request */ - _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ - _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ - _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ -}; - -/** - * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. - * - * \sa drmAddBufs(). - */ -struct drm_buf_desc { - int count; /**< Number of buffers of this size */ - int size; /**< Size in bytes */ - int low_mark; /**< Low water mark */ - int high_mark; /**< High water mark */ - enum { - _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ - _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ - _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ - _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ - _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ - } flags; - unsigned long agp_start; /**< - * Start address of where the AGP buffers are - * in the AGP aperture - */ -}; - -/** - * DRM_IOCTL_INFO_BUFS ioctl argument type. - */ -struct drm_buf_info { - int count; /**< Entries in list */ - struct drm_buf_desc __user *list; -}; - -/** - * DRM_IOCTL_FREE_BUFS ioctl argument type. - */ -struct drm_buf_free { - int count; - int __user *list; -}; - -/** - * Buffer information - * - * \sa drm_buf_map. - */ -struct drm_buf_pub { - int idx; /**< Index into the master buffer list */ - int total; /**< Buffer size */ - int used; /**< Amount of buffer in use (for DMA) */ - void __user *address; /**< Address of buffer */ -}; - -/** - * DRM_IOCTL_MAP_BUFS ioctl argument type. - */ -struct drm_buf_map { - int count; /**< Length of the buffer list */ - void __user *virtual; /**< Mmap'd area in user-virtual */ - struct drm_buf_pub __user *list; /**< Buffer information */ -}; - -/** - * DRM_IOCTL_DMA ioctl argument type. - * - * Indices here refer to the offset into the buffer list in drm_buf_get. - * - * \sa drmDMA(). - */ -struct drm_dma { - int context; /**< Context handle */ - int send_count; /**< Number of buffers to send */ - int __user *send_indices; /**< List of handles to buffers */ - int __user *send_sizes; /**< Lengths of data to send */ - enum drm_dma_flags flags; /**< Flags */ - int request_count; /**< Number of buffers requested */ - int request_size; /**< Desired size for buffers */ - int __user *request_indices; /**< Buffer information */ - int __user *request_sizes; - int granted_count; /**< Number of buffers granted */ -}; - -enum drm_ctx_flags { - _DRM_CONTEXT_PRESERVED = 0x01, - _DRM_CONTEXT_2DONLY = 0x02 -}; - -/** - * DRM_IOCTL_ADD_CTX ioctl argument type. - * - * \sa drmCreateContext() and drmDestroyContext(). - */ -struct drm_ctx { - drm_context_t handle; - enum drm_ctx_flags flags; -}; - -/** - * DRM_IOCTL_RES_CTX ioctl argument type. - */ -struct drm_ctx_res { - int count; - struct drm_ctx __user *contexts; -}; - -/** - * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. - */ -struct drm_draw { - drm_drawable_t handle; -}; - -/** - * DRM_IOCTL_UPDATE_DRAW ioctl argument type. - */ -typedef enum { - DRM_DRAWABLE_CLIPRECTS, -} drm_drawable_info_type_t; - -struct drm_update_draw { - drm_drawable_t handle; - unsigned int type; - unsigned int num; - unsigned long long data; -}; - -/** - * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. - */ -struct drm_auth { - drm_magic_t magic; -}; - -/** - * DRM_IOCTL_IRQ_BUSID ioctl argument type. - * - * \sa drmGetInterruptFromBusID(). - */ -struct drm_irq_busid { - int irq; /**< IRQ number */ - int busnum; /**< bus number */ - int devnum; /**< device number */ - int funcnum; /**< function number */ -}; - -enum drm_vblank_seq_type { - _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ - _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ - /* bits 1-6 are reserved for high crtcs */ - _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, - _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ - _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ - _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ - _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ - _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ -}; -#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 - -#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) -#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ - _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS) - -struct drm_wait_vblank_request { - enum drm_vblank_seq_type type; - unsigned int sequence; - unsigned long signal; -}; - -struct drm_wait_vblank_reply { - enum drm_vblank_seq_type type; - unsigned int sequence; - long tval_sec; - long tval_usec; -}; - -/** - * DRM_IOCTL_WAIT_VBLANK ioctl argument type. - * - * \sa drmWaitVBlank(). - */ -union drm_wait_vblank { - struct drm_wait_vblank_request request; - struct drm_wait_vblank_reply reply; -}; - -#define _DRM_PRE_MODESET 1 -#define _DRM_POST_MODESET 2 - -/** - * DRM_IOCTL_MODESET_CTL ioctl argument type - * - * \sa drmModesetCtl(). - */ -struct drm_modeset_ctl { - __u32 crtc; - __u32 cmd; -}; - -/** - * DRM_IOCTL_AGP_ENABLE ioctl argument type. - * - * \sa drmAgpEnable(). - */ -struct drm_agp_mode { - unsigned long mode; /**< AGP mode */ -}; - -/** - * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. - * - * \sa drmAgpAlloc() and drmAgpFree(). - */ -struct drm_agp_buffer { - unsigned long size; /**< In bytes -- will round to page boundary */ - unsigned long handle; /**< Used for binding / unbinding */ - unsigned long type; /**< Type of memory to allocate */ - unsigned long physical; /**< Physical used by i810 */ -}; - -/** - * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. - * - * \sa drmAgpBind() and drmAgpUnbind(). - */ -struct drm_agp_binding { - unsigned long handle; /**< From drm_agp_buffer */ - unsigned long offset; /**< In bytes -- will round to page boundary */ -}; - -/** - * DRM_IOCTL_AGP_INFO ioctl argument type. - * - * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), - * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), - * drmAgpVendorId() and drmAgpDeviceId(). - */ -struct drm_agp_info { - int agp_version_major; - int agp_version_minor; - unsigned long mode; - unsigned long aperture_base; /* physical address */ - unsigned long aperture_size; /* bytes */ - unsigned long memory_allowed; /* bytes */ - unsigned long memory_used; - - /* PCI information */ - unsigned short id_vendor; - unsigned short id_device; -}; - -/** - * DRM_IOCTL_SG_ALLOC ioctl argument type. - */ -struct drm_scatter_gather { - unsigned long size; /**< In bytes -- will round to page boundary */ - unsigned long handle; /**< Used for mapping / unmapping */ -}; - -/** - * DRM_IOCTL_SET_VERSION ioctl argument type. - */ -struct drm_set_version { - int drm_di_major; - int drm_di_minor; - int drm_dd_major; - int drm_dd_minor; -}; - -/** DRM_IOCTL_GEM_CLOSE ioctl argument type */ -struct drm_gem_close { - /** Handle of the object to be closed. */ - __u32 handle; - __u32 pad; -}; - -/** DRM_IOCTL_GEM_FLINK ioctl argument type */ -struct drm_gem_flink { - /** Handle for the object being named */ - __u32 handle; - - /** Returned global name */ - __u32 name; -}; - -/** DRM_IOCTL_GEM_OPEN ioctl argument type */ -struct drm_gem_open { - /** Name of object being opened */ - __u32 name; - - /** Returned handle for the object */ - __u32 handle; - - /** Returned size of the object */ - __u64 size; -}; - -/** DRM_IOCTL_GET_CAP ioctl argument type */ -struct drm_get_cap { - __u64 capability; - __u64 value; -}; - -#define DRM_CLOEXEC O_CLOEXEC -struct drm_prime_handle { - __u32 handle; - - /** Flags.. only applicable for handle->fd */ - __u32 flags; - - /** Returned dmabuf file descriptor */ - __s32 fd; -}; - -#include "drm_mode.h" - -#define DRM_IOCTL_BASE 'd' -#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) -#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) -#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) -#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) - -#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) -#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) -#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) -#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) -#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) -#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) -#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) -#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) -#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) -#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) -#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) -#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) -#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) - -#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) -#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) -#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) -#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) -#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) -#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) -#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) -#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) -#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) -#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) -#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) - -#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) - -#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) -#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) - -#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e) -#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f) - -#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) -#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) -#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) -#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) -#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) -#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) -#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) -#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) -#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) -#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) -#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) -#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) -#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) - -#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) -#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) - -#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) -#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) -#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) -#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) -#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) -#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) -#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) -#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) - -#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) -#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) - -#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) - -#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) - -#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) -#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) -#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc) -#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor) -#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut) -#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) -#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) -#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) -#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) -#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) - -#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) -#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) -#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob) -#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) -#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) -#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) -#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) -#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) - -#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) -#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) -#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) -#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) -#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) -#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) -#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) - -/** - * Device specific ioctls should only be in their respective headers - * The device specific ioctl range is from 0x40 to 0x99. - * Generic IOCTLS restart at 0xA0. - * - * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and - * drmCommandReadWrite(). - */ -#define DRM_COMMAND_BASE 0x40 -#define DRM_COMMAND_END 0xA0 - -/** - * Header for events written back to userspace on the drm fd. The - * type defines the type of event, the length specifies the total - * length of the event (including the header), and user_data is - * typically a 64 bit value passed with the ioctl that triggered the - * event. A read on the drm fd will always only return complete - * events, that is, if for example the read buffer is 100 bytes, and - * there are two 64 byte events pending, only one will be returned. - * - * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and - * up are chipset specific. - */ -struct drm_event { - __u32 type; - __u32 length; -}; - -#define DRM_EVENT_VBLANK 0x01 -#define DRM_EVENT_FLIP_COMPLETE 0x02 - -struct drm_event_vblank { - struct drm_event base; - __u64 user_data; - __u32 tv_sec; - __u32 tv_usec; - __u32 sequence; - __u32 reserved; -}; - -#define DRM_CAP_DUMB_BUFFER 0x1 -#define DRM_CAP_VBLANK_HIGH_CRTC 0x2 -#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 -#define DRM_CAP_DUMB_PREFER_SHADOW 0x4 - -/* typedef area */ -#ifndef __KERNEL__ -typedef struct drm_clip_rect drm_clip_rect_t; -typedef struct drm_drawable_info drm_drawable_info_t; -typedef struct drm_tex_region drm_tex_region_t; -typedef struct drm_hw_lock drm_hw_lock_t; -typedef struct drm_version drm_version_t; -typedef struct drm_unique drm_unique_t; -typedef struct drm_list drm_list_t; -typedef struct drm_block drm_block_t; -typedef struct drm_control drm_control_t; -typedef enum drm_map_type drm_map_type_t; -typedef enum drm_map_flags drm_map_flags_t; -typedef struct drm_ctx_priv_map drm_ctx_priv_map_t; -typedef struct drm_map drm_map_t; -typedef struct drm_client drm_client_t; -typedef enum drm_stat_type drm_stat_type_t; -typedef struct drm_stats drm_stats_t; -typedef enum drm_lock_flags drm_lock_flags_t; -typedef struct drm_lock drm_lock_t; -typedef enum drm_dma_flags drm_dma_flags_t; -typedef struct drm_buf_desc drm_buf_desc_t; -typedef struct drm_buf_info drm_buf_info_t; -typedef struct drm_buf_free drm_buf_free_t; -typedef struct drm_buf_pub drm_buf_pub_t; -typedef struct drm_buf_map drm_buf_map_t; -typedef struct drm_dma drm_dma_t; -typedef union drm_wait_vblank drm_wait_vblank_t; -typedef struct drm_agp_mode drm_agp_mode_t; -typedef enum drm_ctx_flags drm_ctx_flags_t; -typedef struct drm_ctx drm_ctx_t; -typedef struct drm_ctx_res drm_ctx_res_t; -typedef struct drm_draw drm_draw_t; -typedef struct drm_update_draw drm_update_draw_t; -typedef struct drm_auth drm_auth_t; -typedef struct drm_irq_busid drm_irq_busid_t; -typedef enum drm_vblank_seq_type drm_vblank_seq_type_t; - -typedef struct drm_agp_buffer drm_agp_buffer_t; -typedef struct drm_agp_binding drm_agp_binding_t; -typedef struct drm_agp_info drm_agp_info_t; -typedef struct drm_scatter_gather drm_scatter_gather_t; -typedef struct drm_set_version drm_set_version_t; -#endif - -#endif diff --git a/ANDROID_3.4.5/include/drm/drmP.h b/ANDROID_3.4.5/include/drm/drmP.h deleted file mode 100644 index dd731043..00000000 --- a/ANDROID_3.4.5/include/drm/drmP.h +++ /dev/null @@ -1,1778 +0,0 @@ -/** - * \file drmP.h - * Private header for Direct Rendering Manager - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * Copyright (c) 2009-2010, Code Aurora Forum. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DRM_P_H_ -#define _DRM_P_H_ - -#ifdef __KERNEL__ -#ifdef __alpha__ -/* add include of current.h so that "current" is defined - * before static inline funcs in wait.h. Doing this so we - * can build the DRM (part of PI DRI). 4/21/2000 S + B */ -#include <asm/current.h> -#endif /* __alpha__ */ -#include <linux/kernel.h> -#include <linux/miscdevice.h> -#include <linux/fs.h> -#include <linux/proc_fs.h> -#include <linux/init.h> -#include <linux/file.h> -#include <linux/platform_device.h> -#include <linux/pci.h> -#include <linux/jiffies.h> -#include <linux/dma-mapping.h> -#include <linux/mm.h> -#include <linux/cdev.h> -#include <linux/mutex.h> -#include <linux/slab.h> -#if defined(__alpha__) || defined(__powerpc__) -#include <asm/pgtable.h> /* For pte_wrprotect */ -#endif -#include <asm/io.h> -#include <asm/mman.h> -#include <asm/uaccess.h> -#ifdef CONFIG_MTRR -#include <asm/mtrr.h> -#endif -#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE) -#include <linux/types.h> -#include <linux/agp_backend.h> -#endif -#include <linux/workqueue.h> -#include <linux/poll.h> -#include <asm/pgalloc.h> -#include "drm.h" - -#include <linux/idr.h> - -#define __OS_HAS_AGP (defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE))) -#define __OS_HAS_MTRR (defined(CONFIG_MTRR)) - -struct module; - -struct drm_file; -struct drm_device; - -#include "drm_os_linux.h" -#include "drm_hashtab.h" -#include "drm_mm.h" - -#define DRM_UT_CORE 0x01 -#define DRM_UT_DRIVER 0x02 -#define DRM_UT_KMS 0x04 -#define DRM_UT_PRIME 0x08 -/* - * Three debug levels are defined. - * drm_core, drm_driver, drm_kms - * drm_core level can be used in the generic drm code. For example: - * drm_ioctl, drm_mm, drm_memory - * The macro definition of DRM_DEBUG is used. - * DRM_DEBUG(fmt, args...) - * The debug info by using the DRM_DEBUG can be obtained by adding - * the boot option of "drm.debug=1". - * - * drm_driver level can be used in the specific drm driver. It is used - * to add the debug info related with the drm driver. For example: - * i915_drv, i915_dma, i915_gem, radeon_drv, - * The macro definition of DRM_DEBUG_DRIVER can be used. - * DRM_DEBUG_DRIVER(fmt, args...) - * The debug info by using the DRM_DEBUG_DRIVER can be obtained by - * adding the boot option of "drm.debug=0x02" - * - * drm_kms level can be used in the KMS code related with specific drm driver. - * It is used to add the debug info related with KMS mode. For example: - * the connector/crtc , - * The macro definition of DRM_DEBUG_KMS can be used. - * DRM_DEBUG_KMS(fmt, args...) - * The debug info by using the DRM_DEBUG_KMS can be obtained by - * adding the boot option of "drm.debug=0x04" - * - * If we add the boot option of "drm.debug=0x06", we can get the debug info by - * using the DRM_DEBUG_KMS and DRM_DEBUG_DRIVER. - * If we add the boot option of "drm.debug=0x05", we can get the debug info by - * using the DRM_DEBUG_KMS and DRM_DEBUG. - */ - -extern __printf(4, 5) -void drm_ut_debug_printk(unsigned int request_level, - const char *prefix, - const char *function_name, - const char *format, ...); -extern __printf(2, 3) -int drm_err(const char *func, const char *format, ...); - -/***********************************************************************/ -/** \name DRM template customization defaults */ -/*@{*/ - -/* driver capabilities and requirements mask */ -#define DRIVER_USE_AGP 0x1 -#define DRIVER_REQUIRE_AGP 0x2 -#define DRIVER_USE_MTRR 0x4 -#define DRIVER_PCI_DMA 0x8 -#define DRIVER_SG 0x10 -#define DRIVER_HAVE_DMA 0x20 -#define DRIVER_HAVE_IRQ 0x40 -#define DRIVER_IRQ_SHARED 0x80 -#define DRIVER_IRQ_VBL 0x100 -#define DRIVER_DMA_QUEUE 0x200 -#define DRIVER_FB_DMA 0x400 -#define DRIVER_IRQ_VBL2 0x800 -#define DRIVER_GEM 0x1000 -#define DRIVER_MODESET 0x2000 -#define DRIVER_PRIME 0x4000 - -#define DRIVER_BUS_PCI 0x1 -#define DRIVER_BUS_PLATFORM 0x2 -#define DRIVER_BUS_USB 0x3 - -/***********************************************************************/ -/** \name Begin the DRM... */ -/*@{*/ - -#define DRM_DEBUG_CODE 2 /**< Include debugging code if > 1, then - also include looping detection. */ - -#define DRM_MAGIC_HASH_ORDER 4 /**< Size of key hash table. Must be power of 2. */ -#define DRM_KERNEL_CONTEXT 0 /**< Change drm_resctx if changed */ -#define DRM_RESERVED_CONTEXTS 1 /**< Change drm_resctx if changed */ -#define DRM_LOOPING_LIMIT 5000000 -#define DRM_TIME_SLICE (HZ/20) /**< Time slice for GLXContexts */ -#define DRM_LOCK_SLICE 1 /**< Time slice for lock, in jiffies */ - -#define DRM_FLAG_DEBUG 0x01 - -#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8) -#define DRM_MAP_HASH_OFFSET 0x10000000 - -/*@}*/ - -/***********************************************************************/ -/** \name Macros to make printk easier */ -/*@{*/ - -/** - * Error output. - * - * \param fmt printf() like format string. - * \param arg arguments - */ -#define DRM_ERROR(fmt, ...) \ - drm_err(__func__, fmt, ##__VA_ARGS__) - -#define DRM_INFO(fmt, ...) \ - printk(KERN_INFO "[" DRM_NAME "] " fmt, ##__VA_ARGS__) - -/** - * Debug output. - * - * \param fmt printf() like format string. - * \param arg arguments - */ -#if DRM_DEBUG_CODE -#define DRM_DEBUG(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_CORE, DRM_NAME, \ - __func__, fmt, ##args); \ - } while (0) - -#define DRM_DEBUG_DRIVER(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_DRIVER, DRM_NAME, \ - __func__, fmt, ##args); \ - } while (0) -#define DRM_DEBUG_KMS(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_KMS, DRM_NAME, \ - __func__, fmt, ##args); \ - } while (0) -#define DRM_DEBUG_PRIME(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_PRIME, DRM_NAME, \ - __func__, fmt, ##args); \ - } while (0) -#define DRM_LOG(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_CORE, NULL, \ - NULL, fmt, ##args); \ - } while (0) -#define DRM_LOG_KMS(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_KMS, NULL, \ - NULL, fmt, ##args); \ - } while (0) -#define DRM_LOG_MODE(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_MODE, NULL, \ - NULL, fmt, ##args); \ - } while (0) -#define DRM_LOG_DRIVER(fmt, args...) \ - do { \ - drm_ut_debug_printk(DRM_UT_DRIVER, NULL, \ - NULL, fmt, ##args); \ - } while (0) -#else -#define DRM_DEBUG_DRIVER(fmt, args...) do { } while (0) -#define DRM_DEBUG_KMS(fmt, args...) do { } while (0) -#define DRM_DEBUG_PRIME(fmt, args...) do { } while (0) -#define DRM_DEBUG(fmt, arg...) do { } while (0) -#define DRM_LOG(fmt, arg...) do { } while (0) -#define DRM_LOG_KMS(fmt, args...) do { } while (0) -#define DRM_LOG_MODE(fmt, arg...) do { } while (0) -#define DRM_LOG_DRIVER(fmt, arg...) do { } while (0) - -#endif - -/*@}*/ - -/***********************************************************************/ -/** \name Internal types and structures */ -/*@{*/ - -#define DRM_ARRAY_SIZE(x) ARRAY_SIZE(x) - -#define DRM_LEFTCOUNT(x) (((x)->rp + (x)->count - (x)->wp) % ((x)->count + 1)) -#define DRM_BUFCOUNT(x) ((x)->count - DRM_LEFTCOUNT(x)) - -#define DRM_IF_VERSION(maj, min) (maj << 16 | min) - -/** - * Test that the hardware lock is held by the caller, returning otherwise. - * - * \param dev DRM device. - * \param filp file pointer of the caller. - */ -#define LOCK_TEST_WITH_RETURN( dev, _file_priv ) \ -do { \ - if (!_DRM_LOCK_IS_HELD(_file_priv->master->lock.hw_lock->lock) || \ - _file_priv->master->lock.file_priv != _file_priv) { \ - DRM_ERROR( "%s called without lock held, held %d owner %p %p\n",\ - __func__, _DRM_LOCK_IS_HELD(_file_priv->master->lock.hw_lock->lock),\ - _file_priv->master->lock.file_priv, _file_priv); \ - return -EINVAL; \ - } \ -} while (0) - -/** - * Ioctl function type. - * - * \param inode device inode. - * \param file_priv DRM file private pointer. - * \param cmd command. - * \param arg argument. - */ -typedef int drm_ioctl_t(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -typedef int drm_ioctl_compat_t(struct file *filp, unsigned int cmd, - unsigned long arg); - -#define DRM_IOCTL_NR(n) _IOC_NR(n) -#define DRM_MAJOR 226 - -#define DRM_AUTH 0x1 -#define DRM_MASTER 0x2 -#define DRM_ROOT_ONLY 0x4 -#define DRM_CONTROL_ALLOW 0x8 -#define DRM_UNLOCKED 0x10 - -struct drm_ioctl_desc { - unsigned int cmd; - int flags; - drm_ioctl_t *func; - unsigned int cmd_drv; -}; - -/** - * Creates a driver or general drm_ioctl_desc array entry for the given - * ioctl, for use by drm_ioctl(). - */ - -#define DRM_IOCTL_DEF_DRV(ioctl, _func, _flags) \ - [DRM_IOCTL_NR(DRM_##ioctl)] = {.cmd = DRM_##ioctl, .func = _func, .flags = _flags, .cmd_drv = DRM_IOCTL_##ioctl} - -struct drm_magic_entry { - struct list_head head; - struct drm_hash_item hash_item; - struct drm_file *priv; -}; - -struct drm_vma_entry { - struct list_head head; - struct vm_area_struct *vma; - pid_t pid; -}; - -/** - * DMA buffer. - */ -struct drm_buf { - int idx; /**< Index into master buflist */ - int total; /**< Buffer size */ - int order; /**< log-base-2(total) */ - int used; /**< Amount of buffer in use (for DMA) */ - unsigned long offset; /**< Byte offset (used internally) */ - void *address; /**< Address of buffer */ - unsigned long bus_address; /**< Bus address of buffer */ - struct drm_buf *next; /**< Kernel-only: used for free list */ - __volatile__ int waiting; /**< On kernel DMA queue */ - __volatile__ int pending; /**< On hardware DMA queue */ - wait_queue_head_t dma_wait; /**< Processes waiting */ - struct drm_file *file_priv; /**< Private of holding file descr */ - int context; /**< Kernel queue for this buffer */ - int while_locked; /**< Dispatch this buffer while locked */ - enum { - DRM_LIST_NONE = 0, - DRM_LIST_FREE = 1, - DRM_LIST_WAIT = 2, - DRM_LIST_PEND = 3, - DRM_LIST_PRIO = 4, - DRM_LIST_RECLAIM = 5 - } list; /**< Which list we're on */ - - int dev_priv_size; /**< Size of buffer private storage */ - void *dev_private; /**< Per-buffer private storage */ -}; - -/** bufs is one longer than it has to be */ -struct drm_waitlist { - int count; /**< Number of possible buffers */ - struct drm_buf **bufs; /**< List of pointers to buffers */ - struct drm_buf **rp; /**< Read pointer */ - struct drm_buf **wp; /**< Write pointer */ - struct drm_buf **end; /**< End pointer */ - spinlock_t read_lock; - spinlock_t write_lock; -}; - -struct drm_freelist { - int initialized; /**< Freelist in use */ - atomic_t count; /**< Number of free buffers */ - struct drm_buf *next; /**< End pointer */ - - wait_queue_head_t waiting; /**< Processes waiting on free bufs */ - int low_mark; /**< Low water mark */ - int high_mark; /**< High water mark */ - atomic_t wfh; /**< If waiting for high mark */ - spinlock_t lock; -}; - -typedef struct drm_dma_handle { - dma_addr_t busaddr; - void *vaddr; - size_t size; -} drm_dma_handle_t; - -/** - * Buffer entry. There is one of this for each buffer size order. - */ -struct drm_buf_entry { - int buf_size; /**< size */ - int buf_count; /**< number of buffers */ - struct drm_buf *buflist; /**< buffer list */ - int seg_count; - int page_order; - struct drm_dma_handle **seglist; - - struct drm_freelist freelist; -}; - -/* Event queued up for userspace to read */ -struct drm_pending_event { - struct drm_event *event; - struct list_head link; - struct drm_file *file_priv; - pid_t pid; /* pid of requester, no guarantee it's valid by the time - we deliver the event, for tracing only */ - void (*destroy)(struct drm_pending_event *event); -}; - -/* initial implementaton using a linked list - todo hashtab */ -struct drm_prime_file_private { - struct list_head head; - struct mutex lock; -}; - -/** File private data */ -struct drm_file { - int authenticated; - pid_t pid; - uid_t uid; - drm_magic_t magic; - unsigned long ioctl_count; - struct list_head lhead; - struct drm_minor *minor; - unsigned long lock_count; - - /** Mapping of mm object handles to object pointers. */ - struct idr object_idr; - /** Lock for synchronization of access to object_idr. */ - spinlock_t table_lock; - - struct file *filp; - void *driver_priv; - - int is_master; /* this file private is a master for a minor */ - struct drm_master *master; /* master this node is currently associated with - N.B. not always minor->master */ - struct list_head fbs; - - wait_queue_head_t event_wait; - struct list_head event_list; - int event_space; - - struct drm_prime_file_private prime; -}; - -/** Wait queue */ -struct drm_queue { - atomic_t use_count; /**< Outstanding uses (+1) */ - atomic_t finalization; /**< Finalization in progress */ - atomic_t block_count; /**< Count of processes waiting */ - atomic_t block_read; /**< Queue blocked for reads */ - wait_queue_head_t read_queue; /**< Processes waiting on block_read */ - atomic_t block_write; /**< Queue blocked for writes */ - wait_queue_head_t write_queue; /**< Processes waiting on block_write */ - atomic_t total_queued; /**< Total queued statistic */ - atomic_t total_flushed; /**< Total flushes statistic */ - atomic_t total_locks; /**< Total locks statistics */ - enum drm_ctx_flags flags; /**< Context preserving and 2D-only */ - struct drm_waitlist waitlist; /**< Pending buffers */ - wait_queue_head_t flush_queue; /**< Processes waiting until flush */ -}; - -/** - * Lock data. - */ -struct drm_lock_data { - struct drm_hw_lock *hw_lock; /**< Hardware lock */ - /** Private of lock holder's file (NULL=kernel) */ - struct drm_file *file_priv; - wait_queue_head_t lock_queue; /**< Queue of blocked processes */ - unsigned long lock_time; /**< Time of last lock in jiffies */ - spinlock_t spinlock; - uint32_t kernel_waiters; - uint32_t user_waiters; - int idle_has_lock; -}; - -/** - * DMA data. - */ -struct drm_device_dma { - - struct drm_buf_entry bufs[DRM_MAX_ORDER + 1]; /**< buffers, grouped by their size order */ - int buf_count; /**< total number of buffers */ - struct drm_buf **buflist; /**< Vector of pointers into drm_device_dma::bufs */ - int seg_count; - int page_count; /**< number of pages */ - unsigned long *pagelist; /**< page list */ - unsigned long byte_count; - enum { - _DRM_DMA_USE_AGP = 0x01, - _DRM_DMA_USE_SG = 0x02, - _DRM_DMA_USE_FB = 0x04, - _DRM_DMA_USE_PCI_RO = 0x08 - } flags; - -}; - -/** - * AGP memory entry. Stored as a doubly linked list. - */ -struct drm_agp_mem { - unsigned long handle; /**< handle */ - DRM_AGP_MEM *memory; - unsigned long bound; /**< address */ - int pages; - struct list_head head; -}; - -/** - * AGP data. - * - * \sa drm_agp_init() and drm_device::agp. - */ -struct drm_agp_head { - DRM_AGP_KERN agp_info; /**< AGP device information */ - struct list_head memory; - unsigned long mode; /**< AGP mode */ - struct agp_bridge_data *bridge; - int enabled; /**< whether the AGP bus as been enabled */ - int acquired; /**< whether the AGP device has been acquired */ - unsigned long base; - int agp_mtrr; - int cant_use_aperture; - unsigned long page_mask; -}; - -/** - * Scatter-gather memory. - */ -struct drm_sg_mem { - unsigned long handle; - void *virtual; - int pages; - struct page **pagelist; - dma_addr_t *busaddr; -}; - -struct drm_sigdata { - int context; - struct drm_hw_lock *lock; -}; - - -/** - * Kernel side of a mapping - */ -struct drm_local_map { - resource_size_t offset; /**< Requested physical address (0 for SAREA)*/ - unsigned long size; /**< Requested physical size (bytes) */ - enum drm_map_type type; /**< Type of memory to map */ - enum drm_map_flags flags; /**< Flags */ - void *handle; /**< User-space: "Handle" to pass to mmap() */ - /**< Kernel-space: kernel-virtual address */ - int mtrr; /**< MTRR slot used */ -}; - -typedef struct drm_local_map drm_local_map_t; - -/** - * Mappings list - */ -struct drm_map_list { - struct list_head head; /**< list head */ - struct drm_hash_item hash; - struct drm_local_map *map; /**< mapping */ - uint64_t user_token; - struct drm_master *master; - struct drm_mm_node *file_offset_node; /**< fake offset */ -}; - -/** - * Context handle list - */ -struct drm_ctx_list { - struct list_head head; /**< list head */ - drm_context_t handle; /**< context handle */ - struct drm_file *tag; /**< associated fd private data */ -}; - -/* location of GART table */ -#define DRM_ATI_GART_MAIN 1 -#define DRM_ATI_GART_FB 2 - -#define DRM_ATI_GART_PCI 1 -#define DRM_ATI_GART_PCIE 2 -#define DRM_ATI_GART_IGP 3 - -struct drm_ati_pcigart_info { - int gart_table_location; - int gart_reg_if; - void *addr; - dma_addr_t bus_addr; - dma_addr_t table_mask; - struct drm_dma_handle *table_handle; - struct drm_local_map mapping; - int table_size; -}; - -/** - * GEM specific mm private for tracking GEM objects - */ -struct drm_gem_mm { - struct drm_mm offset_manager; /**< Offset mgmt for buffer objects */ - struct drm_open_hash offset_hash; /**< User token hash table for maps */ -}; - -/** - * This structure defines the drm_mm memory object, which will be used by the - * DRM for its buffer objects. - */ -struct drm_gem_object { - /** Reference count of this object */ - struct kref refcount; - - /** Handle count of this object. Each handle also holds a reference */ - atomic_t handle_count; /* number of handles on this object */ - - /** Related drm device */ - struct drm_device *dev; - - /** File representing the shmem storage */ - struct file *filp; - - /* Mapping info for this object */ - struct drm_map_list map_list; - - /** - * Size of the object, in bytes. Immutable over the object's - * lifetime. - */ - size_t size; - - /** - * Global name for this object, starts at 1. 0 means unnamed. - * Access is covered by the object_name_lock in the related drm_device - */ - int name; - - /** - * Memory domains. These monitor which caches contain read/write data - * related to the object. When transitioning from one set of domains - * to another, the driver is called to ensure that caches are suitably - * flushed and invalidated - */ - uint32_t read_domains; - uint32_t write_domain; - - /** - * While validating an exec operation, the - * new read/write domain values are computed here. - * They will be transferred to the above values - * at the point that any cache flushing occurs - */ - uint32_t pending_read_domains; - uint32_t pending_write_domain; - - void *driver_private; - - /* dma buf exported from this GEM object */ - struct dma_buf *export_dma_buf; - - /* dma buf attachment backing this object */ - struct dma_buf_attachment *import_attach; -}; - -#include "drm_crtc.h" - -/* per-master structure */ -struct drm_master { - - struct kref refcount; /* refcount for this master */ - - struct list_head head; /**< each minor contains a list of masters */ - struct drm_minor *minor; /**< link back to minor we are a master for */ - - char *unique; /**< Unique identifier: e.g., busid */ - int unique_len; /**< Length of unique field */ - int unique_size; /**< amount allocated */ - - int blocked; /**< Blocked due to VC switch? */ - - /** \name Authentication */ - /*@{ */ - struct drm_open_hash magiclist; - struct list_head magicfree; - /*@} */ - - struct drm_lock_data lock; /**< Information on hardware lock */ - - void *driver_priv; /**< Private structure for driver to use */ -}; - -/* Size of ringbuffer for vblank timestamps. Just double-buffer - * in initial implementation. - */ -#define DRM_VBLANKTIME_RBSIZE 2 - -/* Flags and return codes for get_vblank_timestamp() driver function. */ -#define DRM_CALLED_FROM_VBLIRQ 1 -#define DRM_VBLANKTIME_SCANOUTPOS_METHOD (1 << 0) -#define DRM_VBLANKTIME_INVBL (1 << 1) - -/* get_scanout_position() return flags */ -#define DRM_SCANOUTPOS_VALID (1 << 0) -#define DRM_SCANOUTPOS_INVBL (1 << 1) -#define DRM_SCANOUTPOS_ACCURATE (1 << 2) - -struct drm_bus { - int bus_type; - int (*get_irq)(struct drm_device *dev); - const char *(*get_name)(struct drm_device *dev); - int (*set_busid)(struct drm_device *dev, struct drm_master *master); - int (*set_unique)(struct drm_device *dev, struct drm_master *master, - struct drm_unique *unique); - int (*irq_by_busid)(struct drm_device *dev, struct drm_irq_busid *p); - /* hooks that are for PCI */ - int (*agp_init)(struct drm_device *dev); - -}; - -/** - * DRM driver structure. This structure represent the common code for - * a family of cards. There will one drm_device for each card present - * in this family - */ -struct drm_driver { - int (*load) (struct drm_device *, unsigned long flags); - int (*firstopen) (struct drm_device *); - int (*open) (struct drm_device *, struct drm_file *); - void (*preclose) (struct drm_device *, struct drm_file *file_priv); - void (*postclose) (struct drm_device *, struct drm_file *); - void (*lastclose) (struct drm_device *); - int (*unload) (struct drm_device *); - int (*suspend) (struct drm_device *, pm_message_t state); - int (*resume) (struct drm_device *); - int (*dma_ioctl) (struct drm_device *dev, void *data, struct drm_file *file_priv); - int (*dma_quiescent) (struct drm_device *); - int (*context_dtor) (struct drm_device *dev, int context); - - /** - * get_vblank_counter - get raw hardware vblank counter - * @dev: DRM device - * @crtc: counter to fetch - * - * Driver callback for fetching a raw hardware vblank counter - * for @crtc. If a device doesn't have a hardware counter, the - * driver can simply return the value of drm_vblank_count and - * make the enable_vblank() and disable_vblank() hooks into no-ops, - * leaving interrupts enabled at all times. - * - * Wraparound handling and loss of events due to modesetting is dealt - * with in the DRM core code. - * - * RETURNS - * Raw vblank counter value. - */ - u32 (*get_vblank_counter) (struct drm_device *dev, int crtc); - - /** - * enable_vblank - enable vblank interrupt events - * @dev: DRM device - * @crtc: which irq to enable - * - * Enable vblank interrupts for @crtc. If the device doesn't have - * a hardware vblank counter, this routine should be a no-op, since - * interrupts will have to stay on to keep the count accurate. - * - * RETURNS - * Zero on success, appropriate errno if the given @crtc's vblank - * interrupt cannot be enabled. - */ - int (*enable_vblank) (struct drm_device *dev, int crtc); - - /** - * disable_vblank - disable vblank interrupt events - * @dev: DRM device - * @crtc: which irq to enable - * - * Disable vblank interrupts for @crtc. If the device doesn't have - * a hardware vblank counter, this routine should be a no-op, since - * interrupts will have to stay on to keep the count accurate. - */ - void (*disable_vblank) (struct drm_device *dev, int crtc); - - /** - * Called by \c drm_device_is_agp. Typically used to determine if a - * card is really attached to AGP or not. - * - * \param dev DRM device handle - * - * \returns - * One of three values is returned depending on whether or not the - * card is absolutely \b not AGP (return of 0), absolutely \b is AGP - * (return of 1), or may or may not be AGP (return of 2). - */ - int (*device_is_agp) (struct drm_device *dev); - - /** - * Called by vblank timestamping code. - * - * Return the current display scanout position from a crtc. - * - * \param dev DRM device. - * \param crtc Id of the crtc to query. - * \param *vpos Target location for current vertical scanout position. - * \param *hpos Target location for current horizontal scanout position. - * - * Returns vpos as a positive number while in active scanout area. - * Returns vpos as a negative number inside vblank, counting the number - * of scanlines to go until end of vblank, e.g., -1 means "one scanline - * until start of active scanout / end of vblank." - * - * \return Flags, or'ed together as follows: - * - * DRM_SCANOUTPOS_VALID = Query successful. - * DRM_SCANOUTPOS_INVBL = Inside vblank. - * DRM_SCANOUTPOS_ACCURATE = Returned position is accurate. A lack of - * this flag means that returned position may be offset by a constant - * but unknown small number of scanlines wrt. real scanout position. - * - */ - int (*get_scanout_position) (struct drm_device *dev, int crtc, - int *vpos, int *hpos); - - /** - * Called by \c drm_get_last_vbltimestamp. Should return a precise - * timestamp when the most recent VBLANK interval ended or will end. - * - * Specifically, the timestamp in @vblank_time should correspond as - * closely as possible to the time when the first video scanline of - * the video frame after the end of VBLANK will start scanning out, - * the time immediately after end of the VBLANK interval. If the - * @crtc is currently inside VBLANK, this will be a time in the future. - * If the @crtc is currently scanning out a frame, this will be the - * past start time of the current scanout. This is meant to adhere - * to the OpenML OML_sync_control extension specification. - * - * \param dev dev DRM device handle. - * \param crtc crtc for which timestamp should be returned. - * \param *max_error Maximum allowable timestamp error in nanoseconds. - * Implementation should strive to provide timestamp - * with an error of at most *max_error nanoseconds. - * Returns true upper bound on error for timestamp. - * \param *vblank_time Target location for returned vblank timestamp. - * \param flags 0 = Defaults, no special treatment needed. - * \param DRM_CALLED_FROM_VBLIRQ = Function is called from vblank - * irq handler. Some drivers need to apply some workarounds - * for gpu-specific vblank irq quirks if flag is set. - * - * \returns - * Zero if timestamping isn't supported in current display mode or a - * negative number on failure. A positive status code on success, - * which describes how the vblank_time timestamp was computed. - */ - int (*get_vblank_timestamp) (struct drm_device *dev, int crtc, - int *max_error, - struct timeval *vblank_time, - unsigned flags); - - /* these have to be filled in */ - - irqreturn_t(*irq_handler) (DRM_IRQ_ARGS); - void (*irq_preinstall) (struct drm_device *dev); - int (*irq_postinstall) (struct drm_device *dev); - void (*irq_uninstall) (struct drm_device *dev); - void (*reclaim_buffers) (struct drm_device *dev, - struct drm_file * file_priv); - void (*reclaim_buffers_locked) (struct drm_device *dev, - struct drm_file *file_priv); - void (*reclaim_buffers_idlelocked) (struct drm_device *dev, - struct drm_file *file_priv); - void (*set_version) (struct drm_device *dev, - struct drm_set_version *sv); - - /* Master routines */ - int (*master_create)(struct drm_device *dev, struct drm_master *master); - void (*master_destroy)(struct drm_device *dev, struct drm_master *master); - /** - * master_set is called whenever the minor master is set. - * master_drop is called whenever the minor master is dropped. - */ - - int (*master_set)(struct drm_device *dev, struct drm_file *file_priv, - bool from_open); - void (*master_drop)(struct drm_device *dev, struct drm_file *file_priv, - bool from_release); - - int (*debugfs_init)(struct drm_minor *minor); - void (*debugfs_cleanup)(struct drm_minor *minor); - - /** - * Driver-specific constructor for drm_gem_objects, to set up - * obj->driver_private. - * - * Returns 0 on success. - */ - int (*gem_init_object) (struct drm_gem_object *obj); - void (*gem_free_object) (struct drm_gem_object *obj); - int (*gem_open_object) (struct drm_gem_object *, struct drm_file *); - void (*gem_close_object) (struct drm_gem_object *, struct drm_file *); - - /* prime: */ - /* export handle -> fd (see drm_gem_prime_handle_to_fd() helper) */ - int (*prime_handle_to_fd)(struct drm_device *dev, struct drm_file *file_priv, - uint32_t handle, uint32_t flags, int *prime_fd); - /* import fd -> handle (see drm_gem_prime_fd_to_handle() helper) */ - int (*prime_fd_to_handle)(struct drm_device *dev, struct drm_file *file_priv, - int prime_fd, uint32_t *handle); - /* export GEM -> dmabuf */ - struct dma_buf * (*gem_prime_export)(struct drm_device *dev, - struct drm_gem_object *obj, int flags); - /* import dmabuf -> GEM */ - struct drm_gem_object * (*gem_prime_import)(struct drm_device *dev, - struct dma_buf *dma_buf); - - /* vga arb irq handler */ - void (*vgaarb_irq)(struct drm_device *dev, bool state); - - /* dumb alloc support */ - int (*dumb_create)(struct drm_file *file_priv, - struct drm_device *dev, - struct drm_mode_create_dumb *args); - int (*dumb_map_offset)(struct drm_file *file_priv, - struct drm_device *dev, uint32_t handle, - uint64_t *offset); - int (*dumb_destroy)(struct drm_file *file_priv, - struct drm_device *dev, - uint32_t handle); - - /* Driver private ops for this object */ - struct vm_operations_struct *gem_vm_ops; - - int major; - int minor; - int patchlevel; - char *name; - char *desc; - char *date; - - u32 driver_features; - int dev_priv_size; - struct drm_ioctl_desc *ioctls; - int num_ioctls; - const struct file_operations *fops; - union { - struct pci_driver *pci; - struct platform_device *platform_device; - struct usb_driver *usb; - } kdriver; - struct drm_bus *bus; - - /* List of devices hanging off this driver */ - struct list_head device_list; -}; - -#define DRM_MINOR_UNASSIGNED 0 -#define DRM_MINOR_LEGACY 1 -#define DRM_MINOR_CONTROL 2 -#define DRM_MINOR_RENDER 3 - - -/** - * debugfs node list. This structure represents a debugfs file to - * be created by the drm core - */ -struct drm_debugfs_list { - const char *name; /** file name */ - int (*show)(struct seq_file*, void*); /** show callback */ - u32 driver_features; /**< Required driver features for this entry */ -}; - -/** - * debugfs node structure. This structure represents a debugfs file. - */ -struct drm_debugfs_node { - struct list_head list; - struct drm_minor *minor; - struct drm_debugfs_list *debugfs_ent; - struct dentry *dent; -}; - -/** - * Info file list entry. This structure represents a debugfs or proc file to - * be created by the drm core - */ -struct drm_info_list { - const char *name; /** file name */ - int (*show)(struct seq_file*, void*); /** show callback */ - u32 driver_features; /**< Required driver features for this entry */ - void *data; -}; - -/** - * debugfs node structure. This structure represents a debugfs file. - */ -struct drm_info_node { - struct list_head list; - struct drm_minor *minor; - struct drm_info_list *info_ent; - struct dentry *dent; -}; - -/** - * DRM minor structure. This structure represents a drm minor number. - */ -struct drm_minor { - int index; /**< Minor device number */ - int type; /**< Control or render */ - dev_t device; /**< Device number for mknod */ - struct device kdev; /**< Linux device */ - struct drm_device *dev; - - struct proc_dir_entry *proc_root; /**< proc directory entry */ - struct drm_info_node proc_nodes; - struct dentry *debugfs_root; - - struct list_head debugfs_list; - struct mutex debugfs_lock; /* Protects debugfs_list. */ - - struct drm_master *master; /* currently active master for this node */ - struct list_head master_list; - struct drm_mode_group mode_group; -}; - -/* mode specified on the command line */ -struct drm_cmdline_mode { - bool specified; - bool refresh_specified; - bool bpp_specified; - int xres, yres; - int bpp; - int refresh; - bool rb; - bool interlace; - bool cvt; - bool margins; - enum drm_connector_force force; -}; - - -struct drm_pending_vblank_event { - struct drm_pending_event base; - int pipe; - struct drm_event_vblank event; -}; - -/** - * DRM device structure. This structure represent a complete card that - * may contain multiple heads. - */ -struct drm_device { - struct list_head driver_item; /**< list of devices per driver */ - char *devname; /**< For /proc/interrupts */ - int if_version; /**< Highest interface version set */ - - /** \name Locks */ - /*@{ */ - spinlock_t count_lock; /**< For inuse, drm_device::open_count, drm_device::buf_use */ - struct mutex struct_mutex; /**< For others */ - /*@} */ - - /** \name Usage Counters */ - /*@{ */ - int open_count; /**< Outstanding files open */ - atomic_t ioctl_count; /**< Outstanding IOCTLs pending */ - atomic_t vma_count; /**< Outstanding vma areas open */ - int buf_use; /**< Buffers in use -- cannot alloc */ - atomic_t buf_alloc; /**< Buffer allocation in progress */ - /*@} */ - - /** \name Performance counters */ - /*@{ */ - unsigned long counters; - enum drm_stat_type types[15]; - atomic_t counts[15]; - /*@} */ - - struct list_head filelist; - - /** \name Memory management */ - /*@{ */ - struct list_head maplist; /**< Linked list of regions */ - int map_count; /**< Number of mappable regions */ - struct drm_open_hash map_hash; /**< User token hash table for maps */ - - /** \name Context handle management */ - /*@{ */ - struct list_head ctxlist; /**< Linked list of context handles */ - int ctx_count; /**< Number of context handles */ - struct mutex ctxlist_mutex; /**< For ctxlist */ - - struct idr ctx_idr; - - struct list_head vmalist; /**< List of vmas (for debugging) */ - - /*@} */ - - /** \name DMA queues (contexts) */ - /*@{ */ - int queue_count; /**< Number of active DMA queues */ - int queue_reserved; /**< Number of reserved DMA queues */ - int queue_slots; /**< Actual length of queuelist */ - struct drm_queue **queuelist; /**< Vector of pointers to DMA queues */ - struct drm_device_dma *dma; /**< Optional pointer for DMA support */ - /*@} */ - - /** \name Context support */ - /*@{ */ - int irq_enabled; /**< True if irq handler is enabled */ - __volatile__ long context_flag; /**< Context swapping flag */ - __volatile__ long interrupt_flag; /**< Interruption handler flag */ - __volatile__ long dma_flag; /**< DMA dispatch flag */ - wait_queue_head_t context_wait; /**< Processes waiting on ctx switch */ - int last_checked; /**< Last context checked for DMA */ - int last_context; /**< Last current context */ - unsigned long last_switch; /**< jiffies at last context switch */ - /*@} */ - - struct work_struct work; - /** \name VBLANK IRQ support */ - /*@{ */ - - /* - * At load time, disabling the vblank interrupt won't be allowed since - * old clients may not call the modeset ioctl and therefore misbehave. - * Once the modeset ioctl *has* been called though, we can safely - * disable them when unused. - */ - int vblank_disable_allowed; - - wait_queue_head_t *vbl_queue; /**< VBLANK wait queue */ - atomic_t *_vblank_count; /**< number of VBLANK interrupts (driver must alloc the right number of counters) */ - struct timeval *_vblank_time; /**< timestamp of current vblank_count (drivers must alloc right number of fields) */ - spinlock_t vblank_time_lock; /**< Protects vblank count and time updates during vblank enable/disable */ - spinlock_t vbl_lock; - atomic_t *vblank_refcount; /* number of users of vblank interruptsper crtc */ - u32 *last_vblank; /* protected by dev->vbl_lock, used */ - /* for wraparound handling */ - int *vblank_enabled; /* so we don't call enable more than - once per disable */ - int *vblank_inmodeset; /* Display driver is setting mode */ - u32 *last_vblank_wait; /* Last vblank seqno waited per CRTC */ - struct timer_list vblank_disable_timer; - - u32 max_vblank_count; /**< size of vblank counter register */ - - /** - * List of events - */ - struct list_head vblank_event_list; - spinlock_t event_lock; - - /*@} */ - cycles_t ctx_start; - cycles_t lck_start; - - struct fasync_struct *buf_async;/**< Processes waiting for SIGIO */ - wait_queue_head_t buf_readers; /**< Processes waiting to read */ - wait_queue_head_t buf_writers; /**< Processes waiting to ctx switch */ - - struct drm_agp_head *agp; /**< AGP data */ - - struct device *dev; /**< Device structure */ - struct pci_dev *pdev; /**< PCI device structure */ - int pci_vendor; /**< PCI vendor id */ - int pci_device; /**< PCI device id */ -#ifdef __alpha__ - struct pci_controller *hose; -#endif - - struct platform_device *platformdev; /**< Platform device struture */ - struct usb_device *usbdev; - - struct drm_sg_mem *sg; /**< Scatter gather memory */ - unsigned int num_crtcs; /**< Number of CRTCs on this device */ - void *dev_private; /**< device private data */ - void *mm_private; - struct address_space *dev_mapping; - struct drm_sigdata sigdata; /**< For block_all_signals */ - sigset_t sigmask; - - struct drm_driver *driver; - struct drm_local_map *agp_buffer_map; - unsigned int agp_buffer_token; - struct drm_minor *control; /**< Control node for card */ - struct drm_minor *primary; /**< render type primary screen head */ - - struct drm_mode_config mode_config; /**< Current mode config */ - - /** \name GEM information */ - /*@{ */ - spinlock_t object_name_lock; - struct idr object_name_idr; - /*@} */ - int switch_power_state; - - atomic_t unplugged; /* device has been unplugged or gone away */ -}; - -#define DRM_SWITCH_POWER_ON 0 -#define DRM_SWITCH_POWER_OFF 1 -#define DRM_SWITCH_POWER_CHANGING 2 - -static __inline__ int drm_core_check_feature(struct drm_device *dev, - int feature) -{ - return ((dev->driver->driver_features & feature) ? 1 : 0); -} - -static inline int drm_dev_to_irq(struct drm_device *dev) -{ - return dev->driver->bus->get_irq(dev); -} - - -#if __OS_HAS_AGP -static inline int drm_core_has_AGP(struct drm_device *dev) -{ - return drm_core_check_feature(dev, DRIVER_USE_AGP); -} -#else -#define drm_core_has_AGP(dev) (0) -#endif - -#if __OS_HAS_MTRR -static inline int drm_core_has_MTRR(struct drm_device *dev) -{ - return drm_core_check_feature(dev, DRIVER_USE_MTRR); -} - -#define DRM_MTRR_WC MTRR_TYPE_WRCOMB - -static inline int drm_mtrr_add(unsigned long offset, unsigned long size, - unsigned int flags) -{ - return mtrr_add(offset, size, flags, 1); -} - -static inline int drm_mtrr_del(int handle, unsigned long offset, - unsigned long size, unsigned int flags) -{ - return mtrr_del(handle, offset, size); -} - -#else -#define drm_core_has_MTRR(dev) (0) - -#define DRM_MTRR_WC 0 - -static inline int drm_mtrr_add(unsigned long offset, unsigned long size, - unsigned int flags) -{ - return 0; -} - -static inline int drm_mtrr_del(int handle, unsigned long offset, - unsigned long size, unsigned int flags) -{ - return 0; -} -#endif - -static inline void drm_device_set_unplugged(struct drm_device *dev) -{ - smp_wmb(); - atomic_set(&dev->unplugged, 1); -} - -static inline int drm_device_is_unplugged(struct drm_device *dev) -{ - int ret = atomic_read(&dev->unplugged); - smp_rmb(); - return ret; -} - -/******************************************************************/ -/** \name Internal function definitions */ -/*@{*/ - - /* Driver support (drm_drv.h) */ -extern long drm_ioctl(struct file *filp, - unsigned int cmd, unsigned long arg); -extern long drm_compat_ioctl(struct file *filp, - unsigned int cmd, unsigned long arg); -extern int drm_lastclose(struct drm_device *dev); - - /* Device support (drm_fops.h) */ -extern struct mutex drm_global_mutex; -extern int drm_open(struct inode *inode, struct file *filp); -extern int drm_stub_open(struct inode *inode, struct file *filp); -extern int drm_fasync(int fd, struct file *filp, int on); -extern ssize_t drm_read(struct file *filp, char __user *buffer, - size_t count, loff_t *offset); -extern int drm_release(struct inode *inode, struct file *filp); - - /* Mapping support (drm_vm.h) */ -extern int drm_mmap(struct file *filp, struct vm_area_struct *vma); -extern int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma); -extern void drm_vm_open_locked(struct vm_area_struct *vma); -extern void drm_vm_close_locked(struct vm_area_struct *vma); -extern unsigned int drm_poll(struct file *filp, struct poll_table_struct *wait); - - /* Memory management support (drm_memory.h) */ -#include "drm_memory.h" -extern void drm_free_agp(DRM_AGP_MEM * handle, int pages); -extern int drm_bind_agp(DRM_AGP_MEM * handle, unsigned int start); -extern DRM_AGP_MEM *drm_agp_bind_pages(struct drm_device *dev, - struct page **pages, - unsigned long num_pages, - uint32_t gtt_offset, - uint32_t type); -extern int drm_unbind_agp(DRM_AGP_MEM * handle); - - /* Misc. IOCTL support (drm_ioctl.h) */ -extern int drm_irq_by_busid(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getunique(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_setunique(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getmap(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getclient(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getstats(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getcap(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_setversion(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_noop(struct drm_device *dev, void *data, - struct drm_file *file_priv); - - /* Context IOCTL support (drm_context.h) */ -extern int drm_resctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_addctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_modctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_switchctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_newctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_rmctx(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -extern int drm_ctxbitmap_init(struct drm_device *dev); -extern void drm_ctxbitmap_cleanup(struct drm_device *dev); -extern void drm_ctxbitmap_free(struct drm_device *dev, int ctx_handle); - -extern int drm_setsareactx(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_getsareactx(struct drm_device *dev, void *data, - struct drm_file *file_priv); - - /* Authentication IOCTL support (drm_auth.h) */ -extern int drm_getmagic(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_authmagic(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_remove_magic(struct drm_master *master, drm_magic_t magic); - -/* Cache management (drm_cache.c) */ -void drm_clflush_pages(struct page *pages[], unsigned long num_pages); - - /* Locking IOCTL support (drm_lock.h) */ -extern int drm_lock(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_unlock(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context); -extern void drm_idlelock_take(struct drm_lock_data *lock_data); -extern void drm_idlelock_release(struct drm_lock_data *lock_data); - -/* - * These are exported to drivers so that they can implement fencing using - * DMA quiscent + idle. DMA quiescent usually requires the hardware lock. - */ - -extern int drm_i_have_hw_lock(struct drm_device *dev, struct drm_file *file_priv); - - /* Buffer management support (drm_bufs.h) */ -extern int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc * request); -extern int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc * request); -extern int drm_addmap(struct drm_device *dev, resource_size_t offset, - unsigned int size, enum drm_map_type type, - enum drm_map_flags flags, struct drm_local_map **map_ptr); -extern int drm_addmap_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_rmmap(struct drm_device *dev, struct drm_local_map *map); -extern int drm_rmmap_locked(struct drm_device *dev, struct drm_local_map *map); -extern int drm_rmmap_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_addbufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_infobufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_markbufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_freebufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_mapbufs(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_order(unsigned long size); - - /* DMA support (drm_dma.h) */ -extern int drm_dma_setup(struct drm_device *dev); -extern void drm_dma_takedown(struct drm_device *dev); -extern void drm_free_buffer(struct drm_device *dev, struct drm_buf * buf); -extern void drm_core_reclaim_buffers(struct drm_device *dev, - struct drm_file *filp); - - /* IRQ support (drm_irq.h) */ -extern int drm_control(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_irq_install(struct drm_device *dev); -extern int drm_irq_uninstall(struct drm_device *dev); - -extern int drm_vblank_init(struct drm_device *dev, int num_crtcs); -extern int drm_wait_vblank(struct drm_device *dev, void *data, - struct drm_file *filp); -extern int drm_vblank_wait(struct drm_device *dev, unsigned int *vbl_seq); -extern u32 drm_vblank_count(struct drm_device *dev, int crtc); -extern u32 drm_vblank_count_and_time(struct drm_device *dev, int crtc, - struct timeval *vblanktime); -extern bool drm_handle_vblank(struct drm_device *dev, int crtc); -extern int drm_vblank_get(struct drm_device *dev, int crtc); -extern void drm_vblank_put(struct drm_device *dev, int crtc); -extern void drm_vblank_off(struct drm_device *dev, int crtc); -extern void drm_vblank_cleanup(struct drm_device *dev); -extern u32 drm_get_last_vbltimestamp(struct drm_device *dev, int crtc, - struct timeval *tvblank, unsigned flags); -extern int drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev, - int crtc, int *max_error, - struct timeval *vblank_time, - unsigned flags, - struct drm_crtc *refcrtc); -extern void drm_calc_timestamping_constants(struct drm_crtc *crtc); - -extern bool -drm_mode_parse_command_line_for_connector(const char *mode_option, - struct drm_connector *connector, - struct drm_cmdline_mode *mode); - -extern struct drm_display_mode * -drm_mode_create_from_cmdline_mode(struct drm_device *dev, - struct drm_cmdline_mode *cmd); - -/* Modesetting support */ -extern void drm_vblank_pre_modeset(struct drm_device *dev, int crtc); -extern void drm_vblank_post_modeset(struct drm_device *dev, int crtc); -extern int drm_modeset_ctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); - - /* AGP/GART support (drm_agpsupport.h) */ -extern struct drm_agp_head *drm_agp_init(struct drm_device *dev); -extern int drm_agp_acquire(struct drm_device *dev); -extern int drm_agp_acquire_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_release(struct drm_device *dev); -extern int drm_agp_release_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode); -extern int drm_agp_enable_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_info(struct drm_device *dev, struct drm_agp_info *info); -extern int drm_agp_info_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request); -extern int drm_agp_alloc_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request); -extern int drm_agp_free_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request); -extern int drm_agp_unbind_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request); -extern int drm_agp_bind_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); - - /* Stub support (drm_stub.h) */ -extern int drm_setmaster_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_dropmaster_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -struct drm_master *drm_master_create(struct drm_minor *minor); -extern struct drm_master *drm_master_get(struct drm_master *master); -extern void drm_master_put(struct drm_master **master); - -extern void drm_put_dev(struct drm_device *dev); -extern int drm_put_minor(struct drm_minor **minor); -extern void drm_unplug_dev(struct drm_device *dev); -extern unsigned int drm_debug; - -extern unsigned int drm_vblank_offdelay; -extern unsigned int drm_timestamp_precision; - -extern struct class *drm_class; -extern struct proc_dir_entry *drm_proc_root; -extern struct dentry *drm_debugfs_root; - -extern struct idr drm_minors_idr; - -extern struct drm_local_map *drm_getsarea(struct drm_device *dev); - - /* Proc support (drm_proc.h) */ -extern int drm_proc_init(struct drm_minor *minor, int minor_id, - struct proc_dir_entry *root); -extern int drm_proc_cleanup(struct drm_minor *minor, struct proc_dir_entry *root); - - /* Debugfs support */ -#if defined(CONFIG_DEBUG_FS) -extern int drm_debugfs_init(struct drm_minor *minor, int minor_id, - struct dentry *root); -extern int drm_debugfs_create_files(struct drm_info_list *files, int count, - struct dentry *root, struct drm_minor *minor); -extern int drm_debugfs_remove_files(struct drm_info_list *files, int count, - struct drm_minor *minor); -extern int drm_debugfs_cleanup(struct drm_minor *minor); -#endif - - /* Info file support */ -extern int drm_name_info(struct seq_file *m, void *data); -extern int drm_vm_info(struct seq_file *m, void *data); -extern int drm_queues_info(struct seq_file *m, void *data); -extern int drm_bufs_info(struct seq_file *m, void *data); -extern int drm_vblank_info(struct seq_file *m, void *data); -extern int drm_clients_info(struct seq_file *m, void* data); -extern int drm_gem_name_info(struct seq_file *m, void *data); - - -extern int drm_gem_prime_handle_to_fd(struct drm_device *dev, - struct drm_file *file_priv, uint32_t handle, uint32_t flags, - int *prime_fd); -extern int drm_gem_prime_fd_to_handle(struct drm_device *dev, - struct drm_file *file_priv, int prime_fd, uint32_t *handle); - -extern int drm_prime_handle_to_fd_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_prime_fd_to_handle_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); - -extern struct sg_table *drm_prime_pages_to_sg(struct page **pages, int nr_pages); -extern void drm_prime_gem_destroy(struct drm_gem_object *obj, struct sg_table *sg); - - -void drm_prime_init_file_private(struct drm_prime_file_private *prime_fpriv); -void drm_prime_destroy_file_private(struct drm_prime_file_private *prime_fpriv); -int drm_prime_add_imported_buf_handle(struct drm_prime_file_private *prime_fpriv, struct dma_buf *dma_buf, uint32_t handle); -int drm_prime_lookup_imported_buf_handle(struct drm_prime_file_private *prime_fpriv, struct dma_buf *dma_buf, uint32_t *handle); -void drm_prime_remove_imported_buf_handle(struct drm_prime_file_private *prime_fpriv, struct dma_buf *dma_buf); - -int drm_prime_add_dma_buf(struct drm_device *dev, struct drm_gem_object *obj); -int drm_prime_lookup_obj(struct drm_device *dev, struct dma_buf *buf, - struct drm_gem_object **obj); - -#if DRM_DEBUG_CODE -extern int drm_vma_info(struct seq_file *m, void *data); -#endif - - /* Scatter Gather Support (drm_scatter.h) */ -extern void drm_sg_cleanup(struct drm_sg_mem * entry); -extern int drm_sg_alloc_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request); -extern int drm_sg_free(struct drm_device *dev, void *data, - struct drm_file *file_priv); - - /* ATI PCIGART support (ati_pcigart.h) */ -extern int drm_ati_pcigart_init(struct drm_device *dev, - struct drm_ati_pcigart_info * gart_info); -extern int drm_ati_pcigart_cleanup(struct drm_device *dev, - struct drm_ati_pcigart_info * gart_info); - -extern drm_dma_handle_t *drm_pci_alloc(struct drm_device *dev, size_t size, - size_t align); -extern void __drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah); -extern void drm_pci_free(struct drm_device *dev, drm_dma_handle_t * dmah); - - /* sysfs support (drm_sysfs.c) */ -struct drm_sysfs_class; -extern struct class *drm_sysfs_create(struct module *owner, char *name); -extern void drm_sysfs_destroy(void); -extern int drm_sysfs_device_add(struct drm_minor *minor); -extern void drm_sysfs_hotplug_event(struct drm_device *dev); -extern void drm_sysfs_device_remove(struct drm_minor *minor); -extern char *drm_get_connector_status_name(enum drm_connector_status status); -extern int drm_sysfs_connector_add(struct drm_connector *connector); -extern void drm_sysfs_connector_remove(struct drm_connector *connector); - -/* Graphics Execution Manager library functions (drm_gem.c) */ -int drm_gem_init(struct drm_device *dev); -void drm_gem_destroy(struct drm_device *dev); -void drm_gem_object_release(struct drm_gem_object *obj); -void drm_gem_object_free(struct kref *kref); -struct drm_gem_object *drm_gem_object_alloc(struct drm_device *dev, - size_t size); -int drm_gem_object_init(struct drm_device *dev, - struct drm_gem_object *obj, size_t size); -int drm_gem_private_object_init(struct drm_device *dev, - struct drm_gem_object *obj, size_t size); -void drm_gem_object_handle_free(struct drm_gem_object *obj); -void drm_gem_vm_open(struct vm_area_struct *vma); -void drm_gem_vm_close(struct vm_area_struct *vma); -int drm_gem_mmap(struct file *filp, struct vm_area_struct *vma); - -#include "drm_global.h" - -static inline void -drm_gem_object_reference(struct drm_gem_object *obj) -{ - kref_get(&obj->refcount); -} - -static inline void -drm_gem_object_unreference(struct drm_gem_object *obj) -{ - if (obj != NULL) - kref_put(&obj->refcount, drm_gem_object_free); -} - -static inline void -drm_gem_object_unreference_unlocked(struct drm_gem_object *obj) -{ - if (obj != NULL) { - struct drm_device *dev = obj->dev; - mutex_lock(&dev->struct_mutex); - kref_put(&obj->refcount, drm_gem_object_free); - mutex_unlock(&dev->struct_mutex); - } -} - -int drm_gem_handle_create(struct drm_file *file_priv, - struct drm_gem_object *obj, - u32 *handlep); -int drm_gem_handle_delete(struct drm_file *filp, u32 handle); - -static inline void -drm_gem_object_handle_reference(struct drm_gem_object *obj) -{ - drm_gem_object_reference(obj); - atomic_inc(&obj->handle_count); -} - -static inline void -drm_gem_object_handle_unreference(struct drm_gem_object *obj) -{ - if (obj == NULL) - return; - - if (atomic_read(&obj->handle_count) == 0) - return; - /* - * Must bump handle count first as this may be the last - * ref, in which case the object would disappear before we - * checked for a name - */ - if (atomic_dec_and_test(&obj->handle_count)) - drm_gem_object_handle_free(obj); - drm_gem_object_unreference(obj); -} - -static inline void -drm_gem_object_handle_unreference_unlocked(struct drm_gem_object *obj) -{ - if (obj == NULL) - return; - - if (atomic_read(&obj->handle_count) == 0) - return; - - /* - * Must bump handle count first as this may be the last - * ref, in which case the object would disappear before we - * checked for a name - */ - - if (atomic_dec_and_test(&obj->handle_count)) - drm_gem_object_handle_free(obj); - drm_gem_object_unreference_unlocked(obj); -} - -void drm_gem_free_mmap_offset(struct drm_gem_object *obj); -int drm_gem_create_mmap_offset(struct drm_gem_object *obj); - -struct drm_gem_object *drm_gem_object_lookup(struct drm_device *dev, - struct drm_file *filp, - u32 handle); -int drm_gem_close_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_gem_flink_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -int drm_gem_open_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -void drm_gem_open(struct drm_device *dev, struct drm_file *file_private); -void drm_gem_release(struct drm_device *dev, struct drm_file *file_private); - -extern void drm_core_ioremap(struct drm_local_map *map, struct drm_device *dev); -extern void drm_core_ioremap_wc(struct drm_local_map *map, struct drm_device *dev); -extern void drm_core_ioremapfree(struct drm_local_map *map, struct drm_device *dev); - -static __inline__ struct drm_local_map *drm_core_findmap(struct drm_device *dev, - unsigned int token) -{ - struct drm_map_list *_entry; - list_for_each_entry(_entry, &dev->maplist, head) - if (_entry->user_token == token) - return _entry->map; - return NULL; -} - -static __inline__ void drm_core_dropmap(struct drm_local_map *map) -{ -} - -#include "drm_mem_util.h" - -extern int drm_fill_in_dev(struct drm_device *dev, - const struct pci_device_id *ent, - struct drm_driver *driver); -int drm_get_minor(struct drm_device *dev, struct drm_minor **minor, int type); -/*@}*/ - -/* PCI section */ -static __inline__ int drm_pci_device_is_agp(struct drm_device *dev) -{ - if (dev->driver->device_is_agp != NULL) { - int err = (*dev->driver->device_is_agp) (dev); - - if (err != 2) { - return err; - } - } - - return pci_find_capability(dev->pdev, PCI_CAP_ID_AGP); -} - -extern int drm_pci_init(struct drm_driver *driver, struct pci_driver *pdriver); -extern void drm_pci_exit(struct drm_driver *driver, struct pci_driver *pdriver); -extern int drm_get_pci_dev(struct pci_dev *pdev, - const struct pci_device_id *ent, - struct drm_driver *driver); - - -/* platform section */ -extern int drm_platform_init(struct drm_driver *driver, struct platform_device *platform_device); -extern void drm_platform_exit(struct drm_driver *driver, struct platform_device *platform_device); - -extern int drm_get_platform_dev(struct platform_device *pdev, - struct drm_driver *driver); - -/* returns true if currently okay to sleep */ -static __inline__ bool drm_can_sleep(void) -{ - if (in_atomic() || in_dbg_master() || irqs_disabled()) - return false; - return true; -} - -#endif /* __KERNEL__ */ -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_buffer.h b/ANDROID_3.4.5/include/drm/drm_buffer.h deleted file mode 100644 index 322dbff3..00000000 --- a/ANDROID_3.4.5/include/drm/drm_buffer.h +++ /dev/null @@ -1,148 +0,0 @@ -/************************************************************************** - * - * Copyright 2010 Pauli Nieminen. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ -/* - * Multipart buffer for coping data which is larger than the page size. - * - * Authors: - * Pauli Nieminen <suokkos-at-gmail-dot-com> - */ - -#ifndef _DRM_BUFFER_H_ -#define _DRM_BUFFER_H_ - -#include "drmP.h" - -struct drm_buffer { - int iterator; - int size; - char *data[]; -}; - - -/** - * Return the index of page that buffer is currently pointing at. - */ -static inline int drm_buffer_page(struct drm_buffer *buf) -{ - return buf->iterator / PAGE_SIZE; -} -/** - * Return the index of the current byte in the page - */ -static inline int drm_buffer_index(struct drm_buffer *buf) -{ - return buf->iterator & (PAGE_SIZE - 1); -} -/** - * Return number of bytes that is left to process - */ -static inline int drm_buffer_unprocessed(struct drm_buffer *buf) -{ - return buf->size - buf->iterator; -} - -/** - * Advance the buffer iterator number of bytes that is given. - */ -static inline void drm_buffer_advance(struct drm_buffer *buf, int bytes) -{ - buf->iterator += bytes; -} - -/** - * Allocate the drm buffer object. - * - * buf: A pointer to a pointer where the object is stored. - * size: The number of bytes to allocate. - */ -extern int drm_buffer_alloc(struct drm_buffer **buf, int size); - -/** - * Copy the user data to the begin of the buffer and reset the processing - * iterator. - * - * user_data: A pointer the data that is copied to the buffer. - * size: The Number of bytes to copy. - */ -extern int drm_buffer_copy_from_user(struct drm_buffer *buf, - void __user *user_data, int size); - -/** - * Free the drm buffer object - */ -extern void drm_buffer_free(struct drm_buffer *buf); - -/** - * Read an object from buffer that may be split to multiple parts. If object - * is not split function just returns the pointer to object in buffer. But in - * case of split object data is copied to given stack object that is suplied - * by caller. - * - * The processing location of the buffer is also advanced to the next byte - * after the object. - * - * objsize: The size of the objet in bytes. - * stack_obj: A pointer to a memory location where object can be copied. - */ -extern void *drm_buffer_read_object(struct drm_buffer *buf, - int objsize, void *stack_obj); - -/** - * Returns the pointer to the dword which is offset number of elements from the - * current processing location. - * - * Caller must make sure that dword is not split in the buffer. This - * requirement is easily met if all the sizes of objects in buffer are - * multiples of dword and PAGE_SIZE is multiple dword. - * - * Call to this function doesn't change the processing location. - * - * offset: The index of the dword relative to the internat iterator. - */ -static inline void *drm_buffer_pointer_to_dword(struct drm_buffer *buffer, - int offset) -{ - int iter = buffer->iterator + offset * 4; - return &buffer->data[iter / PAGE_SIZE][iter & (PAGE_SIZE - 1)]; -} -/** - * Returns the pointer to the dword which is offset number of elements from - * the current processing location. - * - * Call to this function doesn't change the processing location. - * - * offset: The index of the byte relative to the internat iterator. - */ -static inline void *drm_buffer_pointer_to_byte(struct drm_buffer *buffer, - int offset) -{ - int iter = buffer->iterator + offset; - return &buffer->data[iter / PAGE_SIZE][iter & (PAGE_SIZE - 1)]; -} - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_cache.h b/ANDROID_3.4.5/include/drm/drm_cache.h deleted file mode 100644 index 7bfb0630..00000000 --- a/ANDROID_3.4.5/include/drm/drm_cache.h +++ /dev/null @@ -1,38 +0,0 @@ -/************************************************************************** - * - * Copyright 2009 Red Hat Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ -/* - * Authors: - * Dave Airlie <airlied@redhat.com> - */ - -#ifndef _DRM_CACHE_H_ -#define _DRM_CACHE_H_ - -void drm_clflush_pages(struct page *pages[], unsigned long num_pages); - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_core.h b/ANDROID_3.4.5/include/drm/drm_core.h deleted file mode 100644 index 4e752386..00000000 --- a/ANDROID_3.4.5/include/drm/drm_core.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright 2004 Jon Smirl <jonsmirl@gmail.com> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#define CORE_AUTHOR "Gareth Hughes, Leif Delgass, José Fonseca, Jon Smirl" - -#define CORE_NAME "drm" -#define CORE_DESC "DRM shared core routines" -#define CORE_DATE "20060810" - -#define DRM_IF_MAJOR 1 -#define DRM_IF_MINOR 4 - -#define CORE_MAJOR 1 -#define CORE_MINOR 1 -#define CORE_PATCHLEVEL 0 diff --git a/ANDROID_3.4.5/include/drm/drm_crtc.h b/ANDROID_3.4.5/include/drm/drm_crtc.h deleted file mode 100644 index e250eda4..00000000 --- a/ANDROID_3.4.5/include/drm/drm_crtc.h +++ /dev/null @@ -1,1029 +0,0 @@ -/* - * Copyright © 2006 Keith Packard - * Copyright © 2007-2008 Dave Airlie - * Copyright © 2007-2008 Intel Corporation - * Jesse Barnes <jesse.barnes@intel.com> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#ifndef __DRM_CRTC_H__ -#define __DRM_CRTC_H__ - -#include <linux/i2c.h> -#include <linux/spinlock.h> -#include <linux/types.h> -#include <linux/idr.h> -#include <linux/fb.h> - -#include <drm/drm_fourcc.h> - -struct drm_device; -struct drm_mode_set; -struct drm_framebuffer; - - -#define DRM_MODE_OBJECT_CRTC 0xcccccccc -#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 -#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 -#define DRM_MODE_OBJECT_MODE 0xdededede -#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 -#define DRM_MODE_OBJECT_FB 0xfbfbfbfb -#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb -#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee - -struct drm_mode_object { - uint32_t id; - uint32_t type; -}; - -/* - * Note on terminology: here, for brevity and convenience, we refer to connector - * control chips as 'CRTCs'. They can control any type of connector, VGA, LVDS, - * DVI, etc. And 'screen' refers to the whole of the visible display, which - * may span multiple monitors (and therefore multiple CRTC and connector - * structures). - */ - -enum drm_mode_status { - MODE_OK = 0, /* Mode OK */ - MODE_HSYNC, /* hsync out of range */ - MODE_VSYNC, /* vsync out of range */ - MODE_H_ILLEGAL, /* mode has illegal horizontal timings */ - MODE_V_ILLEGAL, /* mode has illegal horizontal timings */ - MODE_BAD_WIDTH, /* requires an unsupported linepitch */ - MODE_NOMODE, /* no mode with a matching name */ - MODE_NO_INTERLACE, /* interlaced mode not supported */ - MODE_NO_DBLESCAN, /* doublescan mode not supported */ - MODE_NO_VSCAN, /* multiscan mode not supported */ - MODE_MEM, /* insufficient video memory */ - MODE_VIRTUAL_X, /* mode width too large for specified virtual size */ - MODE_VIRTUAL_Y, /* mode height too large for specified virtual size */ - MODE_MEM_VIRT, /* insufficient video memory given virtual size */ - MODE_NOCLOCK, /* no fixed clock available */ - MODE_CLOCK_HIGH, /* clock required is too high */ - MODE_CLOCK_LOW, /* clock required is too low */ - MODE_CLOCK_RANGE, /* clock/mode isn't in a ClockRange */ - MODE_BAD_HVALUE, /* horizontal timing was out of range */ - MODE_BAD_VVALUE, /* vertical timing was out of range */ - MODE_BAD_VSCAN, /* VScan value out of range */ - MODE_HSYNC_NARROW, /* horizontal sync too narrow */ - MODE_HSYNC_WIDE, /* horizontal sync too wide */ - MODE_HBLANK_NARROW, /* horizontal blanking too narrow */ - MODE_HBLANK_WIDE, /* horizontal blanking too wide */ - MODE_VSYNC_NARROW, /* vertical sync too narrow */ - MODE_VSYNC_WIDE, /* vertical sync too wide */ - MODE_VBLANK_NARROW, /* vertical blanking too narrow */ - MODE_VBLANK_WIDE, /* vertical blanking too wide */ - MODE_PANEL, /* exceeds panel dimensions */ - MODE_INTERLACE_WIDTH, /* width too large for interlaced mode */ - MODE_ONE_WIDTH, /* only one width is supported */ - MODE_ONE_HEIGHT, /* only one height is supported */ - MODE_ONE_SIZE, /* only one resolution is supported */ - MODE_NO_REDUCED, /* monitor doesn't accept reduced blanking */ - MODE_UNVERIFIED = -3, /* mode needs to reverified */ - MODE_BAD = -2, /* unspecified reason */ - MODE_ERROR = -1 /* error condition */ -}; - -#define DRM_MODE_TYPE_CLOCK_CRTC_C (DRM_MODE_TYPE_CLOCK_C | \ - DRM_MODE_TYPE_CRTC_C) - -#define DRM_MODE(nm, t, c, hd, hss, hse, ht, hsk, vd, vss, vse, vt, vs, f) \ - .name = nm, .status = 0, .type = (t), .clock = (c), \ - .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \ - .htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \ - .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \ - .vscan = (vs), .flags = (f), .vrefresh = 0 - -#define CRTC_INTERLACE_HALVE_V 0x1 /* halve V values for interlacing */ - -struct drm_display_mode { - /* Header */ - struct list_head head; - struct drm_mode_object base; - - char name[DRM_DISPLAY_MODE_LEN]; - - enum drm_mode_status status; - unsigned int type; - - /* Proposed mode values */ - int clock; /* in kHz */ - int hdisplay; - int hsync_start; - int hsync_end; - int htotal; - int hskew; - int vdisplay; - int vsync_start; - int vsync_end; - int vtotal; - int vscan; - unsigned int flags; - - /* Addressable image size (may be 0 for projectors, etc.) */ - int width_mm; - int height_mm; - - /* Actual mode we give to hw */ - int clock_index; - int synth_clock; - int crtc_hdisplay; - int crtc_hblank_start; - int crtc_hblank_end; - int crtc_hsync_start; - int crtc_hsync_end; - int crtc_htotal; - int crtc_hskew; - int crtc_vdisplay; - int crtc_vblank_start; - int crtc_vblank_end; - int crtc_vsync_start; - int crtc_vsync_end; - int crtc_vtotal; - int crtc_hadjusted; - int crtc_vadjusted; - - /* Driver private mode info */ - int private_size; - int *private; - int private_flags; - - int vrefresh; /* in Hz */ - int hsync; /* in kHz */ -}; - -enum drm_connector_status { - connector_status_connected = 1, - connector_status_disconnected = 2, - connector_status_unknown = 3, -}; - -enum subpixel_order { - SubPixelUnknown = 0, - SubPixelHorizontalRGB, - SubPixelHorizontalBGR, - SubPixelVerticalRGB, - SubPixelVerticalBGR, - SubPixelNone, -}; - -#define DRM_COLOR_FORMAT_RGB444 (1<<0) -#define DRM_COLOR_FORMAT_YCRCB444 (1<<1) -#define DRM_COLOR_FORMAT_YCRCB422 (1<<2) -/* - * Describes a given display (e.g. CRT or flat panel) and its limitations. - */ -struct drm_display_info { - char name[DRM_DISPLAY_INFO_LEN]; - - /* Physical size */ - unsigned int width_mm; - unsigned int height_mm; - - /* Clock limits FIXME: storage format */ - unsigned int min_vfreq, max_vfreq; - unsigned int min_hfreq, max_hfreq; - unsigned int pixel_clock; - unsigned int bpc; - - enum subpixel_order subpixel_order; - u32 color_formats; - - u8 cea_rev; - - char *raw_edid; /* if any */ -}; - -struct drm_framebuffer_funcs { - void (*destroy)(struct drm_framebuffer *framebuffer); - int (*create_handle)(struct drm_framebuffer *fb, - struct drm_file *file_priv, - unsigned int *handle); - /** - * Optinal callback for the dirty fb ioctl. - * - * Userspace can notify the driver via this callback - * that a area of the framebuffer has changed and should - * be flushed to the display hardware. - * - * See documentation in drm_mode.h for the struct - * drm_mode_fb_dirty_cmd for more information as all - * the semantics and arguments have a one to one mapping - * on this function. - */ - int (*dirty)(struct drm_framebuffer *framebuffer, - struct drm_file *file_priv, unsigned flags, - unsigned color, struct drm_clip_rect *clips, - unsigned num_clips); -}; - -struct drm_framebuffer { - struct drm_device *dev; - struct list_head head; - struct drm_mode_object base; - const struct drm_framebuffer_funcs *funcs; - unsigned int pitches[4]; - unsigned int offsets[4]; - unsigned int width; - unsigned int height; - /* depth can be 15 or 16 */ - unsigned int depth; - int bits_per_pixel; - int flags; - uint32_t pixel_format; /* fourcc format */ - struct list_head filp_head; - /* if you are using the helper */ - void *helper_private; -}; - -struct drm_property_blob { - struct drm_mode_object base; - struct list_head head; - unsigned int length; - unsigned char data[]; -}; - -struct drm_property_enum { - uint64_t value; - struct list_head head; - char name[DRM_PROP_NAME_LEN]; -}; - -struct drm_property { - struct list_head head; - struct drm_mode_object base; - uint32_t flags; - char name[DRM_PROP_NAME_LEN]; - uint32_t num_values; - uint64_t *values; - - struct list_head enum_blob_list; -}; - -struct drm_crtc; -struct drm_connector; -struct drm_encoder; -struct drm_pending_vblank_event; -struct drm_plane; - -/** - * drm_crtc_funcs - control CRTCs for a given device - * @reset: reset CRTC after state has been invalidate (e.g. resume) - * @dpms: control display power levels - * @save: save CRTC state - * @resore: restore CRTC state - * @lock: lock the CRTC - * @unlock: unlock the CRTC - * @shadow_allocate: allocate shadow pixmap - * @shadow_create: create shadow pixmap for rotation support - * @shadow_destroy: free shadow pixmap - * @mode_fixup: fixup proposed mode - * @mode_set: set the desired mode on the CRTC - * @gamma_set: specify color ramp for CRTC - * @destroy: deinit and free object. - * - * The drm_crtc_funcs structure is the central CRTC management structure - * in the DRM. Each CRTC controls one or more connectors (note that the name - * CRTC is simply historical, a CRTC may control LVDS, VGA, DVI, TV out, etc. - * connectors, not just CRTs). - * - * Each driver is responsible for filling out this structure at startup time, - * in addition to providing other modesetting features, like i2c and DDC - * bus accessors. - */ -struct drm_crtc_funcs { - /* Save CRTC state */ - void (*save)(struct drm_crtc *crtc); /* suspend? */ - /* Restore CRTC state */ - void (*restore)(struct drm_crtc *crtc); /* resume? */ - /* Reset CRTC state */ - void (*reset)(struct drm_crtc *crtc); - - /* cursor controls */ - int (*cursor_set)(struct drm_crtc *crtc, struct drm_file *file_priv, - uint32_t handle, uint32_t width, uint32_t height); - int (*cursor_move)(struct drm_crtc *crtc, int x, int y); - - /* Set gamma on the CRTC */ - void (*gamma_set)(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, - uint32_t start, uint32_t size); - /* Object destroy routine */ - void (*destroy)(struct drm_crtc *crtc); - - int (*set_config)(struct drm_mode_set *set); - - /* - * Flip to the given framebuffer. This implements the page - * flip ioctl described in drm_mode.h, specifically, the - * implementation must return immediately and block all - * rendering to the current fb until the flip has completed. - * If userspace set the event flag in the ioctl, the event - * argument will point to an event to send back when the flip - * completes, otherwise it will be NULL. - */ - int (*page_flip)(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct drm_pending_vblank_event *event); -}; - -/** - * drm_crtc - central CRTC control structure - * @dev: parent DRM device - * @head: list management - * @base: base KMS object for ID tracking etc. - * @enabled: is this CRTC enabled? - * @mode: current mode timings - * @hwmode: mode timings as programmed to hw regs - * @x: x position on screen - * @y: y position on screen - * @funcs: CRTC control functions - * @gamma_size: size of gamma ramp - * @gamma_store: gamma ramp values - * @framedur_ns: precise frame timing - * @framedur_ns: precise line timing - * @pixeldur_ns: precise pixel timing - * @helper_private: mid-layer private data - * - * Each CRTC may have one or more connectors associated with it. This structure - * allows the CRTC to be controlled. - */ -struct drm_crtc { - struct drm_device *dev; - struct list_head head; - - struct drm_mode_object base; - - /* framebuffer the connector is currently bound to */ - struct drm_framebuffer *fb; - - bool enabled; - - /* Requested mode from modesetting. */ - struct drm_display_mode mode; - - /* Programmed mode in hw, after adjustments for encoders, - * crtc, panel scaling etc. Needed for timestamping etc. - */ - struct drm_display_mode hwmode; - - int x, y; - const struct drm_crtc_funcs *funcs; - - /* CRTC gamma size for reporting to userspace */ - uint32_t gamma_size; - uint16_t *gamma_store; - - /* Constants needed for precise vblank and swap timestamping. */ - s64 framedur_ns, linedur_ns, pixeldur_ns; - - /* if you are using the helper */ - void *helper_private; -}; - - -/** - * drm_connector_funcs - control connectors on a given device - * @dpms: set power state (see drm_crtc_funcs above) - * @save: save connector state - * @restore: restore connector state - * @reset: reset connector after state has been invalidate (e.g. resume) - * @mode_valid: is this mode valid on the given connector? - * @mode_fixup: try to fixup proposed mode for this connector - * @mode_set: set this mode - * @detect: is this connector active? - * @get_modes: get mode list for this connector - * @set_property: property for this connector may need update - * @destroy: make object go away - * @force: notify the driver the connector is forced on - * - * Each CRTC may have one or more connectors attached to it. The functions - * below allow the core DRM code to control connectors, enumerate available modes, - * etc. - */ -struct drm_connector_funcs { - void (*dpms)(struct drm_connector *connector, int mode); - void (*save)(struct drm_connector *connector); - void (*restore)(struct drm_connector *connector); - void (*reset)(struct drm_connector *connector); - - /* Check to see if anything is attached to the connector. - * @force is set to false whilst polling, true when checking the - * connector due to user request. @force can be used by the driver - * to avoid expensive, destructive operations during automated - * probing. - */ - enum drm_connector_status (*detect)(struct drm_connector *connector, - bool force); - int (*fill_modes)(struct drm_connector *connector, uint32_t max_width, uint32_t max_height); - int (*set_property)(struct drm_connector *connector, struct drm_property *property, - uint64_t val); - void (*destroy)(struct drm_connector *connector); - void (*force)(struct drm_connector *connector); -}; - -/** - * drm_encoder_funcs - encoder controls - * @reset: reset state (e.g. at init or resume time) - * @destroy: cleanup and free associated data - * - * Encoders sit between CRTCs and connectors. - */ -struct drm_encoder_funcs { - void (*reset)(struct drm_encoder *encoder); - void (*destroy)(struct drm_encoder *encoder); -}; - -#define DRM_CONNECTOR_MAX_UMODES 16 -#define DRM_CONNECTOR_MAX_PROPERTY 16 -#define DRM_CONNECTOR_LEN 32 -#define DRM_CONNECTOR_MAX_ENCODER 3 - -/** - * drm_encoder - central DRM encoder structure - * @dev: parent DRM device - * @head: list management - * @base: base KMS object - * @encoder_type: one of the %DRM_MODE_ENCODER_<foo> types in drm_mode.h - * @possible_crtcs: bitmask of potential CRTC bindings - * @possible_clones: bitmask of potential sibling encoders for cloning - * @crtc: currently bound CRTC - * @funcs: control functions - * @helper_private: mid-layer private data - * - * CRTCs drive pixels to encoders, which convert them into signals - * appropriate for a given connector or set of connectors. - */ -struct drm_encoder { - struct drm_device *dev; - struct list_head head; - - struct drm_mode_object base; - int encoder_type; - uint32_t possible_crtcs; - uint32_t possible_clones; - - struct drm_crtc *crtc; - const struct drm_encoder_funcs *funcs; - void *helper_private; -}; - -enum drm_connector_force { - DRM_FORCE_UNSPECIFIED, - DRM_FORCE_OFF, - DRM_FORCE_ON, /* force on analog part normally */ - DRM_FORCE_ON_DIGITAL, /* for DVI-I use digital connector */ -}; - -/* should we poll this connector for connects and disconnects */ -/* hot plug detectable */ -#define DRM_CONNECTOR_POLL_HPD (1 << 0) -/* poll for connections */ -#define DRM_CONNECTOR_POLL_CONNECT (1 << 1) -/* can cleanly poll for disconnections without flickering the screen */ -/* DACs should rarely do this without a lot of testing */ -#define DRM_CONNECTOR_POLL_DISCONNECT (1 << 2) - -#define MAX_ELD_BYTES 128 - -/** - * drm_connector - central DRM connector control structure - * @dev: parent DRM device - * @kdev: kernel device for sysfs attributes - * @attr: sysfs attributes - * @head: list management - * @base: base KMS object - * @connector_type: one of the %DRM_MODE_CONNECTOR_<foo> types from drm_mode.h - * @connector_type_id: index into connector type enum - * @interlace_allowed: can this connector handle interlaced modes? - * @doublescan_allowed: can this connector handle doublescan? - * @modes: modes available on this connector (from fill_modes() + user) - * @status: one of the drm_connector_status enums (connected, not, or unknown) - * @probed_modes: list of modes derived directly from the display - * @display_info: information about attached display (e.g. from EDID) - * @funcs: connector control functions - * @user_modes: user added mode list - * @edid_blob_ptr: DRM property containing EDID if present - * @property_ids: property tracking for this connector - * @property_values: value pointers or data for properties - * @polled: a %DRM_CONNECTOR_POLL_<foo> value for core driven polling - * @dpms: current dpms state - * @helper_private: mid-layer private data - * @force: a %DRM_FORCE_<foo> state for forced mode sets - * @encoder_ids: valid encoders for this connector - * @encoder: encoder driving this connector, if any - * @eld: EDID-like data, if present - * @dvi_dual: dual link DVI, if found - * @max_tmds_clock: max clock rate, if found - * @latency_present: AV delay info from ELD, if found - * @video_latency: video latency info from ELD, if found - * @audio_latency: audio latency info from ELD, if found - * @null_edid_counter: track sinks that give us all zeros for the EDID - * - * Each connector may be connected to one or more CRTCs, or may be clonable by - * another connector if they can share a CRTC. Each connector also has a specific - * position in the broader display (referred to as a 'screen' though it could - * span multiple monitors). - */ -struct drm_connector { - struct drm_device *dev; - struct device kdev; - struct device_attribute *attr; - struct list_head head; - - struct drm_mode_object base; - - int connector_type; - int connector_type_id; - bool interlace_allowed; - bool doublescan_allowed; - struct list_head modes; /* list of modes on this connector */ - - enum drm_connector_status status; - - /* these are modes added by probing with DDC or the BIOS */ - struct list_head probed_modes; - - struct drm_display_info display_info; - const struct drm_connector_funcs *funcs; - - struct list_head user_modes; - struct drm_property_blob *edid_blob_ptr; - u32 property_ids[DRM_CONNECTOR_MAX_PROPERTY]; - uint64_t property_values[DRM_CONNECTOR_MAX_PROPERTY]; - - uint8_t polled; /* DRM_CONNECTOR_POLL_* */ - - /* requested DPMS state */ - int dpms; - - void *helper_private; - - /* forced on connector */ - enum drm_connector_force force; - uint32_t encoder_ids[DRM_CONNECTOR_MAX_ENCODER]; - struct drm_encoder *encoder; /* currently active encoder */ - - /* EDID bits */ - uint8_t eld[MAX_ELD_BYTES]; - bool dvi_dual; - int max_tmds_clock; /* in MHz */ - bool latency_present[2]; - int video_latency[2]; /* [0]: progressive, [1]: interlaced */ - int audio_latency[2]; - int null_edid_counter; /* needed to workaround some HW bugs where we get all 0s */ -}; - -/** - * drm_plane_funcs - driver plane control functions - * @update_plane: update the plane configuration - * @disable_plane: shut down the plane - * @destroy: clean up plane resources - */ -struct drm_plane_funcs { - int (*update_plane)(struct drm_plane *plane, - struct drm_crtc *crtc, struct drm_framebuffer *fb, - int crtc_x, int crtc_y, - unsigned int crtc_w, unsigned int crtc_h, - uint32_t src_x, uint32_t src_y, - uint32_t src_w, uint32_t src_h); - int (*disable_plane)(struct drm_plane *plane); - void (*destroy)(struct drm_plane *plane); -}; - -/** - * drm_plane - central DRM plane control structure - * @dev: DRM device this plane belongs to - * @head: for list management - * @base: base mode object - * @possible_crtcs: pipes this plane can be bound to - * @format_types: array of formats supported by this plane - * @format_count: number of formats supported - * @crtc: currently bound CRTC - * @fb: currently bound fb - * @gamma_size: size of gamma table - * @gamma_store: gamma correction table - * @enabled: enabled flag - * @funcs: helper functions - * @helper_private: storage for drver layer - */ -struct drm_plane { - struct drm_device *dev; - struct list_head head; - - struct drm_mode_object base; - - uint32_t possible_crtcs; - uint32_t *format_types; - uint32_t format_count; - - struct drm_crtc *crtc; - struct drm_framebuffer *fb; - - /* CRTC gamma size for reporting to userspace */ - uint32_t gamma_size; - uint16_t *gamma_store; - - bool enabled; - - const struct drm_plane_funcs *funcs; - void *helper_private; -}; - -/** - * drm_mode_set - new values for a CRTC config change - * @head: list management - * @fb: framebuffer to use for new config - * @crtc: CRTC whose configuration we're about to change - * @mode: mode timings to use - * @x: position of this CRTC relative to @fb - * @y: position of this CRTC relative to @fb - * @connectors: array of connectors to drive with this CRTC if possible - * @num_connectors: size of @connectors array - * - * Represents a single crtc the connectors that it drives with what mode - * and from which framebuffer it scans out from. - * - * This is used to set modes. - */ -struct drm_mode_set { - struct list_head head; - - struct drm_framebuffer *fb; - struct drm_crtc *crtc; - struct drm_display_mode *mode; - - uint32_t x; - uint32_t y; - - struct drm_connector **connectors; - size_t num_connectors; -}; - -/** - * struct drm_mode_config_funcs - basic driver provided mode setting functions - * @fb_create: create a new framebuffer object - * @output_poll_changed: function to handle output configuration changes - * - * Some global (i.e. not per-CRTC, connector, etc) mode setting functions that - * involve drivers. - */ -struct drm_mode_config_funcs { - struct drm_framebuffer *(*fb_create)(struct drm_device *dev, - struct drm_file *file_priv, - struct drm_mode_fb_cmd2 *mode_cmd); - void (*output_poll_changed)(struct drm_device *dev); -}; - -/** - * drm_mode_group - group of mode setting resources for potential sub-grouping - * @num_crtcs: CRTC count - * @num_encoders: encoder count - * @num_connectors: connector count - * @id_list: list of KMS object IDs in this group - * - * Currently this simply tracks the global mode setting state. But in the - * future it could allow groups of objects to be set aside into independent - * control groups for use by different user level processes (e.g. two X servers - * running simultaneously on different heads, each with their own mode - * configuration and freedom of mode setting). - */ -struct drm_mode_group { - uint32_t num_crtcs; - uint32_t num_encoders; - uint32_t num_connectors; - - /* list of object IDs for this group */ - uint32_t *id_list; -}; - -/** - * drm_mode_config - Mode configuration control structure - * @mutex: mutex protecting KMS related lists and structures - * @idr_mutex: mutex for KMS ID allocation and management - * @crtc_idr: main KMS ID tracking object - * @num_fb: number of fbs available - * @fb_list: list of framebuffers available - * @num_connector: number of connectors on this device - * @connector_list: list of connector objects - * @num_encoder: number of encoders on this device - * @encoder_list: list of encoder objects - * @num_crtc: number of CRTCs on this device - * @crtc_list: list of CRTC objects - * @min_width: minimum pixel width on this device - * @min_height: minimum pixel height on this device - * @max_width: maximum pixel width on this device - * @max_height: maximum pixel height on this device - * @funcs: core driver provided mode setting functions - * @fb_base: base address of the framebuffer - * @poll_enabled: track polling status for this device - * @output_poll_work: delayed work for polling in process context - * @*_property: core property tracking - * - * Core mode resource tracking structure. All CRTC, encoders, and connectors - * enumerated by the driver are added here, as are global properties. Some - * global restrictions are also here, e.g. dimension restrictions. - */ -struct drm_mode_config { - struct mutex mutex; /* protects configuration (mode lists etc.) */ - struct mutex idr_mutex; /* for IDR management */ - struct idr crtc_idr; /* use this idr for all IDs, fb, crtc, connector, modes - just makes life easier */ - /* this is limited to one for now */ - int num_fb; - struct list_head fb_list; - int num_connector; - struct list_head connector_list; - int num_encoder; - struct list_head encoder_list; - int num_plane; - struct list_head plane_list; - - int num_crtc; - struct list_head crtc_list; - - struct list_head property_list; - - int min_width, min_height; - int max_width, max_height; - struct drm_mode_config_funcs *funcs; - resource_size_t fb_base; - - /* output poll support */ - bool poll_enabled; - struct delayed_work output_poll_work; - - /* pointers to standard properties */ - struct list_head property_blob_list; - struct drm_property *edid_property; - struct drm_property *dpms_property; - - /* DVI-I properties */ - struct drm_property *dvi_i_subconnector_property; - struct drm_property *dvi_i_select_subconnector_property; - - /* TV properties */ - struct drm_property *tv_subconnector_property; - struct drm_property *tv_select_subconnector_property; - struct drm_property *tv_mode_property; - struct drm_property *tv_left_margin_property; - struct drm_property *tv_right_margin_property; - struct drm_property *tv_top_margin_property; - struct drm_property *tv_bottom_margin_property; - struct drm_property *tv_brightness_property; - struct drm_property *tv_contrast_property; - struct drm_property *tv_flicker_reduction_property; - struct drm_property *tv_overscan_property; - struct drm_property *tv_saturation_property; - struct drm_property *tv_hue_property; - - /* Optional properties */ - struct drm_property *scaling_mode_property; - struct drm_property *dithering_mode_property; - struct drm_property *dirty_info_property; - - /* dumb ioctl parameters */ - uint32_t preferred_depth, prefer_shadow; -}; - -#define obj_to_crtc(x) container_of(x, struct drm_crtc, base) -#define obj_to_connector(x) container_of(x, struct drm_connector, base) -#define obj_to_encoder(x) container_of(x, struct drm_encoder, base) -#define obj_to_mode(x) container_of(x, struct drm_display_mode, base) -#define obj_to_fb(x) container_of(x, struct drm_framebuffer, base) -#define obj_to_property(x) container_of(x, struct drm_property, base) -#define obj_to_blob(x) container_of(x, struct drm_property_blob, base) -#define obj_to_plane(x) container_of(x, struct drm_plane, base) - -struct drm_prop_enum_list { - int type; - char *name; -}; - -extern int drm_crtc_init(struct drm_device *dev, - struct drm_crtc *crtc, - const struct drm_crtc_funcs *funcs); -extern void drm_crtc_cleanup(struct drm_crtc *crtc); - -extern int drm_connector_init(struct drm_device *dev, - struct drm_connector *connector, - const struct drm_connector_funcs *funcs, - int connector_type); - -extern void drm_connector_cleanup(struct drm_connector *connector); -/* helper to unplug all connectors from sysfs for device */ -extern void drm_connector_unplug_all(struct drm_device *dev); - -extern int drm_encoder_init(struct drm_device *dev, - struct drm_encoder *encoder, - const struct drm_encoder_funcs *funcs, - int encoder_type); - -extern int drm_plane_init(struct drm_device *dev, - struct drm_plane *plane, - unsigned long possible_crtcs, - const struct drm_plane_funcs *funcs, - const uint32_t *formats, uint32_t format_count, - bool priv); -extern void drm_plane_cleanup(struct drm_plane *plane); - -extern void drm_encoder_cleanup(struct drm_encoder *encoder); - -extern char *drm_get_connector_name(struct drm_connector *connector); -extern char *drm_get_dpms_name(int val); -extern char *drm_get_dvi_i_subconnector_name(int val); -extern char *drm_get_dvi_i_select_name(int val); -extern char *drm_get_tv_subconnector_name(int val); -extern char *drm_get_tv_select_name(int val); -extern void drm_fb_release(struct drm_file *file_priv); -extern int drm_mode_group_init_legacy_group(struct drm_device *dev, struct drm_mode_group *group); -extern struct edid *drm_get_edid(struct drm_connector *connector, - struct i2c_adapter *adapter); -extern int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid); -extern void drm_mode_probed_add(struct drm_connector *connector, struct drm_display_mode *mode); -extern void drm_mode_remove(struct drm_connector *connector, struct drm_display_mode *mode); -extern void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src); -extern struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, - const struct drm_display_mode *mode); -extern void drm_mode_debug_printmodeline(struct drm_display_mode *mode); -extern void drm_mode_config_init(struct drm_device *dev); -extern void drm_mode_config_reset(struct drm_device *dev); -extern void drm_mode_config_cleanup(struct drm_device *dev); -extern void drm_mode_set_name(struct drm_display_mode *mode); -extern bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2); -extern int drm_mode_width(struct drm_display_mode *mode); -extern int drm_mode_height(struct drm_display_mode *mode); - -/* for us by fb module */ -extern int drm_mode_attachmode_crtc(struct drm_device *dev, - struct drm_crtc *crtc, - const struct drm_display_mode *mode); -extern int drm_mode_detachmode_crtc(struct drm_device *dev, struct drm_display_mode *mode); - -extern struct drm_display_mode *drm_mode_create(struct drm_device *dev); -extern void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode); -extern void drm_mode_list_concat(struct list_head *head, - struct list_head *new); -extern void drm_mode_validate_size(struct drm_device *dev, - struct list_head *mode_list, - int maxX, int maxY, int maxPitch); -extern void drm_mode_prune_invalid(struct drm_device *dev, - struct list_head *mode_list, bool verbose); -extern void drm_mode_sort(struct list_head *mode_list); -extern int drm_mode_hsync(const struct drm_display_mode *mode); -extern int drm_mode_vrefresh(const struct drm_display_mode *mode); -extern void drm_mode_set_crtcinfo(struct drm_display_mode *p, - int adjust_flags); -extern void drm_mode_connector_list_update(struct drm_connector *connector); -extern int drm_mode_connector_update_edid_property(struct drm_connector *connector, - struct edid *edid); -extern int drm_connector_property_set_value(struct drm_connector *connector, - struct drm_property *property, - uint64_t value); -extern int drm_connector_property_get_value(struct drm_connector *connector, - struct drm_property *property, - uint64_t *value); -extern struct drm_display_mode *drm_crtc_mode_create(struct drm_device *dev); -extern void drm_framebuffer_set_object(struct drm_device *dev, - unsigned long handle); -extern int drm_framebuffer_init(struct drm_device *dev, - struct drm_framebuffer *fb, - const struct drm_framebuffer_funcs *funcs); -extern void drm_framebuffer_cleanup(struct drm_framebuffer *fb); -extern int drmfb_probe(struct drm_device *dev, struct drm_crtc *crtc); -extern int drmfb_remove(struct drm_device *dev, struct drm_framebuffer *fb); -extern void drm_crtc_probe_connector_modes(struct drm_device *dev, int maxX, int maxY); -extern bool drm_crtc_in_use(struct drm_crtc *crtc); - -extern int drm_connector_attach_property(struct drm_connector *connector, - struct drm_property *property, uint64_t init_val); -extern struct drm_property *drm_property_create(struct drm_device *dev, int flags, - const char *name, int num_values); -extern struct drm_property *drm_property_create_enum(struct drm_device *dev, int flags, - const char *name, - const struct drm_prop_enum_list *props, - int num_values); -struct drm_property *drm_property_create_range(struct drm_device *dev, int flags, - const char *name, - uint64_t min, uint64_t max); -extern void drm_property_destroy(struct drm_device *dev, struct drm_property *property); -extern int drm_property_add_enum(struct drm_property *property, int index, - uint64_t value, const char *name); -extern int drm_mode_create_dvi_i_properties(struct drm_device *dev); -extern int drm_mode_create_tv_properties(struct drm_device *dev, int num_formats, - char *formats[]); -extern int drm_mode_create_scaling_mode_property(struct drm_device *dev); -extern int drm_mode_create_dithering_property(struct drm_device *dev); -extern int drm_mode_create_dirty_info_property(struct drm_device *dev); -extern char *drm_get_encoder_name(struct drm_encoder *encoder); - -extern int drm_mode_connector_attach_encoder(struct drm_connector *connector, - struct drm_encoder *encoder); -extern void drm_mode_connector_detach_encoder(struct drm_connector *connector, - struct drm_encoder *encoder); -extern int drm_mode_crtc_set_gamma_size(struct drm_crtc *crtc, - int gamma_size); -extern struct drm_mode_object *drm_mode_object_find(struct drm_device *dev, - uint32_t id, uint32_t type); -/* IOCTLs */ -extern int drm_mode_getresources(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_getplane_res(struct drm_device *dev, void *data, - struct drm_file *file_priv); -extern int drm_mode_getcrtc(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_getconnector(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_setcrtc(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_getplane(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_setplane(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_cursor_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_addfb(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_addfb2(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern uint32_t drm_mode_legacy_fb_format(uint32_t bpp, uint32_t depth); -extern int drm_mode_rmfb(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_getfb(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_dirtyfb_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_addmode_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_rmmode_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_attachmode_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_detachmode_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); - -extern int drm_mode_getproperty_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_getblob_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_connector_property_set_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_hotplug_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_replacefb(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_getencoder(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_gamma_get_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_gamma_set_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern u8 *drm_find_cea_extension(struct edid *edid); -extern bool drm_detect_hdmi_monitor(struct edid *edid); -extern bool drm_detect_monitor_audio(struct edid *edid); -extern int drm_mode_page_flip_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, - int hdisplay, int vdisplay, int vrefresh, - bool reduced, bool interlaced, bool margins); -extern struct drm_display_mode *drm_gtf_mode(struct drm_device *dev, - int hdisplay, int vdisplay, int vrefresh, - bool interlaced, int margins); -extern struct drm_display_mode *drm_gtf_mode_complex(struct drm_device *dev, - int hdisplay, int vdisplay, int vrefresh, - bool interlaced, int margins, int GTF_M, - int GTF_2C, int GTF_K, int GTF_2J); -extern int drm_add_modes_noedid(struct drm_connector *connector, - int hdisplay, int vdisplay); - -extern int drm_edid_header_is_valid(const u8 *raw_edid); -extern bool drm_edid_block_valid(u8 *raw_edid); -extern bool drm_edid_is_valid(struct edid *edid); -struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, - int hsize, int vsize, int fresh); - -extern int drm_mode_create_dumb_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_mmap_dumb_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); -extern int drm_mode_destroy_dumb_ioctl(struct drm_device *dev, - void *data, struct drm_file *file_priv); - -extern void drm_fb_get_bpp_depth(uint32_t format, unsigned int *depth, - int *bpp); -#endif /* __DRM_CRTC_H__ */ diff --git a/ANDROID_3.4.5/include/drm/drm_crtc_helper.h b/ANDROID_3.4.5/include/drm/drm_crtc_helper.h deleted file mode 100644 index 37515d1a..00000000 --- a/ANDROID_3.4.5/include/drm/drm_crtc_helper.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright © 2006 Keith Packard - * Copyright © 2007-2008 Dave Airlie - * Copyright © 2007-2008 Intel Corporation - * Jesse Barnes <jesse.barnes@intel.com> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -/* - * The DRM mode setting helper functions are common code for drivers to use if - * they wish. Drivers are not forced to use this code in their - * implementations but it would be useful if they code they do use at least - * provides a consistent interface and operation to userspace - */ - -#ifndef __DRM_CRTC_HELPER_H__ -#define __DRM_CRTC_HELPER_H__ - -#include <linux/spinlock.h> -#include <linux/types.h> -#include <linux/idr.h> - -#include <linux/fb.h> - -enum mode_set_atomic { - LEAVE_ATOMIC_MODE_SET, - ENTER_ATOMIC_MODE_SET, -}; - -struct drm_crtc_helper_funcs { - /* - * Control power levels on the CRTC. If the mode passed in is - * unsupported, the provider must use the next lowest power level. - */ - void (*dpms)(struct drm_crtc *crtc, int mode); - void (*prepare)(struct drm_crtc *crtc); - void (*commit)(struct drm_crtc *crtc); - - /* Provider can fixup or change mode timings before modeset occurs */ - bool (*mode_fixup)(struct drm_crtc *crtc, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); - /* Actually set the mode */ - int (*mode_set)(struct drm_crtc *crtc, struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode, int x, int y, - struct drm_framebuffer *old_fb); - - /* Move the crtc on the current fb to the given position *optional* */ - int (*mode_set_base)(struct drm_crtc *crtc, int x, int y, - struct drm_framebuffer *old_fb); - int (*mode_set_base_atomic)(struct drm_crtc *crtc, - struct drm_framebuffer *fb, int x, int y, - enum mode_set_atomic); - - /* reload the current crtc LUT */ - void (*load_lut)(struct drm_crtc *crtc); - - /* disable crtc when not in use - more explicit than dpms off */ - void (*disable)(struct drm_crtc *crtc); -}; - -struct drm_encoder_helper_funcs { - void (*dpms)(struct drm_encoder *encoder, int mode); - void (*save)(struct drm_encoder *encoder); - void (*restore)(struct drm_encoder *encoder); - - bool (*mode_fixup)(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); - void (*prepare)(struct drm_encoder *encoder); - void (*commit)(struct drm_encoder *encoder); - void (*mode_set)(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); - struct drm_crtc *(*get_crtc)(struct drm_encoder *encoder); - /* detect for DAC style encoders */ - enum drm_connector_status (*detect)(struct drm_encoder *encoder, - struct drm_connector *connector); - /* disable encoder when not in use - more explicit than dpms off */ - void (*disable)(struct drm_encoder *encoder); -}; - -struct drm_connector_helper_funcs { - int (*get_modes)(struct drm_connector *connector); - int (*mode_valid)(struct drm_connector *connector, - struct drm_display_mode *mode); - struct drm_encoder *(*best_encoder)(struct drm_connector *connector); -}; - -extern int drm_helper_probe_single_connector_modes(struct drm_connector *connector, uint32_t maxX, uint32_t maxY); -extern void drm_helper_disable_unused_functions(struct drm_device *dev); -extern int drm_crtc_helper_set_config(struct drm_mode_set *set); -extern bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, - struct drm_display_mode *mode, - int x, int y, - struct drm_framebuffer *old_fb); -extern bool drm_helper_crtc_in_use(struct drm_crtc *crtc); -extern bool drm_helper_encoder_in_use(struct drm_encoder *encoder); - -extern void drm_helper_connector_dpms(struct drm_connector *connector, int mode); - -extern int drm_helper_mode_fill_fb_struct(struct drm_framebuffer *fb, - struct drm_mode_fb_cmd2 *mode_cmd); - -static inline void drm_crtc_helper_add(struct drm_crtc *crtc, - const struct drm_crtc_helper_funcs *funcs) -{ - crtc->helper_private = (void *)funcs; -} - -static inline void drm_encoder_helper_add(struct drm_encoder *encoder, - const struct drm_encoder_helper_funcs *funcs) -{ - encoder->helper_private = (void *)funcs; -} - -static inline void drm_connector_helper_add(struct drm_connector *connector, - const struct drm_connector_helper_funcs *funcs) -{ - connector->helper_private = (void *)funcs; -} - -extern int drm_helper_resume_force_mode(struct drm_device *dev); -extern void drm_kms_helper_poll_init(struct drm_device *dev); -extern void drm_kms_helper_poll_fini(struct drm_device *dev); -extern void drm_helper_hpd_irq_event(struct drm_device *dev); - -extern void drm_kms_helper_poll_disable(struct drm_device *dev); -extern void drm_kms_helper_poll_enable(struct drm_device *dev); - -extern int drm_format_num_planes(uint32_t format); - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_dp_helper.h b/ANDROID_3.4.5/include/drm/drm_dp_helper.h deleted file mode 100644 index 93df2d72..00000000 --- a/ANDROID_3.4.5/include/drm/drm_dp_helper.h +++ /dev/null @@ -1,252 +0,0 @@ -/* - * Copyright © 2008 Keith Packard - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that copyright - * notice and this permission notice appear in supporting documentation, and - * that the name of the copyright holders not be used in advertising or - * publicity pertaining to distribution of the software without specific, - * written prior permission. The copyright holders make no representations - * about the suitability of this software for any purpose. It is provided "as - * is" without express or implied warranty. - * - * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THIS SOFTWARE. - */ - -#ifndef _DRM_DP_HELPER_H_ -#define _DRM_DP_HELPER_H_ - -#include <linux/types.h> -#include <linux/i2c.h> - -/* From the VESA DisplayPort spec */ - -#define AUX_NATIVE_WRITE 0x8 -#define AUX_NATIVE_READ 0x9 -#define AUX_I2C_WRITE 0x0 -#define AUX_I2C_READ 0x1 -#define AUX_I2C_STATUS 0x2 -#define AUX_I2C_MOT 0x4 - -#define AUX_NATIVE_REPLY_ACK (0x0 << 4) -#define AUX_NATIVE_REPLY_NACK (0x1 << 4) -#define AUX_NATIVE_REPLY_DEFER (0x2 << 4) -#define AUX_NATIVE_REPLY_MASK (0x3 << 4) - -#define AUX_I2C_REPLY_ACK (0x0 << 6) -#define AUX_I2C_REPLY_NACK (0x1 << 6) -#define AUX_I2C_REPLY_DEFER (0x2 << 6) -#define AUX_I2C_REPLY_MASK (0x3 << 6) - -/* AUX CH addresses */ -/* DPCD */ -#define DP_DPCD_REV 0x000 - -#define DP_MAX_LINK_RATE 0x001 - -#define DP_MAX_LANE_COUNT 0x002 -# define DP_MAX_LANE_COUNT_MASK 0x1f -# define DP_TPS3_SUPPORTED (1 << 6) -# define DP_ENHANCED_FRAME_CAP (1 << 7) - -#define DP_MAX_DOWNSPREAD 0x003 -# define DP_NO_AUX_HANDSHAKE_LINK_TRAINING (1 << 6) - -#define DP_NORP 0x004 - -#define DP_DOWNSTREAMPORT_PRESENT 0x005 -# define DP_DWN_STRM_PORT_PRESENT (1 << 0) -# define DP_DWN_STRM_PORT_TYPE_MASK 0x06 -/* 00b = DisplayPort */ -/* 01b = Analog */ -/* 10b = TMDS or HDMI */ -/* 11b = Other */ -# define DP_FORMAT_CONVERSION (1 << 3) - -#define DP_MAIN_LINK_CHANNEL_CODING 0x006 - -#define DP_EDP_CONFIGURATION_CAP 0x00d -#define DP_TRAINING_AUX_RD_INTERVAL 0x00e - -#define DP_PSR_SUPPORT 0x070 -# define DP_PSR_IS_SUPPORTED 1 -#define DP_PSR_CAPS 0x071 -# define DP_PSR_NO_TRAIN_ON_EXIT 1 -# define DP_PSR_SETUP_TIME_330 (0 << 1) -# define DP_PSR_SETUP_TIME_275 (1 << 1) -# define DP_PSR_SETUP_TIME_220 (2 << 1) -# define DP_PSR_SETUP_TIME_165 (3 << 1) -# define DP_PSR_SETUP_TIME_110 (4 << 1) -# define DP_PSR_SETUP_TIME_55 (5 << 1) -# define DP_PSR_SETUP_TIME_0 (6 << 1) -# define DP_PSR_SETUP_TIME_MASK (7 << 1) -# define DP_PSR_SETUP_TIME_SHIFT 1 - -/* link configuration */ -#define DP_LINK_BW_SET 0x100 -# define DP_LINK_BW_1_62 0x06 -# define DP_LINK_BW_2_7 0x0a -# define DP_LINK_BW_5_4 0x14 - -#define DP_LANE_COUNT_SET 0x101 -# define DP_LANE_COUNT_MASK 0x0f -# define DP_LANE_COUNT_ENHANCED_FRAME_EN (1 << 7) - -#define DP_TRAINING_PATTERN_SET 0x102 -# define DP_TRAINING_PATTERN_DISABLE 0 -# define DP_TRAINING_PATTERN_1 1 -# define DP_TRAINING_PATTERN_2 2 -# define DP_TRAINING_PATTERN_3 3 -# define DP_TRAINING_PATTERN_MASK 0x3 - -# define DP_LINK_QUAL_PATTERN_DISABLE (0 << 2) -# define DP_LINK_QUAL_PATTERN_D10_2 (1 << 2) -# define DP_LINK_QUAL_PATTERN_ERROR_RATE (2 << 2) -# define DP_LINK_QUAL_PATTERN_PRBS7 (3 << 2) -# define DP_LINK_QUAL_PATTERN_MASK (3 << 2) - -# define DP_RECOVERED_CLOCK_OUT_EN (1 << 4) -# define DP_LINK_SCRAMBLING_DISABLE (1 << 5) - -# define DP_SYMBOL_ERROR_COUNT_BOTH (0 << 6) -# define DP_SYMBOL_ERROR_COUNT_DISPARITY (1 << 6) -# define DP_SYMBOL_ERROR_COUNT_SYMBOL (2 << 6) -# define DP_SYMBOL_ERROR_COUNT_MASK (3 << 6) - -#define DP_TRAINING_LANE0_SET 0x103 -#define DP_TRAINING_LANE1_SET 0x104 -#define DP_TRAINING_LANE2_SET 0x105 -#define DP_TRAINING_LANE3_SET 0x106 - -# define DP_TRAIN_VOLTAGE_SWING_MASK 0x3 -# define DP_TRAIN_VOLTAGE_SWING_SHIFT 0 -# define DP_TRAIN_MAX_SWING_REACHED (1 << 2) -# define DP_TRAIN_VOLTAGE_SWING_400 (0 << 0) -# define DP_TRAIN_VOLTAGE_SWING_600 (1 << 0) -# define DP_TRAIN_VOLTAGE_SWING_800 (2 << 0) -# define DP_TRAIN_VOLTAGE_SWING_1200 (3 << 0) - -# define DP_TRAIN_PRE_EMPHASIS_MASK (3 << 3) -# define DP_TRAIN_PRE_EMPHASIS_0 (0 << 3) -# define DP_TRAIN_PRE_EMPHASIS_3_5 (1 << 3) -# define DP_TRAIN_PRE_EMPHASIS_6 (2 << 3) -# define DP_TRAIN_PRE_EMPHASIS_9_5 (3 << 3) - -# define DP_TRAIN_PRE_EMPHASIS_SHIFT 3 -# define DP_TRAIN_MAX_PRE_EMPHASIS_REACHED (1 << 5) - -#define DP_DOWNSPREAD_CTRL 0x107 -# define DP_SPREAD_AMP_0_5 (1 << 4) - -#define DP_MAIN_LINK_CHANNEL_CODING_SET 0x108 -# define DP_SET_ANSI_8B10B (1 << 0) - -#define DP_PSR_EN_CFG 0x170 -# define DP_PSR_ENABLE (1 << 0) -# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1) -# define DP_PSR_CRC_VERIFICATION (1 << 2) -# define DP_PSR_FRAME_CAPTURE (1 << 3) - -#define DP_DEVICE_SERVICE_IRQ_VECTOR 0x201 -# define DP_REMOTE_CONTROL_COMMAND_PENDING (1 << 0) -# define DP_AUTOMATED_TEST_REQUEST (1 << 1) -# define DP_CP_IRQ (1 << 2) -# define DP_SINK_SPECIFIC_IRQ (1 << 6) - -#define DP_EDP_CONFIGURATION_SET 0x10a - -#define DP_LANE0_1_STATUS 0x202 -#define DP_LANE2_3_STATUS 0x203 -# define DP_LANE_CR_DONE (1 << 0) -# define DP_LANE_CHANNEL_EQ_DONE (1 << 1) -# define DP_LANE_SYMBOL_LOCKED (1 << 2) - -#define DP_CHANNEL_EQ_BITS (DP_LANE_CR_DONE | \ - DP_LANE_CHANNEL_EQ_DONE | \ - DP_LANE_SYMBOL_LOCKED) - -#define DP_LANE_ALIGN_STATUS_UPDATED 0x204 - -#define DP_INTERLANE_ALIGN_DONE (1 << 0) -#define DP_DOWNSTREAM_PORT_STATUS_CHANGED (1 << 6) -#define DP_LINK_STATUS_UPDATED (1 << 7) - -#define DP_SINK_STATUS 0x205 - -#define DP_RECEIVE_PORT_0_STATUS (1 << 0) -#define DP_RECEIVE_PORT_1_STATUS (1 << 1) - -#define DP_ADJUST_REQUEST_LANE0_1 0x206 -#define DP_ADJUST_REQUEST_LANE2_3 0x207 -# define DP_ADJUST_VOLTAGE_SWING_LANE0_MASK 0x03 -# define DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT 0 -# define DP_ADJUST_PRE_EMPHASIS_LANE0_MASK 0x0c -# define DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT 2 -# define DP_ADJUST_VOLTAGE_SWING_LANE1_MASK 0x30 -# define DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT 4 -# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0 -# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6 - -#define DP_TEST_REQUEST 0x218 -# define DP_TEST_LINK_TRAINING (1 << 0) -# define DP_TEST_LINK_PATTERN (1 << 1) -# define DP_TEST_LINK_EDID_READ (1 << 2) -# define DP_TEST_LINK_PHY_TEST_PATTERN (1 << 3) /* DPCD >= 1.1 */ - -#define DP_TEST_LINK_RATE 0x219 -# define DP_LINK_RATE_162 (0x6) -# define DP_LINK_RATE_27 (0xa) - -#define DP_TEST_LANE_COUNT 0x220 - -#define DP_TEST_PATTERN 0x221 - -#define DP_TEST_RESPONSE 0x260 -# define DP_TEST_ACK (1 << 0) -# define DP_TEST_NAK (1 << 1) -# define DP_TEST_EDID_CHECKSUM_WRITE (1 << 2) - -#define DP_SET_POWER 0x600 -# define DP_SET_POWER_D0 0x1 -# define DP_SET_POWER_D3 0x2 - -#define DP_PSR_ERROR_STATUS 0x2006 -# define DP_PSR_LINK_CRC_ERROR (1 << 0) -# define DP_PSR_RFB_STORAGE_ERROR (1 << 1) - -#define DP_PSR_ESI 0x2007 -# define DP_PSR_CAPS_CHANGE (1 << 0) - -#define DP_PSR_STATUS 0x2008 -# define DP_PSR_SINK_INACTIVE 0 -# define DP_PSR_SINK_ACTIVE_SRC_SYNCED 1 -# define DP_PSR_SINK_ACTIVE_RFB 2 -# define DP_PSR_SINK_ACTIVE_SINK_SYNCED 3 -# define DP_PSR_SINK_ACTIVE_RESYNC 4 -# define DP_PSR_SINK_INTERNAL_ERROR 7 -# define DP_PSR_SINK_STATE_MASK 0x07 - -#define MODE_I2C_START 1 -#define MODE_I2C_WRITE 2 -#define MODE_I2C_READ 4 -#define MODE_I2C_STOP 8 - -struct i2c_algo_dp_aux_data { - bool running; - u16 address; - int (*aux_ch) (struct i2c_adapter *adapter, - int mode, uint8_t write_byte, - uint8_t *read_byte); -}; - -int -i2c_dp_aux_add_bus(struct i2c_adapter *adapter); - -#endif /* _DRM_DP_HELPER_H_ */ diff --git a/ANDROID_3.4.5/include/drm/drm_edid.h b/ANDROID_3.4.5/include/drm/drm_edid.h deleted file mode 100644 index bcb9a66b..00000000 --- a/ANDROID_3.4.5/include/drm/drm_edid.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Copyright © 2007-2008 Intel Corporation - * Jesse Barnes <jesse.barnes@intel.com> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ -#ifndef __DRM_EDID_H__ -#define __DRM_EDID_H__ - -#include <linux/types.h> - -#define EDID_LENGTH 128 -#define DDC_ADDR 0x50 - -#define CEA_EXT 0x02 -#define VTB_EXT 0x10 -#define DI_EXT 0x40 -#define LS_EXT 0x50 -#define MI_EXT 0x60 - -struct est_timings { - u8 t1; - u8 t2; - u8 mfg_rsvd; -} __attribute__((packed)); - -/* 00=16:10, 01=4:3, 10=5:4, 11=16:9 */ -#define EDID_TIMING_ASPECT_SHIFT 6 -#define EDID_TIMING_ASPECT_MASK (0x3 << EDID_TIMING_ASPECT_SHIFT) - -/* need to add 60 */ -#define EDID_TIMING_VFREQ_SHIFT 0 -#define EDID_TIMING_VFREQ_MASK (0x3f << EDID_TIMING_VFREQ_SHIFT) - -struct std_timing { - u8 hsize; /* need to multiply by 8 then add 248 */ - u8 vfreq_aspect; -} __attribute__((packed)); - -#define DRM_EDID_PT_HSYNC_POSITIVE (1 << 1) -#define DRM_EDID_PT_VSYNC_POSITIVE (1 << 2) -#define DRM_EDID_PT_SEPARATE_SYNC (3 << 3) -#define DRM_EDID_PT_STEREO (1 << 5) -#define DRM_EDID_PT_INTERLACED (1 << 7) - -/* If detailed data is pixel timing */ -struct detailed_pixel_timing { - u8 hactive_lo; - u8 hblank_lo; - u8 hactive_hblank_hi; - u8 vactive_lo; - u8 vblank_lo; - u8 vactive_vblank_hi; - u8 hsync_offset_lo; - u8 hsync_pulse_width_lo; - u8 vsync_offset_pulse_width_lo; - u8 hsync_vsync_offset_pulse_width_hi; - u8 width_mm_lo; - u8 height_mm_lo; - u8 width_height_mm_hi; - u8 hborder; - u8 vborder; - u8 misc; -} __attribute__((packed)); - -/* If it's not pixel timing, it'll be one of the below */ -struct detailed_data_string { - u8 str[13]; -} __attribute__((packed)); - -struct detailed_data_monitor_range { - u8 min_vfreq; - u8 max_vfreq; - u8 min_hfreq_khz; - u8 max_hfreq_khz; - u8 pixel_clock_mhz; /* need to multiply by 10 */ - __le16 sec_gtf_toggle; /* A000=use above, 20=use below */ - u8 hfreq_start_khz; /* need to multiply by 2 */ - u8 c; /* need to divide by 2 */ - __le16 m; - u8 k; - u8 j; /* need to divide by 2 */ -} __attribute__((packed)); - -struct detailed_data_wpindex { - u8 white_yx_lo; /* Lower 2 bits each */ - u8 white_x_hi; - u8 white_y_hi; - u8 gamma; /* need to divide by 100 then add 1 */ -} __attribute__((packed)); - -struct detailed_data_color_point { - u8 windex1; - u8 wpindex1[3]; - u8 windex2; - u8 wpindex2[3]; -} __attribute__((packed)); - -struct cvt_timing { - u8 code[3]; -} __attribute__((packed)); - -struct detailed_non_pixel { - u8 pad1; - u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name - fb=color point data, fa=standard timing data, - f9=undefined, f8=mfg. reserved */ - u8 pad2; - union { - struct detailed_data_string str; - struct detailed_data_monitor_range range; - struct detailed_data_wpindex color; - struct std_timing timings[6]; - struct cvt_timing cvt[4]; - } data; -} __attribute__((packed)); - -#define EDID_DETAIL_EST_TIMINGS 0xf7 -#define EDID_DETAIL_CVT_3BYTE 0xf8 -#define EDID_DETAIL_COLOR_MGMT_DATA 0xf9 -#define EDID_DETAIL_STD_MODES 0xfa -#define EDID_DETAIL_MONITOR_CPDATA 0xfb -#define EDID_DETAIL_MONITOR_NAME 0xfc -#define EDID_DETAIL_MONITOR_RANGE 0xfd -#define EDID_DETAIL_MONITOR_STRING 0xfe -#define EDID_DETAIL_MONITOR_SERIAL 0xff - -struct detailed_timing { - __le16 pixel_clock; /* need to multiply by 10 KHz */ - union { - struct detailed_pixel_timing pixel_data; - struct detailed_non_pixel other_data; - } data; -} __attribute__((packed)); - -#define DRM_EDID_INPUT_SERRATION_VSYNC (1 << 0) -#define DRM_EDID_INPUT_SYNC_ON_GREEN (1 << 1) -#define DRM_EDID_INPUT_COMPOSITE_SYNC (1 << 2) -#define DRM_EDID_INPUT_SEPARATE_SYNCS (1 << 3) -#define DRM_EDID_INPUT_BLANK_TO_BLACK (1 << 4) -#define DRM_EDID_INPUT_VIDEO_LEVEL (3 << 5) -#define DRM_EDID_INPUT_DIGITAL (1 << 7) -#define DRM_EDID_DIGITAL_DEPTH_MASK (7 << 4) -#define DRM_EDID_DIGITAL_DEPTH_UNDEF (0 << 4) -#define DRM_EDID_DIGITAL_DEPTH_6 (1 << 4) -#define DRM_EDID_DIGITAL_DEPTH_8 (2 << 4) -#define DRM_EDID_DIGITAL_DEPTH_10 (3 << 4) -#define DRM_EDID_DIGITAL_DEPTH_12 (4 << 4) -#define DRM_EDID_DIGITAL_DEPTH_14 (5 << 4) -#define DRM_EDID_DIGITAL_DEPTH_16 (6 << 4) -#define DRM_EDID_DIGITAL_DEPTH_RSVD (7 << 4) -#define DRM_EDID_DIGITAL_TYPE_UNDEF (0) -#define DRM_EDID_DIGITAL_TYPE_DVI (1) -#define DRM_EDID_DIGITAL_TYPE_HDMI_A (2) -#define DRM_EDID_DIGITAL_TYPE_HDMI_B (3) -#define DRM_EDID_DIGITAL_TYPE_MDDI (4) -#define DRM_EDID_DIGITAL_TYPE_DP (5) - -#define DRM_EDID_FEATURE_DEFAULT_GTF (1 << 0) -#define DRM_EDID_FEATURE_PREFERRED_TIMING (1 << 1) -#define DRM_EDID_FEATURE_STANDARD_COLOR (1 << 2) -/* If analog */ -#define DRM_EDID_FEATURE_DISPLAY_TYPE (3 << 3) /* 00=mono, 01=rgb, 10=non-rgb, 11=unknown */ -/* If digital */ -#define DRM_EDID_FEATURE_COLOR_MASK (3 << 3) -#define DRM_EDID_FEATURE_RGB (0 << 3) -#define DRM_EDID_FEATURE_RGB_YCRCB444 (1 << 3) -#define DRM_EDID_FEATURE_RGB_YCRCB422 (2 << 3) -#define DRM_EDID_FEATURE_RGB_YCRCB (3 << 3) /* both 4:4:4 and 4:2:2 */ - -#define DRM_EDID_FEATURE_PM_ACTIVE_OFF (1 << 5) -#define DRM_EDID_FEATURE_PM_SUSPEND (1 << 6) -#define DRM_EDID_FEATURE_PM_STANDBY (1 << 7) - -struct edid { - u8 header[8]; - /* Vendor & product info */ - u8 mfg_id[2]; - u8 prod_code[2]; - u32 serial; /* FIXME: byte order */ - u8 mfg_week; - u8 mfg_year; - /* EDID version */ - u8 version; - u8 revision; - /* Display info: */ - u8 input; - u8 width_cm; - u8 height_cm; - u8 gamma; - u8 features; - /* Color characteristics */ - u8 red_green_lo; - u8 black_white_lo; - u8 red_x; - u8 red_y; - u8 green_x; - u8 green_y; - u8 blue_x; - u8 blue_y; - u8 white_x; - u8 white_y; - /* Est. timings and mfg rsvd timings*/ - struct est_timings established_timings; - /* Standard timings 1-8*/ - struct std_timing standard_timings[8]; - /* Detailing timings 1-4 */ - struct detailed_timing detailed_timings[4]; - /* Number of 128 byte ext. blocks */ - u8 extensions; - /* Checksum */ - u8 checksum; -} __attribute__((packed)); - -#define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8)) - -struct drm_encoder; -struct drm_connector; -struct drm_display_mode; -void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid); -int drm_av_sync_delay(struct drm_connector *connector, - struct drm_display_mode *mode); -struct drm_connector *drm_select_eld(struct drm_encoder *encoder, - struct drm_display_mode *mode); -int drm_load_edid_firmware(struct drm_connector *connector); - -#endif /* __DRM_EDID_H__ */ diff --git a/ANDROID_3.4.5/include/drm/drm_encoder_slave.h b/ANDROID_3.4.5/include/drm/drm_encoder_slave.h deleted file mode 100644 index 2f65633d..00000000 --- a/ANDROID_3.4.5/include/drm/drm_encoder_slave.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Copyright (C) 2009 Francisco Jerez. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef __DRM_ENCODER_SLAVE_H__ -#define __DRM_ENCODER_SLAVE_H__ - -#include "drmP.h" -#include "drm_crtc.h" - -/** - * struct drm_encoder_slave_funcs - Entry points exposed by a slave encoder driver - * @set_config: Initialize any encoder-specific modesetting parameters. - * The meaning of the @params parameter is implementation - * dependent. It will usually be a structure with DVO port - * data format settings or timings. It's not required for - * the new parameters to take effect until the next mode - * is set. - * - * Most of its members are analogous to the function pointers in - * &drm_encoder_helper_funcs and they can optionally be used to - * initialize the latter. Connector-like methods (e.g. @get_modes and - * @set_property) will typically be wrapped around and only be called - * if the encoder is the currently selected one for the connector. - */ -struct drm_encoder_slave_funcs { - void (*set_config)(struct drm_encoder *encoder, - void *params); - - void (*destroy)(struct drm_encoder *encoder); - void (*dpms)(struct drm_encoder *encoder, int mode); - void (*save)(struct drm_encoder *encoder); - void (*restore)(struct drm_encoder *encoder); - bool (*mode_fixup)(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); - int (*mode_valid)(struct drm_encoder *encoder, - struct drm_display_mode *mode); - void (*mode_set)(struct drm_encoder *encoder, - struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode); - - enum drm_connector_status (*detect)(struct drm_encoder *encoder, - struct drm_connector *connector); - int (*get_modes)(struct drm_encoder *encoder, - struct drm_connector *connector); - int (*create_resources)(struct drm_encoder *encoder, - struct drm_connector *connector); - int (*set_property)(struct drm_encoder *encoder, - struct drm_connector *connector, - struct drm_property *property, - uint64_t val); - -}; - -/** - * struct drm_encoder_slave - Slave encoder struct - * @base: DRM encoder object. - * @slave_funcs: Slave encoder callbacks. - * @slave_priv: Slave encoder private data. - * @bus_priv: Bus specific data. - * - * A &drm_encoder_slave has two sets of callbacks, @slave_funcs and the - * ones in @base. The former are never actually called by the common - * CRTC code, it's just a convenience for splitting the encoder - * functions in an upper, GPU-specific layer and a (hopefully) - * GPU-agnostic lower layer: It's the GPU driver responsibility to - * call the slave methods when appropriate. - * - * drm_i2c_encoder_init() provides a way to get an implementation of - * this. - */ -struct drm_encoder_slave { - struct drm_encoder base; - - struct drm_encoder_slave_funcs *slave_funcs; - void *slave_priv; - void *bus_priv; -}; -#define to_encoder_slave(x) container_of((x), struct drm_encoder_slave, base) - -int drm_i2c_encoder_init(struct drm_device *dev, - struct drm_encoder_slave *encoder, - struct i2c_adapter *adap, - const struct i2c_board_info *info); - - -/** - * struct drm_i2c_encoder_driver - * - * Describes a device driver for an encoder connected to the GPU - * through an I2C bus. In addition to the entry points in @i2c_driver - * an @encoder_init function should be provided. It will be called to - * give the driver an opportunity to allocate any per-encoder data - * structures and to initialize the @slave_funcs and (optionally) - * @slave_priv members of @encoder. - */ -struct drm_i2c_encoder_driver { - struct i2c_driver i2c_driver; - - int (*encoder_init)(struct i2c_client *client, - struct drm_device *dev, - struct drm_encoder_slave *encoder); - -}; -#define to_drm_i2c_encoder_driver(x) container_of((x), \ - struct drm_i2c_encoder_driver, \ - i2c_driver) - -/** - * drm_i2c_encoder_get_client - Get the I2C client corresponding to an encoder - */ -static inline struct i2c_client *drm_i2c_encoder_get_client(struct drm_encoder *encoder) -{ - return (struct i2c_client *)to_encoder_slave(encoder)->bus_priv; -} - -/** - * drm_i2c_encoder_register - Register an I2C encoder driver - * @owner: Module containing the driver. - * @driver: Driver to be registered. - */ -static inline int drm_i2c_encoder_register(struct module *owner, - struct drm_i2c_encoder_driver *driver) -{ - return i2c_register_driver(owner, &driver->i2c_driver); -} - -/** - * drm_i2c_encoder_unregister - Unregister an I2C encoder driver - * @driver: Driver to be unregistered. - */ -static inline void drm_i2c_encoder_unregister(struct drm_i2c_encoder_driver *driver) -{ - i2c_del_driver(&driver->i2c_driver); -} - -void drm_i2c_encoder_destroy(struct drm_encoder *encoder); - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_fb_helper.h b/ANDROID_3.4.5/include/drm/drm_fb_helper.h deleted file mode 100644 index 5120b01c..00000000 --- a/ANDROID_3.4.5/include/drm/drm_fb_helper.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * Copyright (c) 2006-2009 Red Hat Inc. - * Copyright (c) 2006-2008 Intel Corporation - * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> - * - * DRM framebuffer helper functions - * - * Permission to use, copy, modify, distribute, and sell this software and its - * documentation for any purpose is hereby granted without fee, provided that - * the above copyright notice appear in all copies and that both that copyright - * notice and this permission notice appear in supporting documentation, and - * that the name of the copyright holders not be used in advertising or - * publicity pertaining to distribution of the software without specific, - * written prior permission. The copyright holders make no representations - * about the suitability of this software for any purpose. It is provided "as - * is" without express or implied warranty. - * - * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, - * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO - * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR - * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, - * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER - * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE - * OF THIS SOFTWARE. - * - * Authors: - * Dave Airlie <airlied@linux.ie> - * Jesse Barnes <jesse.barnes@intel.com> - */ -#ifndef DRM_FB_HELPER_H -#define DRM_FB_HELPER_H - -struct drm_fb_helper; - -#include <linux/kgdb.h> - -struct drm_fb_helper_crtc { - struct drm_mode_set mode_set; - struct drm_display_mode *desired_mode; -}; - -struct drm_fb_helper_surface_size { - u32 fb_width; - u32 fb_height; - u32 surface_width; - u32 surface_height; - u32 surface_bpp; - u32 surface_depth; -}; - -struct drm_fb_helper_funcs { - void (*gamma_set)(struct drm_crtc *crtc, u16 red, u16 green, - u16 blue, int regno); - void (*gamma_get)(struct drm_crtc *crtc, u16 *red, u16 *green, - u16 *blue, int regno); - - int (*fb_probe)(struct drm_fb_helper *helper, - struct drm_fb_helper_surface_size *sizes); -}; - -struct drm_fb_helper_connector { - struct drm_connector *connector; - struct drm_cmdline_mode cmdline_mode; -}; - -struct drm_fb_helper { - struct drm_framebuffer *fb; - struct drm_framebuffer *saved_fb; - struct drm_device *dev; - struct drm_display_mode *mode; - int crtc_count; - struct drm_fb_helper_crtc *crtc_info; - int connector_count; - struct drm_fb_helper_connector **connector_info; - struct drm_fb_helper_funcs *funcs; - struct fb_info *fbdev; - u32 pseudo_palette[17]; - struct list_head kernel_fb_list; - - /* we got a hotplug but fbdev wasn't running the console - delay until next set_par */ - bool delayed_hotplug; -}; - -int drm_fb_helper_single_fb_probe(struct drm_fb_helper *helper, - int preferred_bpp); - -int drm_fb_helper_init(struct drm_device *dev, - struct drm_fb_helper *helper, int crtc_count, - int max_conn); -void drm_fb_helper_fini(struct drm_fb_helper *helper); -int drm_fb_helper_blank(int blank, struct fb_info *info); -int drm_fb_helper_pan_display(struct fb_var_screeninfo *var, - struct fb_info *info); -int drm_fb_helper_set_par(struct fb_info *info); -int drm_fb_helper_check_var(struct fb_var_screeninfo *var, - struct fb_info *info); -int drm_fb_helper_setcolreg(unsigned regno, - unsigned red, - unsigned green, - unsigned blue, - unsigned transp, - struct fb_info *info); - -bool drm_fb_helper_restore_fbdev_mode(struct drm_fb_helper *fb_helper); -void drm_fb_helper_restore(void); -void drm_fb_helper_fill_var(struct fb_info *info, struct drm_fb_helper *fb_helper, - uint32_t fb_width, uint32_t fb_height); -void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch, - uint32_t depth); - -int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info); - -int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper); -bool drm_fb_helper_initial_config(struct drm_fb_helper *fb_helper, int bpp_sel); -int drm_fb_helper_single_add_all_connectors(struct drm_fb_helper *fb_helper); -int drm_fb_helper_debug_enter(struct fb_info *info); -int drm_fb_helper_debug_leave(struct fb_info *info); - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_fixed.h b/ANDROID_3.4.5/include/drm/drm_fixed.h deleted file mode 100644 index 4a08a664..00000000 --- a/ANDROID_3.4.5/include/drm/drm_fixed.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright 2009 Red Hat Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: Dave Airlie - */ -#ifndef DRM_FIXED_H -#define DRM_FIXED_H - -typedef union dfixed { - u32 full; -} fixed20_12; - - -#define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */ -#define dfixed_const_half(A) (u32)(((A) << 12) + 2048) -#define dfixed_const_666(A) (u32)(((A) << 12) + 2731) -#define dfixed_const_8(A) (u32)(((A) << 12) + 3277) -#define dfixed_mul(A, B) ((u64)((u64)(A).full * (B).full + 2048) >> 12) -#define dfixed_init(A) { .full = dfixed_const((A)) } -#define dfixed_init_half(A) { .full = dfixed_const_half((A)) } -#define dfixed_trunc(A) ((A).full >> 12) - -static inline u32 dfixed_floor(fixed20_12 A) -{ - u32 non_frac = dfixed_trunc(A); - - return dfixed_const(non_frac); -} - -static inline u32 dfixed_ceil(fixed20_12 A) -{ - u32 non_frac = dfixed_trunc(A); - - if (A.full > dfixed_const(non_frac)) - return dfixed_const(non_frac + 1); - else - return dfixed_const(non_frac); -} - -static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B) -{ - u64 tmp = ((u64)A.full << 13); - - do_div(tmp, B.full); - tmp += 1; - tmp /= 2; - return lower_32_bits(tmp); -} -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_fourcc.h b/ANDROID_3.4.5/include/drm/drm_fourcc.h deleted file mode 100644 index bdf0152c..00000000 --- a/ANDROID_3.4.5/include/drm/drm_fourcc.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * Copyright 2011 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef DRM_FOURCC_H -#define DRM_FOURCC_H - -#include <linux/types.h> - -#define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \ - ((__u32)(c) << 16) | ((__u32)(d) << 24)) - -#define DRM_FORMAT_BIG_ENDIAN (1<<31) /* format is big endian instead of little endian */ - -/* color index */ -#define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */ - -/* 8 bpp RGB */ -#define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */ -#define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */ - -/* 16 bpp RGB */ -#define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') /* [15:0] x:R:G:B 4:4:4:4 little endian */ -#define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') /* [15:0] x:B:G:R 4:4:4:4 little endian */ -#define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') /* [15:0] R:G:B:x 4:4:4:4 little endian */ -#define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') /* [15:0] B:G:R:x 4:4:4:4 little endian */ - -#define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') /* [15:0] A:R:G:B 4:4:4:4 little endian */ -#define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') /* [15:0] A:B:G:R 4:4:4:4 little endian */ -#define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') /* [15:0] R:G:B:A 4:4:4:4 little endian */ -#define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') /* [15:0] B:G:R:A 4:4:4:4 little endian */ - -#define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') /* [15:0] x:R:G:B 1:5:5:5 little endian */ -#define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') /* [15:0] x:B:G:R 1:5:5:5 little endian */ -#define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') /* [15:0] R:G:B:x 5:5:5:1 little endian */ -#define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') /* [15:0] B:G:R:x 5:5:5:1 little endian */ - -#define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') /* [15:0] A:R:G:B 1:5:5:5 little endian */ -#define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') /* [15:0] A:B:G:R 1:5:5:5 little endian */ -#define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') /* [15:0] R:G:B:A 5:5:5:1 little endian */ -#define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') /* [15:0] B:G:R:A 5:5:5:1 little endian */ - -#define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */ -#define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') /* [15:0] B:G:R 5:6:5 little endian */ - -/* 24 bpp RGB */ -#define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') /* [23:0] R:G:B little endian */ -#define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') /* [23:0] B:G:R little endian */ - -/* 32 bpp RGB */ -#define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */ -#define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') /* [31:0] x:B:G:R 8:8:8:8 little endian */ -#define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') /* [31:0] R:G:B:x 8:8:8:8 little endian */ -#define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') /* [31:0] B:G:R:x 8:8:8:8 little endian */ - -#define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') /* [31:0] A:R:G:B 8:8:8:8 little endian */ -#define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') /* [31:0] A:B:G:R 8:8:8:8 little endian */ -#define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') /* [31:0] R:G:B:A 8:8:8:8 little endian */ -#define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') /* [31:0] B:G:R:A 8:8:8:8 little endian */ - -#define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') /* [31:0] x:R:G:B 2:10:10:10 little endian */ -#define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') /* [31:0] x:B:G:R 2:10:10:10 little endian */ -#define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') /* [31:0] R:G:B:x 10:10:10:2 little endian */ -#define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') /* [31:0] B:G:R:x 10:10:10:2 little endian */ - -#define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') /* [31:0] A:R:G:B 2:10:10:10 little endian */ -#define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') /* [31:0] A:B:G:R 2:10:10:10 little endian */ -#define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') /* [31:0] R:G:B:A 10:10:10:2 little endian */ -#define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') /* [31:0] B:G:R:A 10:10:10:2 little endian */ - -/* packed YCbCr */ -#define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ -#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */ -#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */ -#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */ - -#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */ - -/* - * 2 plane YCbCr - * index 0 = Y plane, [7:0] Y - * index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian - * or - * index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian - */ -#define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') /* 2x2 subsampled Cr:Cb plane */ -#define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') /* 2x2 subsampled Cb:Cr plane */ -#define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') /* 2x1 subsampled Cr:Cb plane */ -#define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') /* 2x1 subsampled Cb:Cr plane */ - -/* 2 non contiguous plane YCbCr */ -#define DRM_FORMAT_NV12M fourcc_code('N', 'M', '1', '2') /* 2x2 subsampled Cr:Cb plane */ -#define DRM_FORMAT_NV12MT fourcc_code('T', 'M', '1', '2') /* 2x2 subsampled Cr:Cb plane 64x32 macroblocks */ - -/* - * 3 plane YCbCr - * index 0: Y plane, [7:0] Y - * index 1: Cb plane, [7:0] Cb - * index 2: Cr plane, [7:0] Cr - * or - * index 1: Cr plane, [7:0] Cr - * index 2: Cb plane, [7:0] Cb - */ -#define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') /* 4x4 subsampled Cb (1) and Cr (2) planes */ -#define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') /* 4x4 subsampled Cr (1) and Cb (2) planes */ -#define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') /* 4x1 subsampled Cb (1) and Cr (2) planes */ -#define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') /* 4x1 subsampled Cr (1) and Cb (2) planes */ -#define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */ -#define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') /* 2x2 subsampled Cr (1) and Cb (2) planes */ -#define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') /* 2x1 subsampled Cb (1) and Cr (2) planes */ -#define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') /* 2x1 subsampled Cr (1) and Cb (2) planes */ -#define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') /* non-subsampled Cb (1) and Cr (2) planes */ -#define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') /* non-subsampled Cr (1) and Cb (2) planes */ - -/* 3 non contiguous plane YCbCr */ -#define DRM_FORMAT_YUV420M fourcc_code('Y', 'M', '1', '2') /* 2x2 subsampled Cb (1) and Cr (2) planes */ - -#endif /* DRM_FOURCC_H */ diff --git a/ANDROID_3.4.5/include/drm/drm_global.h b/ANDROID_3.4.5/include/drm/drm_global.h deleted file mode 100644 index a06805ea..00000000 --- a/ANDROID_3.4.5/include/drm/drm_global.h +++ /dev/null @@ -1,53 +0,0 @@ -/************************************************************************** - * - * Copyright 2008-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ - -#ifndef _DRM_GLOBAL_H_ -#define _DRM_GLOBAL_H_ -enum drm_global_types { - DRM_GLOBAL_TTM_MEM = 0, - DRM_GLOBAL_TTM_BO, - DRM_GLOBAL_TTM_OBJECT, - DRM_GLOBAL_NUM -}; - -struct drm_global_reference { - enum drm_global_types global_type; - size_t size; - void *object; - int (*init) (struct drm_global_reference *); - void (*release) (struct drm_global_reference *); -}; - -extern void drm_global_init(void); -extern void drm_global_release(void); -extern int drm_global_item_ref(struct drm_global_reference *ref); -extern void drm_global_item_unref(struct drm_global_reference *ref); - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_hashtab.h b/ANDROID_3.4.5/include/drm/drm_hashtab.h deleted file mode 100644 index 3650d5d0..00000000 --- a/ANDROID_3.4.5/include/drm/drm_hashtab.h +++ /dev/null @@ -1,65 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Bismack, ND. USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ -/* - * Simple open hash tab implementation. - * - * Authors: - * Thomas Hellström <thomas-at-tungstengraphics-dot-com> - */ - -#ifndef DRM_HASHTAB_H -#define DRM_HASHTAB_H - -#include <linux/list.h> - -#define drm_hash_entry(_ptr, _type, _member) container_of(_ptr, _type, _member) - -struct drm_hash_item { - struct hlist_node head; - unsigned long key; -}; - -struct drm_open_hash { - struct hlist_head *table; - u8 order; -}; - -extern int drm_ht_create(struct drm_open_hash *ht, unsigned int order); -extern int drm_ht_insert_item(struct drm_open_hash *ht, struct drm_hash_item *item); -extern int drm_ht_just_insert_please(struct drm_open_hash *ht, struct drm_hash_item *item, - unsigned long seed, int bits, int shift, - unsigned long add); -extern int drm_ht_find_item(struct drm_open_hash *ht, unsigned long key, struct drm_hash_item **item); - -extern void drm_ht_verbose_list(struct drm_open_hash *ht, unsigned long key); -extern int drm_ht_remove_key(struct drm_open_hash *ht, unsigned long key); -extern int drm_ht_remove_item(struct drm_open_hash *ht, struct drm_hash_item *item); -extern void drm_ht_remove(struct drm_open_hash *ht); - - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_mem_util.h b/ANDROID_3.4.5/include/drm/drm_mem_util.h deleted file mode 100644 index 6bd325fe..00000000 --- a/ANDROID_3.4.5/include/drm/drm_mem_util.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright © 2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - * - * Authors: - * Jesse Barnes <jbarnes@virtuousgeek.org> - * - */ -#ifndef _DRM_MEM_UTIL_H_ -#define _DRM_MEM_UTIL_H_ - -#include <linux/vmalloc.h> - -static __inline__ void *drm_calloc_large(size_t nmemb, size_t size) -{ - if (size != 0 && nmemb > ULONG_MAX / size) - return NULL; - - if (size * nmemb <= PAGE_SIZE) - return kcalloc(nmemb, size, GFP_KERNEL); - - return __vmalloc(size * nmemb, - GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO, PAGE_KERNEL); -} - -/* Modeled after cairo's malloc_ab, it's like calloc but without the zeroing. */ -static __inline__ void *drm_malloc_ab(size_t nmemb, size_t size) -{ - if (size != 0 && nmemb > ULONG_MAX / size) - return NULL; - - if (size * nmemb <= PAGE_SIZE) - return kmalloc(nmemb * size, GFP_KERNEL); - - return __vmalloc(size * nmemb, - GFP_KERNEL | __GFP_HIGHMEM, PAGE_KERNEL); -} - -static __inline void drm_free_large(void *ptr) -{ - if (!is_vmalloc_addr(ptr)) - return kfree(ptr); - - vfree(ptr); -} - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_memory.h b/ANDROID_3.4.5/include/drm/drm_memory.h deleted file mode 100644 index 15af9b32..00000000 --- a/ANDROID_3.4.5/include/drm/drm_memory.h +++ /dev/null @@ -1,59 +0,0 @@ -/** - * \file drm_memory.h - * Memory management wrappers for DRM - * - * \author Rickard E. (Rik) Faith <faith@valinux.com> - * \author Gareth Hughes <gareth@valinux.com> - */ - -/* - * Created: Thu Feb 4 14:00:34 1999 by faith@valinux.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <linux/highmem.h> -#include <linux/vmalloc.h> -#include "drmP.h" - -/** - * Cut down version of drm_memory_debug.h, which used to be called - * drm_memory.h. - */ - -#if __OS_HAS_AGP - -#ifdef HAVE_PAGE_AGP -#include <asm/agp.h> -#else -# ifdef __powerpc__ -# define PAGE_AGP __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE) -# else -# define PAGE_AGP PAGE_KERNEL -# endif -#endif - -#else /* __OS_HAS_AGP */ - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_mm.h b/ANDROID_3.4.5/include/drm/drm_mm.h deleted file mode 100644 index 564b14aa..00000000 --- a/ANDROID_3.4.5/include/drm/drm_mm.h +++ /dev/null @@ -1,188 +0,0 @@ -/************************************************************************** - * - * Copyright 2006-2008 Tungsten Graphics, Inc., Cedar Park, TX. USA. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - **************************************************************************/ -/* - * Authors: - * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> - */ - -#ifndef _DRM_MM_H_ -#define _DRM_MM_H_ - -/* - * Generic range manager structs - */ -#include <linux/list.h> -#ifdef CONFIG_DEBUG_FS -#include <linux/seq_file.h> -#endif - -struct drm_mm_node { - struct list_head node_list; - struct list_head hole_stack; - unsigned hole_follows : 1; - unsigned scanned_block : 1; - unsigned scanned_prev_free : 1; - unsigned scanned_next_free : 1; - unsigned scanned_preceeds_hole : 1; - unsigned allocated : 1; - unsigned long start; - unsigned long size; - struct drm_mm *mm; -}; - -struct drm_mm { - /* List of all memory nodes that immediately precede a free hole. */ - struct list_head hole_stack; - /* head_node.node_list is the list of all memory nodes, ordered - * according to the (increasing) start address of the memory node. */ - struct drm_mm_node head_node; - struct list_head unused_nodes; - int num_unused; - spinlock_t unused_lock; - unsigned int scan_check_range : 1; - unsigned scan_alignment; - unsigned long scan_size; - unsigned long scan_hit_start; - unsigned scan_hit_size; - unsigned scanned_blocks; - unsigned long scan_start; - unsigned long scan_end; - struct drm_mm_node *prev_scanned_node; -}; - -static inline bool drm_mm_node_allocated(struct drm_mm_node *node) -{ - return node->allocated; -} - -static inline bool drm_mm_initialized(struct drm_mm *mm) -{ - return mm->hole_stack.next; -} -#define drm_mm_for_each_node(entry, mm) list_for_each_entry(entry, \ - &(mm)->head_node.node_list, \ - node_list) -#define drm_mm_for_each_scanned_node_reverse(entry, n, mm) \ - for (entry = (mm)->prev_scanned_node, \ - next = entry ? list_entry(entry->node_list.next, \ - struct drm_mm_node, node_list) : NULL; \ - entry != NULL; entry = next, \ - next = entry ? list_entry(entry->node_list.next, \ - struct drm_mm_node, node_list) : NULL) \ -/* - * Basic range manager support (drm_mm.c) - */ -extern struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *node, - unsigned long size, - unsigned alignment, - int atomic); -extern struct drm_mm_node *drm_mm_get_block_range_generic( - struct drm_mm_node *node, - unsigned long size, - unsigned alignment, - unsigned long start, - unsigned long end, - int atomic); -static inline struct drm_mm_node *drm_mm_get_block(struct drm_mm_node *parent, - unsigned long size, - unsigned alignment) -{ - return drm_mm_get_block_generic(parent, size, alignment, 0); -} -static inline struct drm_mm_node *drm_mm_get_block_atomic(struct drm_mm_node *parent, - unsigned long size, - unsigned alignment) -{ - return drm_mm_get_block_generic(parent, size, alignment, 1); -} -static inline struct drm_mm_node *drm_mm_get_block_range( - struct drm_mm_node *parent, - unsigned long size, - unsigned alignment, - unsigned long start, - unsigned long end) -{ - return drm_mm_get_block_range_generic(parent, size, alignment, - start, end, 0); -} -static inline struct drm_mm_node *drm_mm_get_block_atomic_range( - struct drm_mm_node *parent, - unsigned long size, - unsigned alignment, - unsigned long start, - unsigned long end) -{ - return drm_mm_get_block_range_generic(parent, size, alignment, - start, end, 1); -} -extern int drm_mm_insert_node(struct drm_mm *mm, struct drm_mm_node *node, - unsigned long size, unsigned alignment); -extern int drm_mm_insert_node_in_range(struct drm_mm *mm, - struct drm_mm_node *node, - unsigned long size, unsigned alignment, - unsigned long start, unsigned long end); -extern void drm_mm_put_block(struct drm_mm_node *cur); -extern void drm_mm_remove_node(struct drm_mm_node *node); -extern void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new); -extern struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm, - unsigned long size, - unsigned alignment, - int best_match); -extern struct drm_mm_node *drm_mm_search_free_in_range( - const struct drm_mm *mm, - unsigned long size, - unsigned alignment, - unsigned long start, - unsigned long end, - int best_match); -extern int drm_mm_init(struct drm_mm *mm, unsigned long start, - unsigned long size); -extern void drm_mm_takedown(struct drm_mm *mm); -extern int drm_mm_clean(struct drm_mm *mm); -extern int drm_mm_pre_get(struct drm_mm *mm); - -static inline struct drm_mm *drm_get_mm(struct drm_mm_node *block) -{ - return block->mm; -} - -void drm_mm_init_scan(struct drm_mm *mm, unsigned long size, - unsigned alignment); -void drm_mm_init_scan_with_range(struct drm_mm *mm, unsigned long size, - unsigned alignment, - unsigned long start, - unsigned long end); -int drm_mm_scan_add_block(struct drm_mm_node *node); -int drm_mm_scan_remove_block(struct drm_mm_node *node); - -extern void drm_mm_debug_table(struct drm_mm *mm, const char *prefix); -#ifdef CONFIG_DEBUG_FS -int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm); -#endif - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_mode.h b/ANDROID_3.4.5/include/drm/drm_mode.h deleted file mode 100644 index 4a0aae38..00000000 --- a/ANDROID_3.4.5/include/drm/drm_mode.h +++ /dev/null @@ -1,446 +0,0 @@ -/* - * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> - * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com> - * Copyright (c) 2008 Red Hat Inc. - * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA - * Copyright (c) 2007-2008 Intel Corporation - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS - * IN THE SOFTWARE. - */ - -#ifndef _DRM_MODE_H -#define _DRM_MODE_H - -#include <linux/types.h> - -#define DRM_DISPLAY_INFO_LEN 32 -#define DRM_CONNECTOR_NAME_LEN 32 -#define DRM_DISPLAY_MODE_LEN 32 -#define DRM_PROP_NAME_LEN 32 - -#define DRM_MODE_TYPE_BUILTIN (1<<0) -#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) -#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) -#define DRM_MODE_TYPE_PREFERRED (1<<3) -#define DRM_MODE_TYPE_DEFAULT (1<<4) -#define DRM_MODE_TYPE_USERDEF (1<<5) -#define DRM_MODE_TYPE_DRIVER (1<<6) - -/* Video mode flags */ -/* bit compatible with the xorg definitions. */ -#define DRM_MODE_FLAG_PHSYNC (1<<0) -#define DRM_MODE_FLAG_NHSYNC (1<<1) -#define DRM_MODE_FLAG_PVSYNC (1<<2) -#define DRM_MODE_FLAG_NVSYNC (1<<3) -#define DRM_MODE_FLAG_INTERLACE (1<<4) -#define DRM_MODE_FLAG_DBLSCAN (1<<5) -#define DRM_MODE_FLAG_CSYNC (1<<6) -#define DRM_MODE_FLAG_PCSYNC (1<<7) -#define DRM_MODE_FLAG_NCSYNC (1<<8) -#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ -#define DRM_MODE_FLAG_BCAST (1<<10) -#define DRM_MODE_FLAG_PIXMUX (1<<11) -#define DRM_MODE_FLAG_DBLCLK (1<<12) -#define DRM_MODE_FLAG_CLKDIV2 (1<<13) - -/* DPMS flags */ -/* bit compatible with the xorg definitions. */ -#define DRM_MODE_DPMS_ON 0 -#define DRM_MODE_DPMS_STANDBY 1 -#define DRM_MODE_DPMS_SUSPEND 2 -#define DRM_MODE_DPMS_OFF 3 - -/* Scaling mode options */ -#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or - software can still scale) */ -#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ -#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ -#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ - -/* Dithering mode options */ -#define DRM_MODE_DITHERING_OFF 0 -#define DRM_MODE_DITHERING_ON 1 -#define DRM_MODE_DITHERING_AUTO 2 - -/* Dirty info options */ -#define DRM_MODE_DIRTY_OFF 0 -#define DRM_MODE_DIRTY_ON 1 -#define DRM_MODE_DIRTY_ANNOTATE 2 - -struct drm_mode_modeinfo { - __u32 clock; - __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; - __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; - - __u32 vrefresh; - - __u32 flags; - __u32 type; - char name[DRM_DISPLAY_MODE_LEN]; -}; - -struct drm_mode_card_res { - __u64 fb_id_ptr; - __u64 crtc_id_ptr; - __u64 connector_id_ptr; - __u64 encoder_id_ptr; - __u32 count_fbs; - __u32 count_crtcs; - __u32 count_connectors; - __u32 count_encoders; - __u32 min_width, max_width; - __u32 min_height, max_height; -}; - -struct drm_mode_crtc { - __u64 set_connectors_ptr; - __u32 count_connectors; - - __u32 crtc_id; /**< Id */ - __u32 fb_id; /**< Id of framebuffer */ - - __u32 x, y; /**< Position on the frameuffer */ - - __u32 gamma_size; - __u32 mode_valid; - struct drm_mode_modeinfo mode; -}; - -#define DRM_MODE_PRESENT_TOP_FIELD (1<<0) -#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) - -/* Planes blend with or override other bits on the CRTC */ -struct drm_mode_set_plane { - __u32 plane_id; - __u32 crtc_id; - __u32 fb_id; /* fb object contains surface format type */ - __u32 flags; /* see above flags */ - - /* Signed dest location allows it to be partially off screen */ - __s32 crtc_x, crtc_y; - __u32 crtc_w, crtc_h; - - /* Source values are 16.16 fixed point */ - __u32 src_x, src_y; - __u32 src_h, src_w; -}; - -struct drm_mode_get_plane { - __u32 plane_id; - - __u32 crtc_id; - __u32 fb_id; - - __u32 possible_crtcs; - __u32 gamma_size; - - __u32 count_format_types; - __u64 format_type_ptr; -}; - -struct drm_mode_get_plane_res { - __u64 plane_id_ptr; - __u32 count_planes; -}; - -#define DRM_MODE_ENCODER_NONE 0 -#define DRM_MODE_ENCODER_DAC 1 -#define DRM_MODE_ENCODER_TMDS 2 -#define DRM_MODE_ENCODER_LVDS 3 -#define DRM_MODE_ENCODER_TVDAC 4 -#define DRM_MODE_ENCODER_VIRTUAL 5 - -struct drm_mode_get_encoder { - __u32 encoder_id; - __u32 encoder_type; - - __u32 crtc_id; /**< Id of crtc */ - - __u32 possible_crtcs; - __u32 possible_clones; -}; - -/* This is for connectors with multiple signal types. */ -/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ -#define DRM_MODE_SUBCONNECTOR_Automatic 0 -#define DRM_MODE_SUBCONNECTOR_Unknown 0 -#define DRM_MODE_SUBCONNECTOR_DVID 3 -#define DRM_MODE_SUBCONNECTOR_DVIA 4 -#define DRM_MODE_SUBCONNECTOR_Composite 5 -#define DRM_MODE_SUBCONNECTOR_SVIDEO 6 -#define DRM_MODE_SUBCONNECTOR_Component 8 -#define DRM_MODE_SUBCONNECTOR_SCART 9 - -#define DRM_MODE_CONNECTOR_Unknown 0 -#define DRM_MODE_CONNECTOR_VGA 1 -#define DRM_MODE_CONNECTOR_DVII 2 -#define DRM_MODE_CONNECTOR_DVID 3 -#define DRM_MODE_CONNECTOR_DVIA 4 -#define DRM_MODE_CONNECTOR_Composite 5 -#define DRM_MODE_CONNECTOR_SVIDEO 6 -#define DRM_MODE_CONNECTOR_LVDS 7 -#define DRM_MODE_CONNECTOR_Component 8 -#define DRM_MODE_CONNECTOR_9PinDIN 9 -#define DRM_MODE_CONNECTOR_DisplayPort 10 -#define DRM_MODE_CONNECTOR_HDMIA 11 -#define DRM_MODE_CONNECTOR_HDMIB 12 -#define DRM_MODE_CONNECTOR_TV 13 -#define DRM_MODE_CONNECTOR_eDP 14 -#define DRM_MODE_CONNECTOR_VIRTUAL 15 - -struct drm_mode_get_connector { - - __u64 encoders_ptr; - __u64 modes_ptr; - __u64 props_ptr; - __u64 prop_values_ptr; - - __u32 count_modes; - __u32 count_props; - __u32 count_encoders; - - __u32 encoder_id; /**< Current Encoder */ - __u32 connector_id; /**< Id */ - __u32 connector_type; - __u32 connector_type_id; - - __u32 connection; - __u32 mm_width, mm_height; /**< HxW in millimeters */ - __u32 subpixel; -}; - -#define DRM_MODE_PROP_PENDING (1<<0) -#define DRM_MODE_PROP_RANGE (1<<1) -#define DRM_MODE_PROP_IMMUTABLE (1<<2) -#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ -#define DRM_MODE_PROP_BLOB (1<<4) - -struct drm_mode_property_enum { - __u64 value; - char name[DRM_PROP_NAME_LEN]; -}; - -struct drm_mode_get_property { - __u64 values_ptr; /* values and blob lengths */ - __u64 enum_blob_ptr; /* enum and blob id ptrs */ - - __u32 prop_id; - __u32 flags; - char name[DRM_PROP_NAME_LEN]; - - __u32 count_values; - __u32 count_enum_blobs; -}; - -struct drm_mode_connector_set_property { - __u64 value; - __u32 prop_id; - __u32 connector_id; -}; - -struct drm_mode_get_blob { - __u32 blob_id; - __u32 length; - __u64 data; -}; - -struct drm_mode_fb_cmd { - __u32 fb_id; - __u32 width, height; - __u32 pitch; - __u32 bpp; - __u32 depth; - /* driver specific handle */ - __u32 handle; -}; - -#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ - -struct drm_mode_fb_cmd2 { - __u32 fb_id; - __u32 width, height; - __u32 pixel_format; /* fourcc code from drm_fourcc.h */ - __u32 flags; /* see above flags */ - - /* - * In case of planar formats, this ioctl allows up to 4 - * buffer objects with offets and pitches per plane. - * The pitch and offset order is dictated by the fourcc, - * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: - * - * YUV 4:2:0 image with a plane of 8 bit Y samples - * followed by an interleaved U/V plane containing - * 8 bit 2x2 subsampled colour difference samples. - * - * So it would consist of Y as offset[0] and UV as - * offeset[1]. Note that offset[0] will generally - * be 0. - */ - __u32 handles[4]; - __u32 pitches[4]; /* pitch for each plane */ - __u32 offsets[4]; /* offset of each plane */ -}; - -#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 -#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 -#define DRM_MODE_FB_DIRTY_FLAGS 0x03 - -#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 - -/* - * Mark a region of a framebuffer as dirty. - * - * Some hardware does not automatically update display contents - * as a hardware or software draw to a framebuffer. This ioctl - * allows userspace to tell the kernel and the hardware what - * regions of the framebuffer have changed. - * - * The kernel or hardware is free to update more then just the - * region specified by the clip rects. The kernel or hardware - * may also delay and/or coalesce several calls to dirty into a - * single update. - * - * Userspace may annotate the updates, the annotates are a - * promise made by the caller that the change is either a copy - * of pixels or a fill of a single color in the region specified. - * - * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then - * the number of updated regions are half of num_clips given, - * where the clip rects are paired in src and dst. The width and - * height of each one of the pairs must match. - * - * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller - * promises that the region specified of the clip rects is filled - * completely with a single color as given in the color argument. - */ - -struct drm_mode_fb_dirty_cmd { - __u32 fb_id; - __u32 flags; - __u32 color; - __u32 num_clips; - __u64 clips_ptr; -}; - -struct drm_mode_mode_cmd { - __u32 connector_id; - struct drm_mode_modeinfo mode; -}; - -#define DRM_MODE_CURSOR_BO (1<<0) -#define DRM_MODE_CURSOR_MOVE (1<<1) - -/* - * depending on the value in flags different members are used. - * - * CURSOR_BO uses - * crtc - * width - * height - * handle - if 0 turns the cursor of - * - * CURSOR_MOVE uses - * crtc - * x - * y - */ -struct drm_mode_cursor { - __u32 flags; - __u32 crtc_id; - __s32 x; - __s32 y; - __u32 width; - __u32 height; - /* driver specific handle */ - __u32 handle; -}; - -struct drm_mode_crtc_lut { - __u32 crtc_id; - __u32 gamma_size; - - /* pointers to arrays */ - __u64 red; - __u64 green; - __u64 blue; -}; - -#define DRM_MODE_PAGE_FLIP_EVENT 0x01 -#define DRM_MODE_PAGE_FLIP_FLAGS DRM_MODE_PAGE_FLIP_EVENT - -/* - * Request a page flip on the specified crtc. - * - * This ioctl will ask KMS to schedule a page flip for the specified - * crtc. Once any pending rendering targeting the specified fb (as of - * ioctl time) has completed, the crtc will be reprogrammed to display - * that fb after the next vertical refresh. The ioctl returns - * immediately, but subsequent rendering to the current fb will block - * in the execbuffer ioctl until the page flip happens. If a page - * flip is already pending as the ioctl is called, EBUSY will be - * returned. - * - * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will - * request that drm sends back a vblank event (see drm.h: struct - * drm_event_vblank) when the page flip is done. The user_data field - * passed in with this ioctl will be returned as the user_data field - * in the vblank event struct. - * - * The reserved field must be zero until we figure out something - * clever to use it for. - */ - -struct drm_mode_crtc_page_flip { - __u32 crtc_id; - __u32 fb_id; - __u32 flags; - __u32 reserved; - __u64 user_data; -}; - -/* create a dumb scanout buffer */ -struct drm_mode_create_dumb { - uint32_t height; - uint32_t width; - uint32_t bpp; - uint32_t flags; - /* handle, pitch, size will be returned */ - uint32_t handle; - uint32_t pitch; - uint64_t size; -}; - -/* set up for mmap of a dumb scanout buffer */ -struct drm_mode_map_dumb { - /** Handle for the object being mapped. */ - __u32 handle; - __u32 pad; - /** - * Fake offset to use for subsequent mmap call - * - * This is a fixed-size type for 32/64 compatibility. - */ - __u64 offset; -}; - -struct drm_mode_destroy_dumb { - uint32_t handle; -}; - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_os_linux.h b/ANDROID_3.4.5/include/drm/drm_os_linux.h deleted file mode 100644 index 39336914..00000000 --- a/ANDROID_3.4.5/include/drm/drm_os_linux.h +++ /dev/null @@ -1,127 +0,0 @@ -/** - * \file drm_os_linux.h - * OS abstraction macros. - */ - -#include <linux/interrupt.h> /* For task queue support */ -#include <linux/delay.h> - -#ifndef readq -static inline u64 readq(void __iomem *reg) -{ - return ((u64) readl(reg)) | (((u64) readl(reg + 4UL)) << 32); -} - -static inline void writeq(u64 val, void __iomem *reg) -{ - writel(val & 0xffffffff, reg); - writel(val >> 32, reg + 0x4UL); -} -#endif - -/** Current process ID */ -#define DRM_CURRENTPID task_pid_nr(current) -#define DRM_SUSER(p) capable(CAP_SYS_ADMIN) -#define DRM_UDELAY(d) udelay(d) -/** Read a byte from a MMIO region */ -#define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset)) -/** Read a word from a MMIO region */ -#define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset)) -/** Read a dword from a MMIO region */ -#define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset)) -/** Write a byte into a MMIO region */ -#define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset)) -/** Write a word into a MMIO region */ -#define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset)) -/** Write a dword into a MMIO region */ -#define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset)) -/** Read memory barrier */ - -/** Read a qword from a MMIO region - be careful using these unless you really understand them */ -#define DRM_READ64(map, offset) readq(((void __iomem *)(map)->handle) + (offset)) -/** Write a qword into a MMIO region */ -#define DRM_WRITE64(map, offset, val) writeq(val, ((void __iomem *)(map)->handle) + (offset)) - -#define DRM_READMEMORYBARRIER() rmb() -/** Write memory barrier */ -#define DRM_WRITEMEMORYBARRIER() wmb() -/** Read/write memory barrier */ -#define DRM_MEMORYBARRIER() mb() - -/** IRQ handler arguments and return type and values */ -#define DRM_IRQ_ARGS int irq, void *arg - -/** AGP types */ -#if __OS_HAS_AGP -#define DRM_AGP_MEM struct agp_memory -#define DRM_AGP_KERN struct agp_kern_info -#else -/* define some dummy types for non AGP supporting kernels */ -struct no_agp_kern { - unsigned long aper_base; - unsigned long aper_size; -}; -#define DRM_AGP_MEM int -#define DRM_AGP_KERN struct no_agp_kern -#endif - -#if !(__OS_HAS_MTRR) -static __inline__ int mtrr_add(unsigned long base, unsigned long size, - unsigned int type, char increment) -{ - return -ENODEV; -} - -static __inline__ int mtrr_del(int reg, unsigned long base, unsigned long size) -{ - return -ENODEV; -} - -#define MTRR_TYPE_WRCOMB 1 - -#endif - -/** Other copying of data to kernel space */ -#define DRM_COPY_FROM_USER(arg1, arg2, arg3) \ - copy_from_user(arg1, arg2, arg3) -/** Other copying of data from kernel space */ -#define DRM_COPY_TO_USER(arg1, arg2, arg3) \ - copy_to_user(arg1, arg2, arg3) -/* Macros for copyfrom user, but checking readability only once */ -#define DRM_VERIFYAREA_READ( uaddr, size ) \ - (access_ok( VERIFY_READ, uaddr, size ) ? 0 : -EFAULT) -#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) \ - __copy_from_user(arg1, arg2, arg3) -#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3) \ - __copy_to_user(arg1, arg2, arg3) -#define DRM_GET_USER_UNCHECKED(val, uaddr) \ - __get_user(val, uaddr) - -#define DRM_HZ HZ - -#define DRM_WAIT_ON( ret, queue, timeout, condition ) \ -do { \ - DECLARE_WAITQUEUE(entry, current); \ - unsigned long end = jiffies + (timeout); \ - add_wait_queue(&(queue), &entry); \ - \ - for (;;) { \ - __set_current_state(TASK_INTERRUPTIBLE); \ - if (condition) \ - break; \ - if (time_after_eq(jiffies, end)) { \ - ret = -EBUSY; \ - break; \ - } \ - schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \ - if (signal_pending(current)) { \ - ret = -EINTR; \ - break; \ - } \ - } \ - __set_current_state(TASK_RUNNING); \ - remove_wait_queue(&(queue), &entry); \ -} while (0) - -#define DRM_WAKEUP( queue ) wake_up( queue ) -#define DRM_INIT_WAITQUEUE( queue ) init_waitqueue_head( queue ) diff --git a/ANDROID_3.4.5/include/drm/drm_pciids.h b/ANDROID_3.4.5/include/drm/drm_pciids.h deleted file mode 100644 index 81368ab6..00000000 --- a/ANDROID_3.4.5/include/drm/drm_pciids.h +++ /dev/null @@ -1,766 +0,0 @@ -/* - This file is auto-generated from the drm_pciids.txt in the DRM CVS - Please contact dri-devel@lists.sf.net to add new cards to this list -*/ -#define radeon_PCI_IDS \ - {0x1002, 0x3150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ - {0x1002, 0x3151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x3E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP}, \ - {0x1002, 0x4137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP}, \ - {0x1002, 0x4144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4148, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x414A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x414B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4150, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4153, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4154, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4155, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4156, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350}, \ - {0x1002, 0x4237, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP}, \ - {0x1002, 0x4242, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ - {0x1002, 0x4336, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4337, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4437, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4966, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250}, \ - {0x1002, 0x4967, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250}, \ - {0x1002, 0x4A48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A4D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A4E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A4F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4A54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4B48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4B49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4B4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4B4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4B4C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R420|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x4C57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C58, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C59, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C5A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C66, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C67, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV250|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4C6E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4E44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4E45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4E46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4E47, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R300}, \ - {0x1002, 0x4E48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4E49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4E4A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4E4B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R350}, \ - {0x1002, 0x4E50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4E51, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4E52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4E53, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4E54, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ - {0x1002, 0x4E56, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV350|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ - {0x1002, 0x5145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ - {0x1002, 0x5146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ - {0x1002, 0x5147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R100|RADEON_SINGLE_CRTC}, \ - {0x1002, 0x5148, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ - {0x1002, 0x514C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ - {0x1002, 0x514D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R200}, \ - {0x1002, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200}, \ - {0x1002, 0x5158, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV200}, \ - {0x1002, 0x5159, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ - {0x1002, 0x515A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \ - {0x1002, 0x515E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|RADEON_SINGLE_CRTC}, \ - {0x1002, 0x5460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5464, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5548, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5549, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x554A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x554B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x554C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x554D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x554E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x554F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5550, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5551, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5554, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x564A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x564B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x564F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5652, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5657, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP}, \ - {0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5954, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ - {0x1002, 0x5955, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ - {0x1002, 0x5974, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ - {0x1002, 0x5975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ - {0x1002, 0x5960, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ - {0x1002, 0x5961, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ - {0x1002, 0x5962, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ - {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ - {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \ - {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100|RADEON_SINGLE_CRTC}, \ - {0x1002, 0x5a41, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART}, \ - {0x1002, 0x5a42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ - {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART}, \ - {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \ - {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5b64, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5b65, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5c61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5c63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280|RADEON_IS_MOBILITY}, \ - {0x1002, 0x5d48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5d57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R423|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e48, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6703, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6704, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6705, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6706, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6707, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6708, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6709, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6718, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6719, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x671c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x671d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x671f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6721, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6722, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6723, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6725, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6726, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6728, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6729, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6738, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6739, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x673e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6740, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6741, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6742, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6743, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6744, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6745, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6746, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6747, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6748, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6749, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x674A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6751, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6758, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6759, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x675B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x675D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x675F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6760, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6761, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6762, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6763, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6764, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6765, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6766, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6767, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6768, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6770, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6771, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6772, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6778, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6779, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x677B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAICOS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6784, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6788, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x678A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6790, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6798, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6799, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x679A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x679E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x679F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6801, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6810, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6818, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6819, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6820, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6821, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6823, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6824, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6825, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6826, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6827, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6828, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6829, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x682B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x682D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x682F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6830, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6831, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6837, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6838, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6839, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x683B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x683D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x683F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_VERDE|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6840, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6841, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6842, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6843, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6849, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x684C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PITCAIRN|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TURKS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6888, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6889, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x688A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x688C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x688D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6898, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x6899, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x689b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x689c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x689d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_HEMLOCK|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x689e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CYPRESS|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68a0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68a1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68a8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68a9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68b9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68ba, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68be, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68bf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_JUNIPER|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68c1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68c7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68c8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68c9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68d9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68da, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68de, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_REDWOOD|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68e0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68e1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68e4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68e5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68e8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68e9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68f1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68f2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68f8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68f9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68fa, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x68fe, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CEDAR|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x710A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x710B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x710C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x710E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x710F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R520|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7140, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7141, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7142, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7143, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7144, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7145, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7146, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7147, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x714A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x714B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x714C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x714D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x714E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x714F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7151, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7152, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7153, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x715E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x715F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7181, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7183, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7186, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7187, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7188, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x718A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x718B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x718C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x718D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x718F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7193, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7196, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x719B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x719F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71CE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71D2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71D4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71D5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71D6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x71DE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7244, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7245, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7246, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7247, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7248, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7249, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x724A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x724B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x724C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x724D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x724E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x724F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7280, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV570|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7281, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7283, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7284, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7287, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV570|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7289, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV570|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x728B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV570|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x728C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV570|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7290, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7291, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7293, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7297, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV560|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ - {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ - {0x1002, 0x793f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7941, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x7942, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x796c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ - {0x1002, 0x796d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ - {0x1002, 0x796e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ - {0x1002, 0x796f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \ - {0x1002, 0x9400, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9402, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9403, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x940A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x940B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x940F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R600|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94A1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94A3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94B1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94B3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94B4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94B5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94B9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV740|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9441, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9442, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9443, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9444, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9446, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x944A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x944B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x944C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x944E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9450, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9452, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9456, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x945A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x945B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x945E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9460, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9462, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x946A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x946B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x947A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x947B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9480, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9487, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9488, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9489, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x948A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x948F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9490, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9491, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9495, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9498, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x949C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x949E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x949F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV730|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94C9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94CB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x94CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV610|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9501, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9504, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9505, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9506, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9507, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9508, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9509, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x950F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9515, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9517, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9519, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV670|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9540, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9541, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9542, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x954E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x954F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9552, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9553, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9555, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9557, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x955f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9580, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9581, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9583, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9586, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9587, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9588, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9589, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x958A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x958B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x958C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x958D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x958E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x958F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9590, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9593, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9595, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9596, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9597, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9598, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9599, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x959B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95C9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95CD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95CE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x95CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV620|RADEON_NEW_MEMMAP}, \ - {0x1002, 0x9610, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9611, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9612, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9613, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9614, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9615, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9616, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9642, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9643, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9644, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9645, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO2|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ - {0x1002, 0x9648, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ - {0x1002, 0x9649, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ - {0x1002, 0x964a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x964b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x964c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x964e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ - {0x1002, 0x964f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_SUMO|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP},\ - {0x1002, 0x9710, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9711, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9713, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9714, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9715, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS880|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9802, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9803, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9804, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9806, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9807, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9808, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9809, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x980A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_PALM|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9904, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9905, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9906, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9907, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9908, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9909, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x990A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x990F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9910, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9913, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9917, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9918, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9919, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9990, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9991, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9992, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9993, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x9994, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x99A0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x99A2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0x1002, 0x99A4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ - {0, 0, 0} - -#define r128_PCI_IDS \ - {0x1002, 0x4c45, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4d46, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4d4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5041, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5042, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5043, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5044, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5045, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5046, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5047, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5048, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5049, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x504A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x504B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x504C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x504D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x504E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x504F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5052, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5053, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5054, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5245, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5246, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5247, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x524b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x524c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x534d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5446, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x544C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x5452, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0, 0, 0} - -#define mga_PCI_IDS \ - {0x102b, 0x0520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MGA_CARD_TYPE_G200}, \ - {0x102b, 0x0521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MGA_CARD_TYPE_G200}, \ - {0x102b, 0x0525, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MGA_CARD_TYPE_G400}, \ - {0x102b, 0x2527, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MGA_CARD_TYPE_G550}, \ - {0, 0, 0} - -#define mach64_PCI_IDS \ - {0x1002, 0x4749, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4750, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4751, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4742, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4744, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c49, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c50, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c51, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c44, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x474c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x474f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4752, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4753, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x474d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x474e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c52, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c53, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1002, 0x4c4e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0, 0, 0} - -#define sisdrv_PCI_IDS \ - {0x1039, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1039, 0x5300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1039, 0x6300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1039, 0x6330, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_CHIP_315}, \ - {0x1039, 0x6351, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1039, 0x7300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x18CA, 0x0040, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_CHIP_315}, \ - {0x18CA, 0x0042, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_CHIP_315}, \ - {0, 0, 0} - -#define tdfx_PCI_IDS \ - {0x121a, 0x0003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x121a, 0x0004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x121a, 0x0005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x121a, 0x0007, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x121a, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x121a, 0x000b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0, 0, 0} - -#define viadrv_PCI_IDS \ - {0x1106, 0x3022, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1106, 0x3118, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VIA_PRO_GROUP_A}, \ - {0x1106, 0x3122, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1106, 0x7205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1106, 0x3108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1106, 0x3344, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1106, 0x3343, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x1106, 0x3230, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VIA_DX9_0}, \ - {0x1106, 0x3157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VIA_PRO_GROUP_A}, \ - {0, 0, 0} - -#define i810_PCI_IDS \ - {0x8086, 0x7121, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x7123, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x7125, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x1132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0, 0, 0} - -#define i830_PCI_IDS \ - {0x8086, 0x3577, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0x8086, 0x358e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0, 0, 0} - -#define gamma_PCI_IDS \ - {0x3d3d, 0x0008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ - {0, 0, 0} - -#define savage_PCI_IDS \ - {0x5333, 0x8a20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE3D}, \ - {0x5333, 0x8a21, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE3D}, \ - {0x5333, 0x8a22, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE4}, \ - {0x5333, 0x8a23, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE4}, \ - {0x5333, 0x8c10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE_MX}, \ - {0x5333, 0x8c11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE_MX}, \ - {0x5333, 0x8c12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE_MX}, \ - {0x5333, 0x8c13, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SAVAGE_MX}, \ - {0x5333, 0x8c22, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c24, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c2a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c2b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c2c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8c2f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_SUPERSAVAGE}, \ - {0x5333, 0x8a25, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_PROSAVAGE}, \ - {0x5333, 0x8a26, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_PROSAVAGE}, \ - {0x5333, 0x8d01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_TWISTER}, \ - {0x5333, 0x8d02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_TWISTER}, \ - {0x5333, 0x8d03, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_PROSAVAGEDDR}, \ - {0x5333, 0x8d04, PCI_ANY_ID, PCI_ANY_ID, 0, 0, S3_PROSAVAGEDDR}, \ - {0, 0, 0} - -#define ffb_PCI_IDS \ - {0, 0, 0} - -#define i915_PCI_IDS \ - {0x8086, 0x3577, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2582, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x258a, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2592, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2772, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x27a2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x27ae, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2972, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2982, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2992, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x29a2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x29b2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x29c2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x29d2, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2a02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2a12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2a42, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x2e42, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x0042, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x0046, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0x8086, 0x0102, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ - {0, 0, 0} diff --git a/ANDROID_3.4.5/include/drm/drm_sarea.h b/ANDROID_3.4.5/include/drm/drm_sarea.h deleted file mode 100644 index ee5389d2..00000000 --- a/ANDROID_3.4.5/include/drm/drm_sarea.h +++ /dev/null @@ -1,84 +0,0 @@ -/** - * \file drm_sarea.h - * \brief SAREA definitions - * - * \author Michel Dänzer <michel@daenzer.net> - */ - -/* - * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _DRM_SAREA_H_ -#define _DRM_SAREA_H_ - -#include "drm.h" - -/* SAREA area needs to be at least a page */ -#if defined(__alpha__) -#define SAREA_MAX 0x2000U -#elif defined(__ia64__) -#define SAREA_MAX 0x10000U /* 64kB */ -#else -/* Intel 830M driver needs at least 8k SAREA */ -#define SAREA_MAX 0x2000U -#endif - -/** Maximum number of drawables in the SAREA */ -#define SAREA_MAX_DRAWABLES 256 - -#define SAREA_DRAWABLE_CLAIMED_ENTRY 0x80000000 - -/** SAREA drawable */ -struct drm_sarea_drawable { - unsigned int stamp; - unsigned int flags; -}; - -/** SAREA frame */ -struct drm_sarea_frame { - unsigned int x; - unsigned int y; - unsigned int width; - unsigned int height; - unsigned int fullscreen; -}; - -/** SAREA */ -struct drm_sarea { - /** first thing is always the DRM locking structure */ - struct drm_hw_lock lock; - /** \todo Use readers/writer lock for drm_sarea::drawable_lock */ - struct drm_hw_lock drawable_lock; - struct drm_sarea_drawable drawableTable[SAREA_MAX_DRAWABLES]; /**< drawables */ - struct drm_sarea_frame frame; /**< frame */ - drm_context_t dummy_context; -}; - -#ifndef __KERNEL__ -typedef struct drm_sarea_drawable drm_sarea_drawable_t; -typedef struct drm_sarea_frame drm_sarea_frame_t; -typedef struct drm_sarea drm_sarea_t; -#endif - -#endif /* _DRM_SAREA_H_ */ diff --git a/ANDROID_3.4.5/include/drm/drm_sysfs.h b/ANDROID_3.4.5/include/drm/drm_sysfs.h deleted file mode 100644 index 1d8e033f..00000000 --- a/ANDROID_3.4.5/include/drm/drm_sysfs.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _DRM_SYSFS_H_ -#define _DRM_SYSFS_H_ - -/** - * This minimalistic include file is intended for users (read TTM) that - * don't want to include the full drmP.h file. - */ - -extern int drm_class_device_register(struct device *dev); -extern void drm_class_device_unregister(struct device *dev); - -#endif diff --git a/ANDROID_3.4.5/include/drm/drm_usb.h b/ANDROID_3.4.5/include/drm/drm_usb.h deleted file mode 100644 index 33506c11..00000000 --- a/ANDROID_3.4.5/include/drm/drm_usb.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef DRM_USB_H -#define DRM_USB_H - -#include <drmP.h> - -#include <linux/usb.h> - -extern int drm_usb_init(struct drm_driver *driver, struct usb_driver *udriver); -extern void drm_usb_exit(struct drm_driver *driver, struct usb_driver *udriver); - -int drm_get_usb_dev(struct usb_interface *interface, - const struct usb_device_id *id, - struct drm_driver *driver); - -#endif diff --git a/ANDROID_3.4.5/include/drm/exynos_drm.h b/ANDROID_3.4.5/include/drm/exynos_drm.h deleted file mode 100644 index e478de4e..00000000 --- a/ANDROID_3.4.5/include/drm/exynos_drm.h +++ /dev/null @@ -1,185 +0,0 @@ -/* exynos_drm.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * Authors: - * Inki Dae <inki.dae@samsung.com> - * Joonyoung Shim <jy0922.shim@samsung.com> - * Seung-Woo Kim <sw0312.kim@samsung.com> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef _EXYNOS_DRM_H_ -#define _EXYNOS_DRM_H_ - -/** - * User-desired buffer creation information structure. - * - * @size: user-desired memory allocation size. - * - this size value would be page-aligned internally. - * @flags: user request for setting memory type or cache attributes. - * @handle: returned a handle to created gem object. - * - this handle will be set by gem module of kernel side. - */ -struct drm_exynos_gem_create { - uint64_t size; - unsigned int flags; - unsigned int handle; -}; - -/** - * A structure for getting buffer offset. - * - * @handle: a pointer to gem object created. - * @pad: just padding to be 64-bit aligned. - * @offset: relatived offset value of the memory region allocated. - * - this value should be set by user. - */ -struct drm_exynos_gem_map_off { - unsigned int handle; - unsigned int pad; - uint64_t offset; -}; - -/** - * A structure for mapping buffer. - * - * @handle: a handle to gem object created. - * @size: memory size to be mapped. - * @mapped: having user virtual address mmaped. - * - this variable would be filled by exynos gem module - * of kernel side with user virtual address which is allocated - * by do_mmap(). - */ -struct drm_exynos_gem_mmap { - unsigned int handle; - unsigned int size; - uint64_t mapped; -}; - -/** - * A structure for user connection request of virtual display. - * - * @connection: indicate whether doing connetion or not by user. - * @extensions: if this value is 1 then the vidi driver would need additional - * 128bytes edid data. - * @edid: the edid data pointer from user side. - */ -struct drm_exynos_vidi_connection { - unsigned int connection; - unsigned int extensions; - uint64_t edid; -}; - -struct drm_exynos_plane_set_zpos { - __u32 plane_id; - __s32 zpos; -}; - -/* memory type definitions. */ -enum e_drm_exynos_gem_mem_type { - /* Physically Non-Continuous memory. */ - EXYNOS_BO_NONCONTIG = 1 << 0, - EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG -}; - -#define DRM_EXYNOS_GEM_CREATE 0x00 -#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01 -#define DRM_EXYNOS_GEM_MMAP 0x02 -/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */ -#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06 -#define DRM_EXYNOS_VIDI_CONNECTION 0x07 - -#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ - DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create) - -#define DRM_IOCTL_EXYNOS_GEM_MAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + \ - DRM_EXYNOS_GEM_MAP_OFFSET, struct drm_exynos_gem_map_off) - -#define DRM_IOCTL_EXYNOS_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + \ - DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap) - -#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \ - DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos) - -#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \ - DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection) - -#ifdef __KERNEL__ - -/** - * A structure for lcd panel information. - * - * @timing: default video mode for initializing - * @width_mm: physical size of lcd width. - * @height_mm: physical size of lcd height. - */ -struct exynos_drm_panel_info { - struct fb_videomode timing; - u32 width_mm; - u32 height_mm; -}; - -/** - * Platform Specific Structure for DRM based FIMD. - * - * @panel: default panel info for initializing - * @default_win: default window layer number to be used for UI. - * @bpp: default bit per pixel. - */ -struct exynos_drm_fimd_pdata { - struct exynos_drm_panel_info panel; - u32 vidcon0; - u32 vidcon1; - unsigned int default_win; - unsigned int bpp; -}; - -/** - * Platform Specific Structure for DRM based HDMI. - * - * @hdmi_dev: device point to specific hdmi driver. - * @mixer_dev: device point to specific mixer driver. - * - * this structure is used for common hdmi driver and each device object - * would be used to access specific device driver(hdmi or mixer driver) - */ -struct exynos_drm_common_hdmi_pd { - struct device *hdmi_dev; - struct device *mixer_dev; -}; - -/** - * Platform Specific Structure for DRM based HDMI core. - * - * @timing: default video mode for initializing - * @default_win: default window layer number to be used for UI. - * @bpp: default bit per pixel. - * @is_v13: set if hdmi version 13 is. - */ -struct exynos_drm_hdmi_pdata { - struct fb_videomode timing; - unsigned int default_win; - unsigned int bpp; - unsigned int is_v13:1; -}; - -#endif /* __KERNEL__ */ -#endif /* _EXYNOS_DRM_H_ */ diff --git a/ANDROID_3.4.5/include/drm/gma_drm.h b/ANDROID_3.4.5/include/drm/gma_drm.h deleted file mode 100644 index 884613ee..00000000 --- a/ANDROID_3.4.5/include/drm/gma_drm.h +++ /dev/null @@ -1,91 +0,0 @@ -/************************************************************************** - * Copyright (c) 2007-2011, Intel Corporation. - * All Rights Reserved. - * Copyright (c) 2008, Tungsten Graphics Inc. Cedar Park, TX., USA. - * All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * - **************************************************************************/ - -#ifndef _PSB_DRM_H_ -#define _PSB_DRM_H_ - -/* - * Manage the LUT for an output - */ -struct drm_psb_dpst_lut_arg { - uint8_t lut[256]; - int output_id; -}; - -/* - * Validate modes - */ -struct drm_psb_mode_operation_arg { - u32 obj_id; - u16 operation; - struct drm_mode_modeinfo mode; - u64 data; -}; - -/* - * Query the stolen memory for smarter management of - * memory by the server - */ -struct drm_psb_stolen_memory_arg { - u32 base; - u32 size; -}; - -struct drm_psb_get_pipe_from_crtc_id_arg { - /** ID of CRTC being requested **/ - u32 crtc_id; - /** pipe of requested CRTC **/ - u32 pipe; -}; - -struct drm_psb_gem_create { - __u64 size; - __u32 handle; - __u32 flags; -#define GMA_GEM_CREATE_STOLEN 1 /* Stolen memory can be used */ -}; - -struct drm_psb_gem_mmap { - __u32 handle; - __u32 pad; - /** - * Fake offset to use for subsequent mmap call - * - * This is a fixed-size type for 32/64 compatibility. - */ - __u64 offset; -}; - -/* Controlling the kernel modesetting buffers */ - -#define DRM_GMA_GEM_CREATE 0x00 /* Create a GEM object */ -#define DRM_GMA_GEM_MMAP 0x01 /* Map GEM memory */ -#define DRM_GMA_STOLEN_MEMORY 0x02 /* Report stolen memory */ -#define DRM_GMA_2D_OP 0x03 /* Will be merged later */ -#define DRM_GMA_GAMMA 0x04 /* Set gamma table */ -#define DRM_GMA_ADB 0x05 /* Get backlight */ -#define DRM_GMA_DPST_BL 0x06 /* Set backlight */ -#define DRM_GMA_MODE_OPERATION 0x07 /* Mode validation/DC set */ -#define PSB_MODE_OPERATION_MODE_VALID 0x01 -#define DRM_GMA_GET_PIPE_FROM_CRTC_ID 0x08 /* CRTC to physical pipe# */ - - -#endif diff --git a/ANDROID_3.4.5/include/drm/i2c/ch7006.h b/ANDROID_3.4.5/include/drm/i2c/ch7006.h deleted file mode 100644 index 8390b437..00000000 --- a/ANDROID_3.4.5/include/drm/i2c/ch7006.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Copyright (C) 2009 Francisco Jerez. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef __DRM_I2C_CH7006_H__ -#define __DRM_I2C_CH7006_H__ - -/** - * struct ch7006_encoder_params - * - * Describes how the ch7006 is wired up with the GPU. It should be - * used as the @params parameter of its @set_config method. - * - * See "http://www.chrontel.com/pdf/7006.pdf" for their precise - * meaning. - */ -struct ch7006_encoder_params { - enum { - CH7006_FORMAT_RGB16 = 0, - CH7006_FORMAT_YCrCb24m16, - CH7006_FORMAT_RGB24m16, - CH7006_FORMAT_RGB15, - CH7006_FORMAT_RGB24m12C, - CH7006_FORMAT_RGB24m12I, - CH7006_FORMAT_RGB24m8, - CH7006_FORMAT_RGB16m8, - CH7006_FORMAT_RGB15m8, - CH7006_FORMAT_YCrCb24m8, - } input_format; - - enum { - CH7006_CLOCK_SLAVE = 0, - CH7006_CLOCK_MASTER, - } clock_mode; - - enum { - CH7006_CLOCK_EDGE_NEG = 0, - CH7006_CLOCK_EDGE_POS, - } clock_edge; - - int xcm, pcm; - - enum { - CH7006_SYNC_SLAVE = 0, - CH7006_SYNC_MASTER, - } sync_direction; - - enum { - CH7006_SYNC_SEPARATED = 0, - CH7006_SYNC_EMBEDDED, - } sync_encoding; - - enum { - CH7006_POUT_1_8V = 0, - CH7006_POUT_3_3V, - } pout_level; - - enum { - CH7006_ACTIVE_HSYNC = 0, - CH7006_ACTIVE_DSTART, - } active_detect; -}; - -#endif diff --git a/ANDROID_3.4.5/include/drm/i2c/sil164.h b/ANDROID_3.4.5/include/drm/i2c/sil164.h deleted file mode 100644 index 205e2738..00000000 --- a/ANDROID_3.4.5/include/drm/i2c/sil164.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (C) 2010 Francisco Jerez. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial - * portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef __DRM_I2C_SIL164_H__ -#define __DRM_I2C_SIL164_H__ - -/** - * struct sil164_encoder_params - * - * Describes how the sil164 is connected to the GPU. It should be used - * as the @params parameter of its @set_config method. - * - * See "http://www.siliconimage.com/docs/SiI-DS-0021-E-164.pdf". - */ -struct sil164_encoder_params { - enum { - SIL164_INPUT_EDGE_FALLING = 0, - SIL164_INPUT_EDGE_RISING - } input_edge; - - enum { - SIL164_INPUT_WIDTH_12BIT = 0, - SIL164_INPUT_WIDTH_24BIT - } input_width; - - enum { - SIL164_INPUT_SINGLE_EDGE = 0, - SIL164_INPUT_DUAL_EDGE - } input_dual; - - enum { - SIL164_PLL_FILTER_ON = 0, - SIL164_PLL_FILTER_OFF, - } pll_filter; - - int input_skew; /** < Allowed range [-4, 3], use 0 for no de-skew. */ - int duallink_skew; /** < Allowed range [-4, 3]. */ -}; - -#endif diff --git a/ANDROID_3.4.5/include/drm/i810_drm.h b/ANDROID_3.4.5/include/drm/i810_drm.h deleted file mode 100644 index 7a10bb6f..00000000 --- a/ANDROID_3.4.5/include/drm/i810_drm.h +++ /dev/null @@ -1,281 +0,0 @@ -#ifndef _I810_DRM_H_ -#define _I810_DRM_H_ - -/* WARNING: These defines must be the same as what the Xserver uses. - * if you change them, you must change the defines in the Xserver. - */ - -#ifndef _I810_DEFINES_ -#define _I810_DEFINES_ - -#define I810_DMA_BUF_ORDER 12 -#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) -#define I810_DMA_BUF_NR 256 -#define I810_NR_SAREA_CLIPRECTS 8 - -/* Each region is a minimum of 64k, and there are at most 64 of them. - */ -#define I810_NR_TEX_REGIONS 64 -#define I810_LOG_MIN_TEX_REGION_SIZE 16 -#endif - -#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ -#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ -#define I810_UPLOAD_CTX 0x4 -#define I810_UPLOAD_BUFFERS 0x8 -#define I810_UPLOAD_TEX0 0x10 -#define I810_UPLOAD_TEX1 0x20 -#define I810_UPLOAD_CLIPRECTS 0x40 - -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -/* Destbuffer state - * - backbuffer linear offset and pitch -- invarient in the current dri - * - zbuffer linear offset and pitch -- also invarient - * - drawing origin in back and depth buffers. - * - * Keep the depth/back buffer state here to accommodate private buffers - * in the future. - */ -#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ -#define I810_DESTREG_DI1 1 -#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ -#define I810_DESTREG_DV1 3 -#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ -#define I810_DESTREG_DR1 5 -#define I810_DESTREG_DR2 6 -#define I810_DESTREG_DR3 7 -#define I810_DESTREG_DR4 8 -#define I810_DEST_SETUP_SIZE 10 - -/* Context state - */ -#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */ -#define I810_CTXREG_CF1 1 -#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */ -#define I810_CTXREG_ST1 3 -#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */ -#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */ -#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ -#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ -#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ -#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ -#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ -#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ -#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ -#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ -#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ -#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ -#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ -#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ -#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ -#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ -#define I810_CTX_SETUP_SIZE 20 - -/* Texture state (per tex unit) - */ -#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ -#define I810_TEXREG_MI1 1 -#define I810_TEXREG_MI2 2 -#define I810_TEXREG_MI3 3 -#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ -#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ -#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ -#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ -#define I810_TEX_SETUP_SIZE 8 - -/* Flags for clear ioctl - */ -#define I810_FRONT 0x1 -#define I810_BACK 0x2 -#define I810_DEPTH 0x4 - -typedef enum _drm_i810_init_func { - I810_INIT_DMA = 0x01, - I810_CLEANUP_DMA = 0x02, - I810_INIT_DMA_1_4 = 0x03 -} drm_i810_init_func_t; - -/* This is the init structure after v1.2 */ -typedef struct _drm_i810_init { - drm_i810_init_func_t func; - unsigned int mmio_offset; - unsigned int buffers_offset; - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int overlay_offset; - unsigned int overlay_physical; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; -} drm_i810_init_t; - -/* This is the init structure prior to v1.2 */ -typedef struct _drm_i810_pre12_init { - drm_i810_init_func_t func; - unsigned int mmio_offset; - unsigned int buffers_offset; - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; -} drm_i810_pre12_init_t; - -/* Warning: If you change the SAREA structure you must change the Xserver - * structure as well */ - -typedef struct _drm_i810_tex_region { - unsigned char next, prev; /* indices to form a circular LRU */ - unsigned char in_use; /* owned by a client, or free? */ - int age; /* tracked by clients to update local LRU's */ -} drm_i810_tex_region_t; - -typedef struct _drm_i810_sarea { - unsigned int ContextState[I810_CTX_SETUP_SIZE]; - unsigned int BufferState[I810_DEST_SETUP_SIZE]; - unsigned int TexState[2][I810_TEX_SETUP_SIZE]; - unsigned int dirty; - - unsigned int nbox; - struct drm_clip_rect boxes[I810_NR_SAREA_CLIPRECTS]; - - /* Maintain an LRU of contiguous regions of texture space. If - * you think you own a region of texture memory, and it has an - * age different to the one you set, then you are mistaken and - * it has been stolen by another client. If global texAge - * hasn't changed, there is no need to walk the list. - * - * These regions can be used as a proxy for the fine-grained - * texture information of other clients - by maintaining them - * in the same lru which is used to age their own textures, - * clients have an approximate lru for the whole of global - * texture space, and can make informed decisions as to which - * areas to kick out. There is no need to choose whether to - * kick out your own texture or someone else's - simply eject - * them all in LRU order. - */ - - drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS + 1]; - /* Last elt is sentinal */ - int texAge; /* last time texture was uploaded */ - int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ - int last_quiescent; /* */ - int ctxOwner; /* last context to upload state */ - - int vertex_prim; - - int pf_enabled; /* is pageflipping allowed? */ - int pf_active; - int pf_current_page; /* which buffer is being displayed? */ -} drm_i810_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmMga.h) - */ - -/* i810 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_I810_INIT 0x00 -#define DRM_I810_VERTEX 0x01 -#define DRM_I810_CLEAR 0x02 -#define DRM_I810_FLUSH 0x03 -#define DRM_I810_GETAGE 0x04 -#define DRM_I810_GETBUF 0x05 -#define DRM_I810_SWAP 0x06 -#define DRM_I810_COPY 0x07 -#define DRM_I810_DOCOPY 0x08 -#define DRM_I810_OV0INFO 0x09 -#define DRM_I810_FSTATUS 0x0a -#define DRM_I810_OV0FLIP 0x0b -#define DRM_I810_MC 0x0c -#define DRM_I810_RSTATUS 0x0d -#define DRM_I810_FLIP 0x0e - -#define DRM_IOCTL_I810_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I810_INIT, drm_i810_init_t) -#define DRM_IOCTL_I810_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_I810_VERTEX, drm_i810_vertex_t) -#define DRM_IOCTL_I810_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_I810_CLEAR, drm_i810_clear_t) -#define DRM_IOCTL_I810_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_I810_FLUSH) -#define DRM_IOCTL_I810_GETAGE DRM_IO( DRM_COMMAND_BASE + DRM_I810_GETAGE) -#define DRM_IOCTL_I810_GETBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_I810_GETBUF, drm_i810_dma_t) -#define DRM_IOCTL_I810_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_I810_SWAP) -#define DRM_IOCTL_I810_COPY DRM_IOW( DRM_COMMAND_BASE + DRM_I810_COPY, drm_i810_copy_t) -#define DRM_IOCTL_I810_DOCOPY DRM_IO( DRM_COMMAND_BASE + DRM_I810_DOCOPY) -#define DRM_IOCTL_I810_OV0INFO DRM_IOR( DRM_COMMAND_BASE + DRM_I810_OV0INFO, drm_i810_overlay_t) -#define DRM_IOCTL_I810_FSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FSTATUS) -#define DRM_IOCTL_I810_OV0FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_OV0FLIP) -#define DRM_IOCTL_I810_MC DRM_IOW( DRM_COMMAND_BASE + DRM_I810_MC, drm_i810_mc_t) -#define DRM_IOCTL_I810_RSTATUS DRM_IO ( DRM_COMMAND_BASE + DRM_I810_RSTATUS) -#define DRM_IOCTL_I810_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I810_FLIP) - -typedef struct _drm_i810_clear { - int clear_color; - int clear_depth; - int flags; -} drm_i810_clear_t; - -/* These may be placeholders if we have more cliprects than - * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to - * false, indicating that the buffer will be dispatched again with a - * new set of cliprects. - */ -typedef struct _drm_i810_vertex { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - int discard; /* client is finished with the buffer? */ -} drm_i810_vertex_t; - -typedef struct _drm_i810_copy_t { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - void *address; /* Address to copy from */ -} drm_i810_copy_t; - -#define PR_TRIANGLES (0x0<<18) -#define PR_TRISTRIP_0 (0x1<<18) -#define PR_TRISTRIP_1 (0x2<<18) -#define PR_TRIFAN (0x3<<18) -#define PR_POLYGON (0x4<<18) -#define PR_LINES (0x5<<18) -#define PR_LINESTRIP (0x6<<18) -#define PR_RECTS (0x7<<18) -#define PR_MASK (0x7<<18) - -typedef struct drm_i810_dma { - void *virtual; - int request_idx; - int request_size; - int granted; -} drm_i810_dma_t; - -typedef struct _drm_i810_overlay_t { - unsigned int offset; /* Address of the Overlay Regs */ - unsigned int physical; -} drm_i810_overlay_t; - -typedef struct _drm_i810_mc { - int idx; /* buffer index */ - int used; /* nr bytes in use */ - int num_blocks; /* number of GFXBlocks */ - int *length; /* List of lengths for GFXBlocks (FUTURE) */ - unsigned int last_render; /* Last Render Request */ -} drm_i810_mc_t; - -#endif /* _I810_DRM_H_ */ diff --git a/ANDROID_3.4.5/include/drm/i915_drm.h b/ANDROID_3.4.5/include/drm/i915_drm.h deleted file mode 100644 index da929bb5..00000000 --- a/ANDROID_3.4.5/include/drm/i915_drm.h +++ /dev/null @@ -1,888 +0,0 @@ -/* - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ - -#ifndef _I915_DRM_H_ -#define _I915_DRM_H_ - -#include "drm.h" - -/* Please note that modifications to all structs defined here are - * subject to backwards-compatibility constraints. - */ - -#ifdef __KERNEL__ -/* For use by IPS driver */ -extern unsigned long i915_read_mch_val(void); -extern bool i915_gpu_raise(void); -extern bool i915_gpu_lower(void); -extern bool i915_gpu_busy(void); -extern bool i915_gpu_turbo_disable(void); -#endif - -/* Each region is a minimum of 16k, and there are at most 255 of them. - */ -#define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use - * of chars for next/prev indices */ -#define I915_LOG_MIN_TEX_REGION_SIZE 14 - -typedef struct _drm_i915_init { - enum { - I915_INIT_DMA = 0x01, - I915_CLEANUP_DMA = 0x02, - I915_RESUME_DMA = 0x03 - } func; - unsigned int mmio_offset; - int sarea_priv_offset; - unsigned int ring_start; - unsigned int ring_end; - unsigned int ring_size; - unsigned int front_offset; - unsigned int back_offset; - unsigned int depth_offset; - unsigned int w; - unsigned int h; - unsigned int pitch; - unsigned int pitch_bits; - unsigned int back_pitch; - unsigned int depth_pitch; - unsigned int cpp; - unsigned int chipset; -} drm_i915_init_t; - -typedef struct _drm_i915_sarea { - struct drm_tex_region texList[I915_NR_TEX_REGIONS + 1]; - int last_upload; /* last time texture was uploaded */ - int last_enqueue; /* last time a buffer was enqueued */ - int last_dispatch; /* age of the most recently dispatched buffer */ - int ctxOwner; /* last context to upload state */ - int texAge; - int pf_enabled; /* is pageflipping allowed? */ - int pf_active; - int pf_current_page; /* which buffer is being displayed? */ - int perf_boxes; /* performance boxes to be displayed */ - int width, height; /* screen size in pixels */ - - drm_handle_t front_handle; - int front_offset; - int front_size; - - drm_handle_t back_handle; - int back_offset; - int back_size; - - drm_handle_t depth_handle; - int depth_offset; - int depth_size; - - drm_handle_t tex_handle; - int tex_offset; - int tex_size; - int log_tex_granularity; - int pitch; - int rotation; /* 0, 90, 180 or 270 */ - int rotated_offset; - int rotated_size; - int rotated_pitch; - int virtualX, virtualY; - - unsigned int front_tiled; - unsigned int back_tiled; - unsigned int depth_tiled; - unsigned int rotated_tiled; - unsigned int rotated2_tiled; - - int pipeA_x; - int pipeA_y; - int pipeA_w; - int pipeA_h; - int pipeB_x; - int pipeB_y; - int pipeB_w; - int pipeB_h; - - /* fill out some space for old userspace triple buffer */ - drm_handle_t unused_handle; - __u32 unused1, unused2, unused3; - - /* buffer object handles for static buffers. May change - * over the lifetime of the client. - */ - __u32 front_bo_handle; - __u32 back_bo_handle; - __u32 unused_bo_handle; - __u32 depth_bo_handle; - -} drm_i915_sarea_t; - -/* due to userspace building against these headers we need some compat here */ -#define planeA_x pipeA_x -#define planeA_y pipeA_y -#define planeA_w pipeA_w -#define planeA_h pipeA_h -#define planeB_x pipeB_x -#define planeB_y pipeB_y -#define planeB_w pipeB_w -#define planeB_h pipeB_h - -/* Flags for perf_boxes - */ -#define I915_BOX_RING_EMPTY 0x1 -#define I915_BOX_FLIP 0x2 -#define I915_BOX_WAIT 0x4 -#define I915_BOX_TEXTURE_LOAD 0x8 -#define I915_BOX_LOST_CONTEXT 0x10 - -/* I915 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_I915_INIT 0x00 -#define DRM_I915_FLUSH 0x01 -#define DRM_I915_FLIP 0x02 -#define DRM_I915_BATCHBUFFER 0x03 -#define DRM_I915_IRQ_EMIT 0x04 -#define DRM_I915_IRQ_WAIT 0x05 -#define DRM_I915_GETPARAM 0x06 -#define DRM_I915_SETPARAM 0x07 -#define DRM_I915_ALLOC 0x08 -#define DRM_I915_FREE 0x09 -#define DRM_I915_INIT_HEAP 0x0a -#define DRM_I915_CMDBUFFER 0x0b -#define DRM_I915_DESTROY_HEAP 0x0c -#define DRM_I915_SET_VBLANK_PIPE 0x0d -#define DRM_I915_GET_VBLANK_PIPE 0x0e -#define DRM_I915_VBLANK_SWAP 0x0f -#define DRM_I915_HWS_ADDR 0x11 -#define DRM_I915_GEM_INIT 0x13 -#define DRM_I915_GEM_EXECBUFFER 0x14 -#define DRM_I915_GEM_PIN 0x15 -#define DRM_I915_GEM_UNPIN 0x16 -#define DRM_I915_GEM_BUSY 0x17 -#define DRM_I915_GEM_THROTTLE 0x18 -#define DRM_I915_GEM_ENTERVT 0x19 -#define DRM_I915_GEM_LEAVEVT 0x1a -#define DRM_I915_GEM_CREATE 0x1b -#define DRM_I915_GEM_PREAD 0x1c -#define DRM_I915_GEM_PWRITE 0x1d -#define DRM_I915_GEM_MMAP 0x1e -#define DRM_I915_GEM_SET_DOMAIN 0x1f -#define DRM_I915_GEM_SW_FINISH 0x20 -#define DRM_I915_GEM_SET_TILING 0x21 -#define DRM_I915_GEM_GET_TILING 0x22 -#define DRM_I915_GEM_GET_APERTURE 0x23 -#define DRM_I915_GEM_MMAP_GTT 0x24 -#define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25 -#define DRM_I915_GEM_MADVISE 0x26 -#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 -#define DRM_I915_OVERLAY_ATTRS 0x28 -#define DRM_I915_GEM_EXECBUFFER2 0x29 -#define DRM_I915_GET_SPRITE_COLORKEY 0x2a -#define DRM_I915_SET_SPRITE_COLORKEY 0x2b - -#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) -#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) -#define DRM_IOCTL_I915_FLIP DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLIP) -#define DRM_IOCTL_I915_BATCHBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t) -#define DRM_IOCTL_I915_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t) -#define DRM_IOCTL_I915_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t) -#define DRM_IOCTL_I915_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t) -#define DRM_IOCTL_I915_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t) -#define DRM_IOCTL_I915_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t) -#define DRM_IOCTL_I915_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t) -#define DRM_IOCTL_I915_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t) -#define DRM_IOCTL_I915_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t) -#define DRM_IOCTL_I915_DESTROY_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_I915_DESTROY_HEAP, drm_i915_mem_destroy_heap_t) -#define DRM_IOCTL_I915_SET_VBLANK_PIPE DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SET_VBLANK_PIPE, drm_i915_vblank_pipe_t) -#define DRM_IOCTL_I915_GET_VBLANK_PIPE DRM_IOR( DRM_COMMAND_BASE + DRM_I915_GET_VBLANK_PIPE, drm_i915_vblank_pipe_t) -#define DRM_IOCTL_I915_VBLANK_SWAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_VBLANK_SWAP, drm_i915_vblank_swap_t) -#define DRM_IOCTL_I915_HWS_ADDR DRM_IOW(DRM_COMMAND_BASE + DRM_I915_HWS_ADDR, struct drm_i915_gem_init) -#define DRM_IOCTL_I915_GEM_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_INIT, struct drm_i915_gem_init) -#define DRM_IOCTL_I915_GEM_EXECBUFFER DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER, struct drm_i915_gem_execbuffer) -#define DRM_IOCTL_I915_GEM_EXECBUFFER2 DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER2, struct drm_i915_gem_execbuffer2) -#define DRM_IOCTL_I915_GEM_PIN DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_PIN, struct drm_i915_gem_pin) -#define DRM_IOCTL_I915_GEM_UNPIN DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_UNPIN, struct drm_i915_gem_unpin) -#define DRM_IOCTL_I915_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_BUSY, struct drm_i915_gem_busy) -#define DRM_IOCTL_I915_GEM_THROTTLE DRM_IO ( DRM_COMMAND_BASE + DRM_I915_GEM_THROTTLE) -#define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT) -#define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT) -#define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create) -#define DRM_IOCTL_I915_GEM_PREAD DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread) -#define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite) -#define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap) -#define DRM_IOCTL_I915_GEM_MMAP_GTT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP_GTT, struct drm_i915_gem_mmap_gtt) -#define DRM_IOCTL_I915_GEM_SET_DOMAIN DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SET_DOMAIN, struct drm_i915_gem_set_domain) -#define DRM_IOCTL_I915_GEM_SW_FINISH DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_SW_FINISH, struct drm_i915_gem_sw_finish) -#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) -#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling) -#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) -#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_i915_get_pipe_from_crtc_id) -#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) -#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image) -#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) -#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) -#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) - -/* Allow drivers to submit batchbuffers directly to hardware, relying - * on the security mechanisms provided by hardware. - */ -typedef struct drm_i915_batchbuffer { - int start; /* agp offset */ - int used; /* nr bytes in use */ - int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ - int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ - int num_cliprects; /* mulitpass with multiple cliprects? */ - struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */ -} drm_i915_batchbuffer_t; - -/* As above, but pass a pointer to userspace buffer which can be - * validated by the kernel prior to sending to hardware. - */ -typedef struct _drm_i915_cmdbuffer { - char __user *buf; /* pointer to userspace command buffer */ - int sz; /* nr bytes in buf */ - int DR1; /* hw flags for GFX_OP_DRAWRECT_INFO */ - int DR4; /* window origin for GFX_OP_DRAWRECT_INFO */ - int num_cliprects; /* mulitpass with multiple cliprects? */ - struct drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */ -} drm_i915_cmdbuffer_t; - -/* Userspace can request & wait on irq's: - */ -typedef struct drm_i915_irq_emit { - int __user *irq_seq; -} drm_i915_irq_emit_t; - -typedef struct drm_i915_irq_wait { - int irq_seq; -} drm_i915_irq_wait_t; - -/* Ioctl to query kernel params: - */ -#define I915_PARAM_IRQ_ACTIVE 1 -#define I915_PARAM_ALLOW_BATCHBUFFER 2 -#define I915_PARAM_LAST_DISPATCH 3 -#define I915_PARAM_CHIPSET_ID 4 -#define I915_PARAM_HAS_GEM 5 -#define I915_PARAM_NUM_FENCES_AVAIL 6 -#define I915_PARAM_HAS_OVERLAY 7 -#define I915_PARAM_HAS_PAGEFLIPPING 8 -#define I915_PARAM_HAS_EXECBUF2 9 -#define I915_PARAM_HAS_BSD 10 -#define I915_PARAM_HAS_BLT 11 -#define I915_PARAM_HAS_RELAXED_FENCING 12 -#define I915_PARAM_HAS_COHERENT_RINGS 13 -#define I915_PARAM_HAS_EXEC_CONSTANTS 14 -#define I915_PARAM_HAS_RELAXED_DELTA 15 -#define I915_PARAM_HAS_GEN7_SOL_RESET 16 -#define I915_PARAM_HAS_LLC 17 - -typedef struct drm_i915_getparam { - int param; - int __user *value; -} drm_i915_getparam_t; - -/* Ioctl to set kernel params: - */ -#define I915_SETPARAM_USE_MI_BATCHBUFFER_START 1 -#define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY 2 -#define I915_SETPARAM_ALLOW_BATCHBUFFER 3 -#define I915_SETPARAM_NUM_USED_FENCES 4 - -typedef struct drm_i915_setparam { - int param; - int value; -} drm_i915_setparam_t; - -/* A memory manager for regions of shared memory: - */ -#define I915_MEM_REGION_AGP 1 - -typedef struct drm_i915_mem_alloc { - int region; - int alignment; - int size; - int __user *region_offset; /* offset from start of fb or agp */ -} drm_i915_mem_alloc_t; - -typedef struct drm_i915_mem_free { - int region; - int region_offset; -} drm_i915_mem_free_t; - -typedef struct drm_i915_mem_init_heap { - int region; - int size; - int start; -} drm_i915_mem_init_heap_t; - -/* Allow memory manager to be torn down and re-initialized (eg on - * rotate): - */ -typedef struct drm_i915_mem_destroy_heap { - int region; -} drm_i915_mem_destroy_heap_t; - -/* Allow X server to configure which pipes to monitor for vblank signals - */ -#define DRM_I915_VBLANK_PIPE_A 1 -#define DRM_I915_VBLANK_PIPE_B 2 - -typedef struct drm_i915_vblank_pipe { - int pipe; -} drm_i915_vblank_pipe_t; - -/* Schedule buffer swap at given vertical blank: - */ -typedef struct drm_i915_vblank_swap { - drm_drawable_t drawable; - enum drm_vblank_seq_type seqtype; - unsigned int sequence; -} drm_i915_vblank_swap_t; - -typedef struct drm_i915_hws_addr { - __u64 addr; -} drm_i915_hws_addr_t; - -struct drm_i915_gem_init { - /** - * Beginning offset in the GTT to be managed by the DRM memory - * manager. - */ - __u64 gtt_start; - /** - * Ending offset in the GTT to be managed by the DRM memory - * manager. - */ - __u64 gtt_end; -}; - -struct drm_i915_gem_create { - /** - * Requested size for the object. - * - * The (page-aligned) allocated size for the object will be returned. - */ - __u64 size; - /** - * Returned handle for the object. - * - * Object handles are nonzero. - */ - __u32 handle; - __u32 pad; -}; - -struct drm_i915_gem_pread { - /** Handle for the object being read. */ - __u32 handle; - __u32 pad; - /** Offset into the object to read from */ - __u64 offset; - /** Length of data to read */ - __u64 size; - /** - * Pointer to write the data into. - * - * This is a fixed-size type for 32/64 compatibility. - */ - __u64 data_ptr; -}; - -struct drm_i915_gem_pwrite { - /** Handle for the object being written to. */ - __u32 handle; - __u32 pad; - /** Offset into the object to write to */ - __u64 offset; - /** Length of data to write */ - __u64 size; - /** - * Pointer to read the data from. - * - * This is a fixed-size type for 32/64 compatibility. - */ - __u64 data_ptr; -}; - -struct drm_i915_gem_mmap { - /** Handle for the object being mapped. */ - __u32 handle; - __u32 pad; - /** Offset in the object to map. */ - __u64 offset; - /** - * Length of data to map. - * - * The value will be page-aligned. - */ - __u64 size; - /** - * Returned pointer the data was mapped at. - * - * This is a fixed-size type for 32/64 compatibility. - */ - __u64 addr_ptr; -}; - -struct drm_i915_gem_mmap_gtt { - /** Handle for the object being mapped. */ - __u32 handle; - __u32 pad; - /** - * Fake offset to use for subsequent mmap call - * - * This is a fixed-size type for 32/64 compatibility. - */ - __u64 offset; -}; - -struct drm_i915_gem_set_domain { - /** Handle for the object */ - __u32 handle; - - /** New read domains */ - __u32 read_domains; - - /** New write domain */ - __u32 write_domain; -}; - -struct drm_i915_gem_sw_finish { - /** Handle for the object */ - __u32 handle; -}; - -struct drm_i915_gem_relocation_entry { - /** - * Handle of the buffer being pointed to by this relocation entry. - * - * It's appealing to make this be an index into the mm_validate_entry - * list to refer to the buffer, but this allows the driver to create - * a relocation list for state buffers and not re-write it per - * exec using the buffer. - */ - __u32 target_handle; - - /** - * Value to be added to the offset of the target buffer to make up - * the relocation entry. - */ - __u32 delta; - - /** Offset in the buffer the relocation entry will be written into */ - __u64 offset; - - /** - * Offset value of the target buffer that the relocation entry was last - * written as. - * - * If the buffer has the same offset as last time, we can skip syncing - * and writing the relocation. This value is written back out by - * the execbuffer ioctl when the relocation is written. - */ - __u64 presumed_offset; - - /** - * Target memory domains read by this operation. - */ - __u32 read_domains; - - /** - * Target memory domains written by this operation. - * - * Note that only one domain may be written by the whole - * execbuffer operation, so that where there are conflicts, - * the application will get -EINVAL back. - */ - __u32 write_domain; -}; - -/** @{ - * Intel memory domains - * - * Most of these just align with the various caches in - * the system and are used to flush and invalidate as - * objects end up cached in different domains. - */ -/** CPU cache */ -#define I915_GEM_DOMAIN_CPU 0x00000001 -/** Render cache, used by 2D and 3D drawing */ -#define I915_GEM_DOMAIN_RENDER 0x00000002 -/** Sampler cache, used by texture engine */ -#define I915_GEM_DOMAIN_SAMPLER 0x00000004 -/** Command queue, used to load batch buffers */ -#define I915_GEM_DOMAIN_COMMAND 0x00000008 -/** Instruction cache, used by shader programs */ -#define I915_GEM_DOMAIN_INSTRUCTION 0x00000010 -/** Vertex address cache */ -#define I915_GEM_DOMAIN_VERTEX 0x00000020 -/** GTT domain - aperture and scanout */ -#define I915_GEM_DOMAIN_GTT 0x00000040 -/** @} */ - -struct drm_i915_gem_exec_object { - /** - * User's handle for a buffer to be bound into the GTT for this - * operation. - */ - __u32 handle; - - /** Number of relocations to be performed on this buffer */ - __u32 relocation_count; - /** - * Pointer to array of struct drm_i915_gem_relocation_entry containing - * the relocations to be performed in this buffer. - */ - __u64 relocs_ptr; - - /** Required alignment in graphics aperture */ - __u64 alignment; - - /** - * Returned value of the updated offset of the object, for future - * presumed_offset writes. - */ - __u64 offset; -}; - -struct drm_i915_gem_execbuffer { - /** - * List of buffers to be validated with their relocations to be - * performend on them. - * - * This is a pointer to an array of struct drm_i915_gem_validate_entry. - * - * These buffers must be listed in an order such that all relocations - * a buffer is performing refer to buffers that have already appeared - * in the validate list. - */ - __u64 buffers_ptr; - __u32 buffer_count; - - /** Offset in the batchbuffer to start execution from. */ - __u32 batch_start_offset; - /** Bytes used in batchbuffer from batch_start_offset */ - __u32 batch_len; - __u32 DR1; - __u32 DR4; - __u32 num_cliprects; - /** This is a struct drm_clip_rect *cliprects */ - __u64 cliprects_ptr; -}; - -struct drm_i915_gem_exec_object2 { - /** - * User's handle for a buffer to be bound into the GTT for this - * operation. - */ - __u32 handle; - - /** Number of relocations to be performed on this buffer */ - __u32 relocation_count; - /** - * Pointer to array of struct drm_i915_gem_relocation_entry containing - * the relocations to be performed in this buffer. - */ - __u64 relocs_ptr; - - /** Required alignment in graphics aperture */ - __u64 alignment; - - /** - * Returned value of the updated offset of the object, for future - * presumed_offset writes. - */ - __u64 offset; - -#define EXEC_OBJECT_NEEDS_FENCE (1<<0) - __u64 flags; - __u64 rsvd1; - __u64 rsvd2; -}; - -struct drm_i915_gem_execbuffer2 { - /** - * List of gem_exec_object2 structs - */ - __u64 buffers_ptr; - __u32 buffer_count; - - /** Offset in the batchbuffer to start execution from. */ - __u32 batch_start_offset; - /** Bytes used in batchbuffer from batch_start_offset */ - __u32 batch_len; - __u32 DR1; - __u32 DR4; - __u32 num_cliprects; - /** This is a struct drm_clip_rect *cliprects */ - __u64 cliprects_ptr; -#define I915_EXEC_RING_MASK (7<<0) -#define I915_EXEC_DEFAULT (0<<0) -#define I915_EXEC_RENDER (1<<0) -#define I915_EXEC_BSD (2<<0) -#define I915_EXEC_BLT (3<<0) - -/* Used for switching the constants addressing mode on gen4+ RENDER ring. - * Gen6+ only supports relative addressing to dynamic state (default) and - * absolute addressing. - * - * These flags are ignored for the BSD and BLT rings. - */ -#define I915_EXEC_CONSTANTS_MASK (3<<6) -#define I915_EXEC_CONSTANTS_REL_GENERAL (0<<6) /* default */ -#define I915_EXEC_CONSTANTS_ABSOLUTE (1<<6) -#define I915_EXEC_CONSTANTS_REL_SURFACE (2<<6) /* gen4/5 only */ - __u64 flags; - __u64 rsvd1; - __u64 rsvd2; -}; - -/** Resets the SO write offset registers for transform feedback on gen7. */ -#define I915_EXEC_GEN7_SOL_RESET (1<<8) - -struct drm_i915_gem_pin { - /** Handle of the buffer to be pinned. */ - __u32 handle; - __u32 pad; - - /** alignment required within the aperture */ - __u64 alignment; - - /** Returned GTT offset of the buffer. */ - __u64 offset; -}; - -struct drm_i915_gem_unpin { - /** Handle of the buffer to be unpinned. */ - __u32 handle; - __u32 pad; -}; - -struct drm_i915_gem_busy { - /** Handle of the buffer to check for busy */ - __u32 handle; - - /** Return busy status (1 if busy, 0 if idle) */ - __u32 busy; -}; - -#define I915_TILING_NONE 0 -#define I915_TILING_X 1 -#define I915_TILING_Y 2 - -#define I915_BIT_6_SWIZZLE_NONE 0 -#define I915_BIT_6_SWIZZLE_9 1 -#define I915_BIT_6_SWIZZLE_9_10 2 -#define I915_BIT_6_SWIZZLE_9_11 3 -#define I915_BIT_6_SWIZZLE_9_10_11 4 -/* Not seen by userland */ -#define I915_BIT_6_SWIZZLE_UNKNOWN 5 -/* Seen by userland. */ -#define I915_BIT_6_SWIZZLE_9_17 6 -#define I915_BIT_6_SWIZZLE_9_10_17 7 - -struct drm_i915_gem_set_tiling { - /** Handle of the buffer to have its tiling state updated */ - __u32 handle; - - /** - * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, - * I915_TILING_Y). - * - * This value is to be set on request, and will be updated by the - * kernel on successful return with the actual chosen tiling layout. - * - * The tiling mode may be demoted to I915_TILING_NONE when the system - * has bit 6 swizzling that can't be managed correctly by GEM. - * - * Buffer contents become undefined when changing tiling_mode. - */ - __u32 tiling_mode; - - /** - * Stride in bytes for the object when in I915_TILING_X or - * I915_TILING_Y. - */ - __u32 stride; - - /** - * Returned address bit 6 swizzling required for CPU access through - * mmap mapping. - */ - __u32 swizzle_mode; -}; - -struct drm_i915_gem_get_tiling { - /** Handle of the buffer to get tiling state for. */ - __u32 handle; - - /** - * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, - * I915_TILING_Y). - */ - __u32 tiling_mode; - - /** - * Returned address bit 6 swizzling required for CPU access through - * mmap mapping. - */ - __u32 swizzle_mode; -}; - -struct drm_i915_gem_get_aperture { - /** Total size of the aperture used by i915_gem_execbuffer, in bytes */ - __u64 aper_size; - - /** - * Available space in the aperture used by i915_gem_execbuffer, in - * bytes - */ - __u64 aper_available_size; -}; - -struct drm_i915_get_pipe_from_crtc_id { - /** ID of CRTC being requested **/ - __u32 crtc_id; - - /** pipe of requested CRTC **/ - __u32 pipe; -}; - -#define I915_MADV_WILLNEED 0 -#define I915_MADV_DONTNEED 1 -#define __I915_MADV_PURGED 2 /* internal state */ - -struct drm_i915_gem_madvise { - /** Handle of the buffer to change the backing store advice */ - __u32 handle; - - /* Advice: either the buffer will be needed again in the near future, - * or wont be and could be discarded under memory pressure. - */ - __u32 madv; - - /** Whether the backing store still exists. */ - __u32 retained; -}; - -/* flags */ -#define I915_OVERLAY_TYPE_MASK 0xff -#define I915_OVERLAY_YUV_PLANAR 0x01 -#define I915_OVERLAY_YUV_PACKED 0x02 -#define I915_OVERLAY_RGB 0x03 - -#define I915_OVERLAY_DEPTH_MASK 0xff00 -#define I915_OVERLAY_RGB24 0x1000 -#define I915_OVERLAY_RGB16 0x2000 -#define I915_OVERLAY_RGB15 0x3000 -#define I915_OVERLAY_YUV422 0x0100 -#define I915_OVERLAY_YUV411 0x0200 -#define I915_OVERLAY_YUV420 0x0300 -#define I915_OVERLAY_YUV410 0x0400 - -#define I915_OVERLAY_SWAP_MASK 0xff0000 -#define I915_OVERLAY_NO_SWAP 0x000000 -#define I915_OVERLAY_UV_SWAP 0x010000 -#define I915_OVERLAY_Y_SWAP 0x020000 -#define I915_OVERLAY_Y_AND_UV_SWAP 0x030000 - -#define I915_OVERLAY_FLAGS_MASK 0xff000000 -#define I915_OVERLAY_ENABLE 0x01000000 - -struct drm_intel_overlay_put_image { - /* various flags and src format description */ - __u32 flags; - /* source picture description */ - __u32 bo_handle; - /* stride values and offsets are in bytes, buffer relative */ - __u16 stride_Y; /* stride for packed formats */ - __u16 stride_UV; - __u32 offset_Y; /* offset for packet formats */ - __u32 offset_U; - __u32 offset_V; - /* in pixels */ - __u16 src_width; - __u16 src_height; - /* to compensate the scaling factors for partially covered surfaces */ - __u16 src_scan_width; - __u16 src_scan_height; - /* output crtc description */ - __u32 crtc_id; - __u16 dst_x; - __u16 dst_y; - __u16 dst_width; - __u16 dst_height; -}; - -/* flags */ -#define I915_OVERLAY_UPDATE_ATTRS (1<<0) -#define I915_OVERLAY_UPDATE_GAMMA (1<<1) -struct drm_intel_overlay_attrs { - __u32 flags; - __u32 color_key; - __s32 brightness; - __u32 contrast; - __u32 saturation; - __u32 gamma0; - __u32 gamma1; - __u32 gamma2; - __u32 gamma3; - __u32 gamma4; - __u32 gamma5; -}; - -/* - * Intel sprite handling - * - * Color keying works with a min/mask/max tuple. Both source and destination - * color keying is allowed. - * - * Source keying: - * Sprite pixels within the min & max values, masked against the color channels - * specified in the mask field, will be transparent. All other pixels will - * be displayed on top of the primary plane. For RGB surfaces, only the min - * and mask fields will be used; ranged compares are not allowed. - * - * Destination keying: - * Primary plane pixels that match the min value, masked against the color - * channels specified in the mask field, will be replaced by corresponding - * pixels from the sprite plane. - * - * Note that source & destination keying are exclusive; only one can be - * active on a given plane. - */ - -#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */ -#define I915_SET_COLORKEY_DESTINATION (1<<1) -#define I915_SET_COLORKEY_SOURCE (1<<2) -struct drm_intel_sprite_colorkey { - __u32 plane_id; - __u32 min_value; - __u32 channel_mask; - __u32 max_value; - __u32 flags; -}; - -#endif /* _I915_DRM_H_ */ diff --git a/ANDROID_3.4.5/include/drm/intel-gtt.h b/ANDROID_3.4.5/include/drm/intel-gtt.h deleted file mode 100644 index 923afb5d..00000000 --- a/ANDROID_3.4.5/include/drm/intel-gtt.h +++ /dev/null @@ -1,51 +0,0 @@ -/* Common header for intel-gtt.ko and i915.ko */ - -#ifndef _DRM_INTEL_GTT_H -#define _DRM_INTEL_GTT_H - -const struct intel_gtt { - /* Size of memory reserved for graphics by the BIOS */ - unsigned int stolen_size; - /* Total number of gtt entries. */ - unsigned int gtt_total_entries; - /* Part of the gtt that is mappable by the cpu, for those chips where - * this is not the full gtt. */ - unsigned int gtt_mappable_entries; - /* Whether i915 needs to use the dmar apis or not. */ - unsigned int needs_dmar : 1; - /* Whether we idle the gpu before mapping/unmapping */ - unsigned int do_idle_maps : 1; - /* Share the scratch page dma with ppgtts. */ - dma_addr_t scratch_page_dma; - /* for ppgtt PDE access */ - u32 __iomem *gtt; -} *intel_gtt_get(void); - -void intel_gtt_chipset_flush(void); -void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg); -void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries); -int intel_gtt_map_memory(struct page **pages, unsigned int num_entries, - struct scatterlist **sg_list, int *num_sg); -void intel_gtt_insert_sg_entries(struct scatterlist *sg_list, - unsigned int sg_len, - unsigned int pg_start, - unsigned int flags); -void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries, - struct page **pages, unsigned int flags); - -/* Special gtt memory types */ -#define AGP_DCACHE_MEMORY 1 -#define AGP_PHYS_MEMORY 2 - -/* New caching attributes for gen6/sandybridge */ -#define AGP_USER_CACHED_MEMORY_LLC_MLC (AGP_USER_TYPES + 2) -#define AGP_USER_UNCACHED_MEMORY (AGP_USER_TYPES + 4) - -/* flag for GFDT type */ -#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3) - -#ifdef CONFIG_INTEL_IOMMU -extern int intel_iommu_gfx_mapped; -#endif - -#endif diff --git a/ANDROID_3.4.5/include/drm/mga_drm.h b/ANDROID_3.4.5/include/drm/mga_drm.h deleted file mode 100644 index fca81700..00000000 --- a/ANDROID_3.4.5/include/drm/mga_drm.h +++ /dev/null @@ -1,419 +0,0 @@ -/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- - * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com - * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Jeff Hartmann <jhartmann@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - * - * Rewritten by: - * Gareth Hughes <gareth@valinux.com> - */ - -#ifndef __MGA_DRM_H__ -#define __MGA_DRM_H__ - -#include "drm.h" - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (mga_sarea.h) - */ - -#ifndef __MGA_SAREA_DEFINES__ -#define __MGA_SAREA_DEFINES__ - -/* WARP pipe flags - */ -#define MGA_F 0x1 /* fog */ -#define MGA_A 0x2 /* alpha */ -#define MGA_S 0x4 /* specular */ -#define MGA_T2 0x8 /* multitexture */ - -#define MGA_WARP_TGZ 0 -#define MGA_WARP_TGZF (MGA_F) -#define MGA_WARP_TGZA (MGA_A) -#define MGA_WARP_TGZAF (MGA_F|MGA_A) -#define MGA_WARP_TGZS (MGA_S) -#define MGA_WARP_TGZSF (MGA_S|MGA_F) -#define MGA_WARP_TGZSA (MGA_S|MGA_A) -#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) -#define MGA_WARP_T2GZ (MGA_T2) -#define MGA_WARP_T2GZF (MGA_T2|MGA_F) -#define MGA_WARP_T2GZA (MGA_T2|MGA_A) -#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) -#define MGA_WARP_T2GZS (MGA_T2|MGA_S) -#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) -#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) -#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) - -#define MGA_MAX_G200_PIPES 8 /* no multitex */ -#define MGA_MAX_G400_PIPES 16 -#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES -#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ - -#define MGA_CARD_TYPE_G200 1 -#define MGA_CARD_TYPE_G400 2 -#define MGA_CARD_TYPE_G450 3 /* not currently used */ -#define MGA_CARD_TYPE_G550 4 - -#define MGA_FRONT 0x1 -#define MGA_BACK 0x2 -#define MGA_DEPTH 0x4 - -/* What needs to be changed for the current vertex dma buffer? - */ -#define MGA_UPLOAD_CONTEXT 0x1 -#define MGA_UPLOAD_TEX0 0x2 -#define MGA_UPLOAD_TEX1 0x4 -#define MGA_UPLOAD_PIPE 0x8 -#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ -#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ -#define MGA_UPLOAD_2D 0x40 -#define MGA_WAIT_AGE 0x80 /* handled client-side */ -#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ -#if 0 -#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock - quiescent */ -#endif - -/* 32 buffers of 64k each, total 2 meg. - */ -#define MGA_BUFFER_SIZE (1 << 16) -#define MGA_NUM_BUFFERS 128 - -/* Keep these small for testing. - */ -#define MGA_NR_SAREA_CLIPRECTS 8 - -/* 2 heaps (1 for card, 1 for agp), each divided into up to 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define MGA_CARD_HEAP 0 -#define MGA_AGP_HEAP 1 -#define MGA_NR_TEX_HEAPS 2 -#define MGA_NR_TEX_REGIONS 16 -#define MGA_LOG_MIN_TEX_REGION_SIZE 16 - -#define DRM_MGA_IDLE_RETRY 2048 - -#endif /* __MGA_SAREA_DEFINES__ */ - -/* Setup registers for 3D context - */ -typedef struct { - unsigned int dstorg; - unsigned int maccess; - unsigned int plnwt; - unsigned int dwgctl; - unsigned int alphactrl; - unsigned int fogcolor; - unsigned int wflag; - unsigned int tdualstage0; - unsigned int tdualstage1; - unsigned int fcol; - unsigned int stencil; - unsigned int stencilctl; -} drm_mga_context_regs_t; - -/* Setup registers for 2D, X server - */ -typedef struct { - unsigned int pitch; -} drm_mga_server_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int texctl; - unsigned int texctl2; - unsigned int texfilter; - unsigned int texbordercol; - unsigned int texorg; - unsigned int texwidth; - unsigned int texheight; - unsigned int texorg1; - unsigned int texorg2; - unsigned int texorg3; - unsigned int texorg4; -} drm_mga_texture_regs_t; - -/* General aging mechanism - */ -typedef struct { - unsigned int head; /* Position of head pointer */ - unsigned int wrap; /* Primary DMA wrap count */ -} drm_mga_age_t; - -typedef struct _drm_mga_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex dma buffer. - */ - drm_mga_context_regs_t context_state; - drm_mga_server_regs_t server_state; - drm_mga_texture_regs_t tex_state[2]; - unsigned int warp_pipe; - unsigned int dirty; - unsigned int vertsize; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[MGA_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Information about the most recently used 3d drawable. The - * client fills in the req_* fields, the server fills in the - * exported_ fields and puts the cliprects into boxes, above. - * - * The client clears the exported_drawable field before - * clobbering the boxes data. - */ - unsigned int req_drawable; /* the X drawable id */ - unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ - - unsigned int exported_drawable; - unsigned int exported_index; - unsigned int exported_stamp; - unsigned int exported_buffers; - unsigned int exported_nfront; - unsigned int exported_nback; - int exported_back_x, exported_front_x, exported_w; - int exported_back_y, exported_front_y, exported_h; - struct drm_clip_rect exported_boxes[MGA_NR_SAREA_CLIPRECTS]; - - /* Counters for aging textures and for client-side throttling. - */ - unsigned int status[4]; - unsigned int last_wrap; - - drm_mga_age_t last_frame; - unsigned int last_enqueue; /* last time a buffer was enqueued */ - unsigned int last_dispatch; /* age of the most recently dispatched buffer */ - unsigned int last_quiescent; /* */ - - /* LRU lists for texture memory in agp space and on the card. - */ - struct drm_tex_region texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; - unsigned int texAge[MGA_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; -} drm_mga_sarea_t; - -/* MGA specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_MGA_INIT 0x00 -#define DRM_MGA_FLUSH 0x01 -#define DRM_MGA_RESET 0x02 -#define DRM_MGA_SWAP 0x03 -#define DRM_MGA_CLEAR 0x04 -#define DRM_MGA_VERTEX 0x05 -#define DRM_MGA_INDICES 0x06 -#define DRM_MGA_ILOAD 0x07 -#define DRM_MGA_BLIT 0x08 -#define DRM_MGA_GETPARAM 0x09 - -/* 3.2: - * ioctls for operating on fences. - */ -#define DRM_MGA_SET_FENCE 0x0a -#define DRM_MGA_WAIT_FENCE 0x0b -#define DRM_MGA_DMA_BOOTSTRAP 0x0c - -#define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) -#define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, struct drm_lock) -#define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) -#define DRM_IOCTL_MGA_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MGA_SWAP) -#define DRM_IOCTL_MGA_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_CLEAR, drm_mga_clear_t) -#define DRM_IOCTL_MGA_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_VERTEX, drm_mga_vertex_t) -#define DRM_IOCTL_MGA_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INDICES, drm_mga_indices_t) -#define DRM_IOCTL_MGA_ILOAD DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_ILOAD, drm_mga_iload_t) -#define DRM_IOCTL_MGA_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_BLIT, drm_mga_blit_t) -#define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t) -#define DRM_IOCTL_MGA_SET_FENCE DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_SET_FENCE, __u32) -#define DRM_IOCTL_MGA_WAIT_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_WAIT_FENCE, __u32) -#define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) - -typedef struct _drm_mga_warp_index { - int installed; - unsigned long phys_addr; - int size; -} drm_mga_warp_index_t; - -typedef struct drm_mga_init { - enum { - MGA_INIT_DMA = 0x01, - MGA_CLEANUP_DMA = 0x02 - } func; - - unsigned long sarea_priv_offset; - - int chipset; - int sgram; - - unsigned int maccess; - - unsigned int fb_cpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - - unsigned int depth_cpp; - unsigned int depth_offset, depth_pitch; - - unsigned int texture_offset[MGA_NR_TEX_HEAPS]; - unsigned int texture_size[MGA_NR_TEX_HEAPS]; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long status_offset; - unsigned long warp_offset; - unsigned long primary_offset; - unsigned long buffers_offset; -} drm_mga_init_t; - -typedef struct drm_mga_dma_bootstrap { - /** - * \name AGP texture region - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will - * be filled in with the actual AGP texture settings. - * - * \warning - * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode - * is zero, it means that PCI memory (most likely through the use of - * an IOMMU) is being used for "AGP" textures. - */ - /*@{ */ - unsigned long texture_handle; /**< Handle used to map AGP textures. */ - __u32 texture_size; /**< Size of the AGP texture region. */ - /*@} */ - - /** - * Requested size of the primary DMA region. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual AGP mode. If AGP was not available - */ - __u32 primary_size; - - /** - * Requested number of secondary DMA buffers. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual number of secondary DMA buffers - * allocated. Particularly when PCI DMA is used, this may be - * (subtantially) less than the number requested. - */ - __u32 secondary_bin_count; - - /** - * Requested size of each secondary DMA buffer. - * - * While the kernel \b is free to reduce - * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed - * to reduce dma_mga_dma_bootstrap::secondary_bin_size. - */ - __u32 secondary_bin_size; - - /** - * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, - * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is - * zero, it means that PCI DMA should be used, even if AGP is - * possible. - * - * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be - * filled in with the actual AGP mode. If AGP was not available - * (i.e., PCI DMA was used), this value will be zero. - */ - __u32 agp_mode; - - /** - * Desired AGP GART size, measured in megabytes. - */ - __u8 agp_size; -} drm_mga_dma_bootstrap_t; - -typedef struct drm_mga_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_mga_clear_t; - -typedef struct drm_mga_vertex { - int idx; /* buffer to queue */ - int used; /* bytes in use */ - int discard; /* client finished with buffer? */ -} drm_mga_vertex_t; - -typedef struct drm_mga_indices { - int idx; /* buffer to queue */ - unsigned int start; - unsigned int end; - int discard; /* client finished with buffer? */ -} drm_mga_indices_t; - -typedef struct drm_mga_iload { - int idx; - unsigned int dstorg; - unsigned int length; -} drm_mga_iload_t; - -typedef struct _drm_mga_blit { - unsigned int planemask; - unsigned int srcorg; - unsigned int dstorg; - int src_pitch, dst_pitch; - int delta_sx, delta_sy; - int delta_dx, delta_dy; - int height, ydir; /* flip image vertically */ - int source_pitch, dest_pitch; -} drm_mga_blit_t; - -/* 3.1: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define MGA_PARAM_IRQ_NR 1 - -/* 3.2: Query the actual card type. The DDX only distinguishes between - * G200 chips and non-G200 chips, which it calls G400. It turns out that - * there are some very sublte differences between the G4x0 chips and the G550 - * chips. Using this parameter query, a client-side driver can detect the - * difference between a G4x0 and a G550. - */ -#define MGA_PARAM_CARD_TYPE 2 - -typedef struct drm_mga_getparam { - int param; - void __user *value; -} drm_mga_getparam_t; - -#endif diff --git a/ANDROID_3.4.5/include/drm/nouveau_drm.h b/ANDROID_3.4.5/include/drm/nouveau_drm.h deleted file mode 100644 index 5edd3a76..00000000 --- a/ANDROID_3.4.5/include/drm/nouveau_drm.h +++ /dev/null @@ -1,218 +0,0 @@ -/* - * Copyright 2005 Stephane Marchesin. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef __NOUVEAU_DRM_H__ -#define __NOUVEAU_DRM_H__ - -#define NOUVEAU_DRM_HEADER_PATCHLEVEL 16 - -struct drm_nouveau_channel_alloc { - uint32_t fb_ctxdma_handle; - uint32_t tt_ctxdma_handle; - - int channel; - uint32_t pushbuf_domains; - - /* Notifier memory */ - uint32_t notifier_handle; - - /* DRM-enforced subchannel assignments */ - struct { - uint32_t handle; - uint32_t grclass; - } subchan[8]; - uint32_t nr_subchan; -}; - -struct drm_nouveau_channel_free { - int channel; -}; - -struct drm_nouveau_grobj_alloc { - int channel; - uint32_t handle; - int class; -}; - -struct drm_nouveau_notifierobj_alloc { - uint32_t channel; - uint32_t handle; - uint32_t size; - uint32_t offset; -}; - -struct drm_nouveau_gpuobj_free { - int channel; - uint32_t handle; -}; - -/* FIXME : maybe unify {GET,SET}PARAMs */ -#define NOUVEAU_GETPARAM_PCI_VENDOR 3 -#define NOUVEAU_GETPARAM_PCI_DEVICE 4 -#define NOUVEAU_GETPARAM_BUS_TYPE 5 -#define NOUVEAU_GETPARAM_FB_SIZE 8 -#define NOUVEAU_GETPARAM_AGP_SIZE 9 -#define NOUVEAU_GETPARAM_CHIPSET_ID 11 -#define NOUVEAU_GETPARAM_VM_VRAM_BASE 12 -#define NOUVEAU_GETPARAM_GRAPH_UNITS 13 -#define NOUVEAU_GETPARAM_PTIMER_TIME 14 -#define NOUVEAU_GETPARAM_HAS_BO_USAGE 15 -#define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16 -struct drm_nouveau_getparam { - uint64_t param; - uint64_t value; -}; - -struct drm_nouveau_setparam { - uint64_t param; - uint64_t value; -}; - -#define NOUVEAU_GEM_DOMAIN_CPU (1 << 0) -#define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1) -#define NOUVEAU_GEM_DOMAIN_GART (1 << 2) -#define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3) - -#define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */ -#define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00 -#define NOUVEAU_GEM_TILE_16BPP 0x00000001 -#define NOUVEAU_GEM_TILE_32BPP 0x00000002 -#define NOUVEAU_GEM_TILE_ZETA 0x00000004 -#define NOUVEAU_GEM_TILE_NONCONTIG 0x00000008 - -struct drm_nouveau_gem_info { - uint32_t handle; - uint32_t domain; - uint64_t size; - uint64_t offset; - uint64_t map_handle; - uint32_t tile_mode; - uint32_t tile_flags; -}; - -struct drm_nouveau_gem_new { - struct drm_nouveau_gem_info info; - uint32_t channel_hint; - uint32_t align; -}; - -#define NOUVEAU_GEM_MAX_BUFFERS 1024 -struct drm_nouveau_gem_pushbuf_bo_presumed { - uint32_t valid; - uint32_t domain; - uint64_t offset; -}; - -struct drm_nouveau_gem_pushbuf_bo { - uint64_t user_priv; - uint32_t handle; - uint32_t read_domains; - uint32_t write_domains; - uint32_t valid_domains; - struct drm_nouveau_gem_pushbuf_bo_presumed presumed; -}; - -#define NOUVEAU_GEM_RELOC_LOW (1 << 0) -#define NOUVEAU_GEM_RELOC_HIGH (1 << 1) -#define NOUVEAU_GEM_RELOC_OR (1 << 2) -#define NOUVEAU_GEM_MAX_RELOCS 1024 -struct drm_nouveau_gem_pushbuf_reloc { - uint32_t reloc_bo_index; - uint32_t reloc_bo_offset; - uint32_t bo_index; - uint32_t flags; - uint32_t data; - uint32_t vor; - uint32_t tor; -}; - -#define NOUVEAU_GEM_MAX_PUSH 512 -struct drm_nouveau_gem_pushbuf_push { - uint32_t bo_index; - uint32_t pad; - uint64_t offset; - uint64_t length; -}; - -struct drm_nouveau_gem_pushbuf { - uint32_t channel; - uint32_t nr_buffers; - uint64_t buffers; - uint32_t nr_relocs; - uint32_t nr_push; - uint64_t relocs; - uint64_t push; - uint32_t suffix0; - uint32_t suffix1; - uint64_t vram_available; - uint64_t gart_available; -}; - -#define NOUVEAU_GEM_CPU_PREP_NOWAIT 0x00000001 -#define NOUVEAU_GEM_CPU_PREP_WRITE 0x00000004 -struct drm_nouveau_gem_cpu_prep { - uint32_t handle; - uint32_t flags; -}; - -struct drm_nouveau_gem_cpu_fini { - uint32_t handle; -}; - -enum nouveau_bus_type { - NV_AGP = 0, - NV_PCI = 1, - NV_PCIE = 2, -}; - -struct drm_nouveau_sarea { -}; - -#define DRM_NOUVEAU_GETPARAM 0x00 -#define DRM_NOUVEAU_SETPARAM 0x01 -#define DRM_NOUVEAU_CHANNEL_ALLOC 0x02 -#define DRM_NOUVEAU_CHANNEL_FREE 0x03 -#define DRM_NOUVEAU_GROBJ_ALLOC 0x04 -#define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC 0x05 -#define DRM_NOUVEAU_GPUOBJ_FREE 0x06 -#define DRM_NOUVEAU_GEM_NEW 0x40 -#define DRM_NOUVEAU_GEM_PUSHBUF 0x41 -#define DRM_NOUVEAU_GEM_CPU_PREP 0x42 -#define DRM_NOUVEAU_GEM_CPU_FINI 0x43 -#define DRM_NOUVEAU_GEM_INFO 0x44 - -#define DRM_IOCTL_NOUVEAU_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GETPARAM, struct drm_nouveau_getparam) -#define DRM_IOCTL_NOUVEAU_SETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_SETPARAM, struct drm_nouveau_setparam) -#define DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_ALLOC, struct drm_nouveau_channel_alloc) -#define DRM_IOCTL_NOUVEAU_CHANNEL_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_CHANNEL_FREE, struct drm_nouveau_channel_free) -#define DRM_IOCTL_NOUVEAU_GROBJ_ALLOC DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GROBJ_ALLOC, struct drm_nouveau_grobj_alloc) -#define DRM_IOCTL_NOUVEAU_NOTIFIEROBJ_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, struct drm_nouveau_notifierobj_alloc) -#define DRM_IOCTL_NOUVEAU_GPUOBJ_FREE DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GPUOBJ_FREE, struct drm_nouveau_gpuobj_free) -#define DRM_IOCTL_NOUVEAU_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_NEW, struct drm_nouveau_gem_new) -#define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_PUSHBUF, struct drm_nouveau_gem_pushbuf) -#define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_PREP, struct drm_nouveau_gem_cpu_prep) -#define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_CPU_FINI, struct drm_nouveau_gem_cpu_fini) -#define DRM_IOCTL_NOUVEAU_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_NOUVEAU_GEM_INFO, struct drm_nouveau_gem_info) - -#endif /* __NOUVEAU_DRM_H__ */ diff --git a/ANDROID_3.4.5/include/drm/r128_drm.h b/ANDROID_3.4.5/include/drm/r128_drm.h deleted file mode 100644 index 8d8878b5..00000000 --- a/ANDROID_3.4.5/include/drm/r128_drm.h +++ /dev/null @@ -1,326 +0,0 @@ -/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*- - * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com - */ -/* - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Gareth Hughes <gareth@valinux.com> - * Kevin E. Martin <martin@valinux.com> - */ - -#ifndef __R128_DRM_H__ -#define __R128_DRM_H__ - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (r128_sarea.h) - */ -#ifndef __R128_SAREA_DEFINES__ -#define __R128_SAREA_DEFINES__ - -/* What needs to be changed for the current vertex buffer? - */ -#define R128_UPLOAD_CONTEXT 0x001 -#define R128_UPLOAD_SETUP 0x002 -#define R128_UPLOAD_TEX0 0x004 -#define R128_UPLOAD_TEX1 0x008 -#define R128_UPLOAD_TEX0IMAGES 0x010 -#define R128_UPLOAD_TEX1IMAGES 0x020 -#define R128_UPLOAD_CORE 0x040 -#define R128_UPLOAD_MASKS 0x080 -#define R128_UPLOAD_WINDOW 0x100 -#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */ -#define R128_REQUIRE_QUIESCENCE 0x400 -#define R128_UPLOAD_ALL 0x7ff - -#define R128_FRONT 0x1 -#define R128_BACK 0x2 -#define R128_DEPTH 0x4 - -/* Primitive types - */ -#define R128_POINTS 0x1 -#define R128_LINES 0x2 -#define R128_LINE_STRIP 0x3 -#define R128_TRIANGLES 0x4 -#define R128_TRIANGLE_FAN 0x5 -#define R128_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define R128_BUFFER_SIZE 16384 - -/* Byte offsets for indirect buffer data - */ -#define R128_INDEX_PRIM_OFFSET 20 -#define R128_HOSTDATA_BLIT_OFFSET 32 - -/* Keep these small for testing. - */ -#define R128_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/AGP). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define R128_LOCAL_TEX_HEAP 0 -#define R128_AGP_TEX_HEAP 1 -#define R128_NR_TEX_HEAPS 2 -#define R128_NR_TEX_REGIONS 64 -#define R128_LOG_TEX_GRANULARITY 16 - -#define R128_NR_CONTEXT_REGS 12 - -#define R128_MAX_TEXTURE_LEVELS 11 -#define R128_MAX_TEXTURE_UNITS 2 - -#endif /* __R128_SAREA_DEFINES__ */ - -typedef struct { - /* Context state - can be written in one large chunk */ - unsigned int dst_pitch_offset_c; - unsigned int dp_gui_master_cntl_c; - unsigned int sc_top_left_c; - unsigned int sc_bottom_right_c; - unsigned int z_offset_c; - unsigned int z_pitch_c; - unsigned int z_sten_cntl_c; - unsigned int tex_cntl_c; - unsigned int misc_3d_state_cntl_reg; - unsigned int texture_clr_cmp_clr_c; - unsigned int texture_clr_cmp_msk_c; - unsigned int fog_color_c; - - /* Texture state */ - unsigned int tex_size_pitch_c; - unsigned int constant_color_c; - - /* Setup state */ - unsigned int pm4_vc_fpu_setup; - unsigned int setup_cntl; - - /* Mask state */ - unsigned int dp_write_mask; - unsigned int sten_ref_mask_c; - unsigned int plane_3d_mask_c; - - /* Window state */ - unsigned int window_xy_offset; - - /* Core state */ - unsigned int scale_3d_cntl; -} drm_r128_context_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int tex_cntl; - unsigned int tex_combine_cntl; - unsigned int tex_size_pitch; - unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS]; - unsigned int tex_border_color; -} drm_r128_texture_regs_t; - -typedef struct drm_r128_sarea { - /* The channel for communication of state information to the kernel - * on firing a vertex buffer. - */ - drm_r128_context_regs_t context_state; - drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - - struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1]; - unsigned int tex_age[R128_NR_TEX_HEAPS]; - int ctx_owner; - int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */ - int pfCurrentPage; /* which buffer is being displayed? */ -} drm_r128_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmR128.h) - */ - -/* Rage 128 specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_R128_INIT 0x00 -#define DRM_R128_CCE_START 0x01 -#define DRM_R128_CCE_STOP 0x02 -#define DRM_R128_CCE_RESET 0x03 -#define DRM_R128_CCE_IDLE 0x04 -/* 0x05 not used */ -#define DRM_R128_RESET 0x06 -#define DRM_R128_SWAP 0x07 -#define DRM_R128_CLEAR 0x08 -#define DRM_R128_VERTEX 0x09 -#define DRM_R128_INDICES 0x0a -#define DRM_R128_BLIT 0x0b -#define DRM_R128_DEPTH 0x0c -#define DRM_R128_STIPPLE 0x0d -/* 0x0e not used */ -#define DRM_R128_INDIRECT 0x0f -#define DRM_R128_FULLSCREEN 0x10 -#define DRM_R128_CLEAR2 0x11 -#define DRM_R128_GETPARAM 0x12 -#define DRM_R128_FLIP 0x13 - -#define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t) -#define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START) -#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t) -#define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET) -#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE) -/* 0x05 not used */ -#define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET) -#define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP) -#define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t) -#define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t) -#define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t) -#define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t) -#define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t) -#define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t) -/* 0x0e not used */ -#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t) -#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t) -#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t) -#define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t) -#define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP) - -typedef struct drm_r128_init { - enum { - R128_INIT_CCE = 0x01, - R128_CLEANUP_CCE = 0x02 - } func; - unsigned long sarea_priv_offset; - int is_pci; - int cce_mode; - int cce_secure; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - unsigned int span_offset; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; -} drm_r128_init_t; - -typedef struct drm_r128_cce_stop { - int flush; - int idle; -} drm_r128_cce_stop_t; - -typedef struct drm_r128_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; -} drm_r128_clear_t; - -typedef struct drm_r128_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_r128_vertex_t; - -typedef struct drm_r128_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_r128_indices_t; - -typedef struct drm_r128_blit { - int idx; - int pitch; - int offset; - int format; - unsigned short x, y; - unsigned short width, height; -} drm_r128_blit_t; - -typedef struct drm_r128_depth { - enum { - R128_WRITE_SPAN = 0x01, - R128_WRITE_PIXELS = 0x02, - R128_READ_SPAN = 0x03, - R128_READ_PIXELS = 0x04 - } func; - int n; - int __user *x; - int __user *y; - unsigned int __user *buffer; - unsigned char __user *mask; -} drm_r128_depth_t; - -typedef struct drm_r128_stipple { - unsigned int __user *mask; -} drm_r128_stipple_t; - -typedef struct drm_r128_indirect { - int idx; - int start; - int end; - int discard; -} drm_r128_indirect_t; - -typedef struct drm_r128_fullscreen { - enum { - R128_INIT_FULLSCREEN = 0x01, - R128_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_r128_fullscreen_t; - -/* 2.3: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define R128_PARAM_IRQ_NR 1 - -typedef struct drm_r128_getparam { - int param; - void __user *value; -} drm_r128_getparam_t; - -#endif diff --git a/ANDROID_3.4.5/include/drm/radeon_drm.h b/ANDROID_3.4.5/include/drm/radeon_drm.h deleted file mode 100644 index 7c491b4b..00000000 --- a/ANDROID_3.4.5/include/drm/radeon_drm.h +++ /dev/null @@ -1,975 +0,0 @@ -/* radeon_drm.h -- Public header for the radeon driver -*- linux-c -*- - * - * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. - * Copyright 2000 VA Linux Systems, Inc., Fremont, California. - * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: - * Kevin E. Martin <martin@valinux.com> - * Gareth Hughes <gareth@valinux.com> - * Keith Whitwell <keith@tungstengraphics.com> - */ - -#ifndef __RADEON_DRM_H__ -#define __RADEON_DRM_H__ - -#include "drm.h" - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the X server file (radeon_sarea.h) - */ -#ifndef __RADEON_SAREA_DEFINES__ -#define __RADEON_SAREA_DEFINES__ - -/* Old style state flags, required for sarea interface (1.1 and 1.2 - * clears) and 1.2 drm_vertex2 ioctl. - */ -#define RADEON_UPLOAD_CONTEXT 0x00000001 -#define RADEON_UPLOAD_VERTFMT 0x00000002 -#define RADEON_UPLOAD_LINE 0x00000004 -#define RADEON_UPLOAD_BUMPMAP 0x00000008 -#define RADEON_UPLOAD_MASKS 0x00000010 -#define RADEON_UPLOAD_VIEWPORT 0x00000020 -#define RADEON_UPLOAD_SETUP 0x00000040 -#define RADEON_UPLOAD_TCL 0x00000080 -#define RADEON_UPLOAD_MISC 0x00000100 -#define RADEON_UPLOAD_TEX0 0x00000200 -#define RADEON_UPLOAD_TEX1 0x00000400 -#define RADEON_UPLOAD_TEX2 0x00000800 -#define RADEON_UPLOAD_TEX0IMAGES 0x00001000 -#define RADEON_UPLOAD_TEX1IMAGES 0x00002000 -#define RADEON_UPLOAD_TEX2IMAGES 0x00004000 -#define RADEON_UPLOAD_CLIPRECTS 0x00008000 /* handled client-side */ -#define RADEON_REQUIRE_QUIESCENCE 0x00010000 -#define RADEON_UPLOAD_ZBIAS 0x00020000 /* version 1.2 and newer */ -#define RADEON_UPLOAD_ALL 0x003effff -#define RADEON_UPLOAD_CONTEXT_ALL 0x003e01ff - -/* New style per-packet identifiers for use in cmd_buffer ioctl with - * the RADEON_EMIT_PACKET command. Comments relate new packets to old - * state bits and the packet size: - */ -#define RADEON_EMIT_PP_MISC 0 /* context/7 */ -#define RADEON_EMIT_PP_CNTL 1 /* context/3 */ -#define RADEON_EMIT_RB3D_COLORPITCH 2 /* context/1 */ -#define RADEON_EMIT_RE_LINE_PATTERN 3 /* line/2 */ -#define RADEON_EMIT_SE_LINE_WIDTH 4 /* line/1 */ -#define RADEON_EMIT_PP_LUM_MATRIX 5 /* bumpmap/1 */ -#define RADEON_EMIT_PP_ROT_MATRIX_0 6 /* bumpmap/2 */ -#define RADEON_EMIT_RB3D_STENCILREFMASK 7 /* masks/3 */ -#define RADEON_EMIT_SE_VPORT_XSCALE 8 /* viewport/6 */ -#define RADEON_EMIT_SE_CNTL 9 /* setup/2 */ -#define RADEON_EMIT_SE_CNTL_STATUS 10 /* setup/1 */ -#define RADEON_EMIT_RE_MISC 11 /* misc/1 */ -#define RADEON_EMIT_PP_TXFILTER_0 12 /* tex0/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_0 13 /* tex0/1 */ -#define RADEON_EMIT_PP_TXFILTER_1 14 /* tex1/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_1 15 /* tex1/1 */ -#define RADEON_EMIT_PP_TXFILTER_2 16 /* tex2/6 */ -#define RADEON_EMIT_PP_BORDER_COLOR_2 17 /* tex2/1 */ -#define RADEON_EMIT_SE_ZBIAS_FACTOR 18 /* zbias/2 */ -#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT 19 /* tcl/11 */ -#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED 20 /* material/17 */ -#define R200_EMIT_PP_TXCBLEND_0 21 /* tex0/4 */ -#define R200_EMIT_PP_TXCBLEND_1 22 /* tex1/4 */ -#define R200_EMIT_PP_TXCBLEND_2 23 /* tex2/4 */ -#define R200_EMIT_PP_TXCBLEND_3 24 /* tex3/4 */ -#define R200_EMIT_PP_TXCBLEND_4 25 /* tex4/4 */ -#define R200_EMIT_PP_TXCBLEND_5 26 /* tex5/4 */ -#define R200_EMIT_PP_TXCBLEND_6 27 /* /4 */ -#define R200_EMIT_PP_TXCBLEND_7 28 /* /4 */ -#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0 29 /* tcl/7 */ -#define R200_EMIT_TFACTOR_0 30 /* tf/7 */ -#define R200_EMIT_VTX_FMT_0 31 /* vtx/5 */ -#define R200_EMIT_VAP_CTL 32 /* vap/1 */ -#define R200_EMIT_MATRIX_SELECT_0 33 /* msl/5 */ -#define R200_EMIT_TEX_PROC_CTL_2 34 /* tcg/5 */ -#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL 35 /* tcl/1 */ -#define R200_EMIT_PP_TXFILTER_0 36 /* tex0/6 */ -#define R200_EMIT_PP_TXFILTER_1 37 /* tex1/6 */ -#define R200_EMIT_PP_TXFILTER_2 38 /* tex2/6 */ -#define R200_EMIT_PP_TXFILTER_3 39 /* tex3/6 */ -#define R200_EMIT_PP_TXFILTER_4 40 /* tex4/6 */ -#define R200_EMIT_PP_TXFILTER_5 41 /* tex5/6 */ -#define R200_EMIT_PP_TXOFFSET_0 42 /* tex0/1 */ -#define R200_EMIT_PP_TXOFFSET_1 43 /* tex1/1 */ -#define R200_EMIT_PP_TXOFFSET_2 44 /* tex2/1 */ -#define R200_EMIT_PP_TXOFFSET_3 45 /* tex3/1 */ -#define R200_EMIT_PP_TXOFFSET_4 46 /* tex4/1 */ -#define R200_EMIT_PP_TXOFFSET_5 47 /* tex5/1 */ -#define R200_EMIT_VTE_CNTL 48 /* vte/1 */ -#define R200_EMIT_OUTPUT_VTX_COMP_SEL 49 /* vtx/1 */ -#define R200_EMIT_PP_TAM_DEBUG3 50 /* tam/1 */ -#define R200_EMIT_PP_CNTL_X 51 /* cst/1 */ -#define R200_EMIT_RB3D_DEPTHXY_OFFSET 52 /* cst/1 */ -#define R200_EMIT_RE_AUX_SCISSOR_CNTL 53 /* cst/1 */ -#define R200_EMIT_RE_SCISSOR_TL_0 54 /* cst/2 */ -#define R200_EMIT_RE_SCISSOR_TL_1 55 /* cst/2 */ -#define R200_EMIT_RE_SCISSOR_TL_2 56 /* cst/2 */ -#define R200_EMIT_SE_VAP_CNTL_STATUS 57 /* cst/1 */ -#define R200_EMIT_SE_VTX_STATE_CNTL 58 /* cst/1 */ -#define R200_EMIT_RE_POINTSIZE 59 /* cst/1 */ -#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0 60 /* cst/4 */ -#define R200_EMIT_PP_CUBIC_FACES_0 61 -#define R200_EMIT_PP_CUBIC_OFFSETS_0 62 -#define R200_EMIT_PP_CUBIC_FACES_1 63 -#define R200_EMIT_PP_CUBIC_OFFSETS_1 64 -#define R200_EMIT_PP_CUBIC_FACES_2 65 -#define R200_EMIT_PP_CUBIC_OFFSETS_2 66 -#define R200_EMIT_PP_CUBIC_FACES_3 67 -#define R200_EMIT_PP_CUBIC_OFFSETS_3 68 -#define R200_EMIT_PP_CUBIC_FACES_4 69 -#define R200_EMIT_PP_CUBIC_OFFSETS_4 70 -#define R200_EMIT_PP_CUBIC_FACES_5 71 -#define R200_EMIT_PP_CUBIC_OFFSETS_5 72 -#define RADEON_EMIT_PP_TEX_SIZE_0 73 -#define RADEON_EMIT_PP_TEX_SIZE_1 74 -#define RADEON_EMIT_PP_TEX_SIZE_2 75 -#define R200_EMIT_RB3D_BLENDCOLOR 76 -#define R200_EMIT_TCL_POINT_SPRITE_CNTL 77 -#define RADEON_EMIT_PP_CUBIC_FACES_0 78 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0 79 -#define RADEON_EMIT_PP_CUBIC_FACES_1 80 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1 81 -#define RADEON_EMIT_PP_CUBIC_FACES_2 82 -#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2 83 -#define R200_EMIT_PP_TRI_PERF_CNTL 84 -#define R200_EMIT_PP_AFS_0 85 -#define R200_EMIT_PP_AFS_1 86 -#define R200_EMIT_ATF_TFACTOR 87 -#define R200_EMIT_PP_TXCTLALL_0 88 -#define R200_EMIT_PP_TXCTLALL_1 89 -#define R200_EMIT_PP_TXCTLALL_2 90 -#define R200_EMIT_PP_TXCTLALL_3 91 -#define R200_EMIT_PP_TXCTLALL_4 92 -#define R200_EMIT_PP_TXCTLALL_5 93 -#define R200_EMIT_VAP_PVS_CNTL 94 -#define RADEON_MAX_STATE_PACKETS 95 - -/* Commands understood by cmd_buffer ioctl. More can be added but - * obviously these can't be removed or changed: - */ -#define RADEON_CMD_PACKET 1 /* emit one of the register packets above */ -#define RADEON_CMD_SCALARS 2 /* emit scalar data */ -#define RADEON_CMD_VECTORS 3 /* emit vector data */ -#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */ -#define RADEON_CMD_PACKET3 5 /* emit hw packet */ -#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */ -#define RADEON_CMD_SCALARS2 7 /* r200 stopgap */ -#define RADEON_CMD_WAIT 8 /* emit hw wait commands -- note: - * doesn't make the cpu wait, just - * the graphics hardware */ -#define RADEON_CMD_VECLINEAR 9 /* another r200 stopgap */ - -typedef union { - int i; - struct { - unsigned char cmd_type, pad0, pad1, pad2; - } header; - struct { - unsigned char cmd_type, packet_id, pad0, pad1; - } packet; - struct { - unsigned char cmd_type, offset, stride, count; - } scalars; - struct { - unsigned char cmd_type, offset, stride, count; - } vectors; - struct { - unsigned char cmd_type, addr_lo, addr_hi, count; - } veclinear; - struct { - unsigned char cmd_type, buf_idx, pad0, pad1; - } dma; - struct { - unsigned char cmd_type, flags, pad0, pad1; - } wait; -} drm_radeon_cmd_header_t; - -#define RADEON_WAIT_2D 0x1 -#define RADEON_WAIT_3D 0x2 - -/* Allowed parameters for R300_CMD_PACKET3 - */ -#define R300_CMD_PACKET3_CLEAR 0 -#define R300_CMD_PACKET3_RAW 1 - -/* Commands understood by cmd_buffer ioctl for R300. - * The interface has not been stabilized, so some of these may be removed - * and eventually reordered before stabilization. - */ -#define R300_CMD_PACKET0 1 -#define R300_CMD_VPU 2 /* emit vertex program upload */ -#define R300_CMD_PACKET3 3 /* emit a packet3 */ -#define R300_CMD_END3D 4 /* emit sequence ending 3d rendering */ -#define R300_CMD_CP_DELAY 5 -#define R300_CMD_DMA_DISCARD 6 -#define R300_CMD_WAIT 7 -# define R300_WAIT_2D 0x1 -# define R300_WAIT_3D 0x2 -/* these two defines are DOING IT WRONG - however - * we have userspace which relies on using these. - * The wait interface is backwards compat new - * code should use the NEW_WAIT defines below - * THESE ARE NOT BIT FIELDS - */ -# define R300_WAIT_2D_CLEAN 0x3 -# define R300_WAIT_3D_CLEAN 0x4 - -# define R300_NEW_WAIT_2D_3D 0x3 -# define R300_NEW_WAIT_2D_2D_CLEAN 0x4 -# define R300_NEW_WAIT_3D_3D_CLEAN 0x6 -# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8 - -#define R300_CMD_SCRATCH 8 -#define R300_CMD_R500FP 9 - -typedef union { - unsigned int u; - struct { - unsigned char cmd_type, pad0, pad1, pad2; - } header; - struct { - unsigned char cmd_type, count, reglo, reghi; - } packet0; - struct { - unsigned char cmd_type, count, adrlo, adrhi; - } vpu; - struct { - unsigned char cmd_type, packet, pad0, pad1; - } packet3; - struct { - unsigned char cmd_type, packet; - unsigned short count; /* amount of packet2 to emit */ - } delay; - struct { - unsigned char cmd_type, buf_idx, pad0, pad1; - } dma; - struct { - unsigned char cmd_type, flags, pad0, pad1; - } wait; - struct { - unsigned char cmd_type, reg, n_bufs, flags; - } scratch; - struct { - unsigned char cmd_type, count, adrlo, adrhi_flags; - } r500fp; -} drm_r300_cmd_header_t; - -#define RADEON_FRONT 0x1 -#define RADEON_BACK 0x2 -#define RADEON_DEPTH 0x4 -#define RADEON_STENCIL 0x8 -#define RADEON_CLEAR_FASTZ 0x80000000 -#define RADEON_USE_HIERZ 0x40000000 -#define RADEON_USE_COMP_ZBUF 0x20000000 - -#define R500FP_CONSTANT_TYPE (1 << 1) -#define R500FP_CONSTANT_CLAMP (1 << 2) - -/* Primitive types - */ -#define RADEON_POINTS 0x1 -#define RADEON_LINES 0x2 -#define RADEON_LINE_STRIP 0x3 -#define RADEON_TRIANGLES 0x4 -#define RADEON_TRIANGLE_FAN 0x5 -#define RADEON_TRIANGLE_STRIP 0x6 - -/* Vertex/indirect buffer size - */ -#define RADEON_BUFFER_SIZE 65536 - -/* Byte offsets for indirect buffer data - */ -#define RADEON_INDEX_PRIM_OFFSET 20 - -#define RADEON_SCRATCH_REG_OFFSET 32 - -#define R600_SCRATCH_REG_OFFSET 256 - -#define RADEON_NR_SAREA_CLIPRECTS 12 - -/* There are 2 heaps (local/GART). Each region within a heap is a - * minimum of 64k, and there are at most 64 of them per heap. - */ -#define RADEON_LOCAL_TEX_HEAP 0 -#define RADEON_GART_TEX_HEAP 1 -#define RADEON_NR_TEX_HEAPS 2 -#define RADEON_NR_TEX_REGIONS 64 -#define RADEON_LOG_TEX_GRANULARITY 16 - -#define RADEON_MAX_TEXTURE_LEVELS 12 -#define RADEON_MAX_TEXTURE_UNITS 3 - -#define RADEON_MAX_SURFACES 8 - -/* Blits have strict offset rules. All blit offset must be aligned on - * a 1K-byte boundary. - */ -#define RADEON_OFFSET_SHIFT 10 -#define RADEON_OFFSET_ALIGN (1 << RADEON_OFFSET_SHIFT) -#define RADEON_OFFSET_MASK (RADEON_OFFSET_ALIGN - 1) - -#endif /* __RADEON_SAREA_DEFINES__ */ - -typedef struct { - unsigned int red; - unsigned int green; - unsigned int blue; - unsigned int alpha; -} radeon_color_regs_t; - -typedef struct { - /* Context state */ - unsigned int pp_misc; /* 0x1c14 */ - unsigned int pp_fog_color; - unsigned int re_solid_color; - unsigned int rb3d_blendcntl; - unsigned int rb3d_depthoffset; - unsigned int rb3d_depthpitch; - unsigned int rb3d_zstencilcntl; - - unsigned int pp_cntl; /* 0x1c38 */ - unsigned int rb3d_cntl; - unsigned int rb3d_coloroffset; - unsigned int re_width_height; - unsigned int rb3d_colorpitch; - unsigned int se_cntl; - - /* Vertex format state */ - unsigned int se_coord_fmt; /* 0x1c50 */ - - /* Line state */ - unsigned int re_line_pattern; /* 0x1cd0 */ - unsigned int re_line_state; - - unsigned int se_line_width; /* 0x1db8 */ - - /* Bumpmap state */ - unsigned int pp_lum_matrix; /* 0x1d00 */ - - unsigned int pp_rot_matrix_0; /* 0x1d58 */ - unsigned int pp_rot_matrix_1; - - /* Mask state */ - unsigned int rb3d_stencilrefmask; /* 0x1d7c */ - unsigned int rb3d_ropcntl; - unsigned int rb3d_planemask; - - /* Viewport state */ - unsigned int se_vport_xscale; /* 0x1d98 */ - unsigned int se_vport_xoffset; - unsigned int se_vport_yscale; - unsigned int se_vport_yoffset; - unsigned int se_vport_zscale; - unsigned int se_vport_zoffset; - - /* Setup state */ - unsigned int se_cntl_status; /* 0x2140 */ - - /* Misc state */ - unsigned int re_top_left; /* 0x26c0 */ - unsigned int re_misc; -} drm_radeon_context_regs_t; - -typedef struct { - /* Zbias state */ - unsigned int se_zbias_factor; /* 0x1dac */ - unsigned int se_zbias_constant; -} drm_radeon_context2_regs_t; - -/* Setup registers for each texture unit - */ -typedef struct { - unsigned int pp_txfilter; - unsigned int pp_txformat; - unsigned int pp_txoffset; - unsigned int pp_txcblend; - unsigned int pp_txablend; - unsigned int pp_tfactor; - unsigned int pp_border_color; -} drm_radeon_texture_regs_t; - -typedef struct { - unsigned int start; - unsigned int finish; - unsigned int prim:8; - unsigned int stateidx:8; - unsigned int numverts:16; /* overloaded as offset/64 for elt prims */ - unsigned int vc_format; /* vertex format */ -} drm_radeon_prim_t; - -typedef struct { - drm_radeon_context_regs_t context; - drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS]; - drm_radeon_context2_regs_t context2; - unsigned int dirty; -} drm_radeon_state_t; - -typedef struct { - /* The channel for communication of state information to the - * kernel on firing a vertex buffer with either of the - * obsoleted vertex/index ioctls. - */ - drm_radeon_context_regs_t context_state; - drm_radeon_texture_regs_t tex_state[RADEON_MAX_TEXTURE_UNITS]; - unsigned int dirty; - unsigned int vertsize; - unsigned int vc_format; - - /* The current cliprects, or a subset thereof. - */ - struct drm_clip_rect boxes[RADEON_NR_SAREA_CLIPRECTS]; - unsigned int nbox; - - /* Counters for client-side throttling of rendering clients. - */ - unsigned int last_frame; - unsigned int last_dispatch; - unsigned int last_clear; - - struct drm_tex_region tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS + - 1]; - unsigned int tex_age[RADEON_NR_TEX_HEAPS]; - int ctx_owner; - int pfState; /* number of 3d windows (0,1,2ormore) */ - int pfCurrentPage; /* which buffer is being displayed? */ - int crtc2_base; /* CRTC2 frame offset */ - int tiling_enabled; /* set by drm, read by 2d + 3d clients */ -} drm_radeon_sarea_t; - -/* WARNING: If you change any of these defines, make sure to change the - * defines in the Xserver file (xf86drmRadeon.h) - * - * KW: actually it's illegal to change any of this (backwards compatibility). - */ - -/* Radeon specific ioctls - * The device specific ioctl range is 0x40 to 0x79. - */ -#define DRM_RADEON_CP_INIT 0x00 -#define DRM_RADEON_CP_START 0x01 -#define DRM_RADEON_CP_STOP 0x02 -#define DRM_RADEON_CP_RESET 0x03 -#define DRM_RADEON_CP_IDLE 0x04 -#define DRM_RADEON_RESET 0x05 -#define DRM_RADEON_FULLSCREEN 0x06 -#define DRM_RADEON_SWAP 0x07 -#define DRM_RADEON_CLEAR 0x08 -#define DRM_RADEON_VERTEX 0x09 -#define DRM_RADEON_INDICES 0x0A -#define DRM_RADEON_NOT_USED -#define DRM_RADEON_STIPPLE 0x0C -#define DRM_RADEON_INDIRECT 0x0D -#define DRM_RADEON_TEXTURE 0x0E -#define DRM_RADEON_VERTEX2 0x0F -#define DRM_RADEON_CMDBUF 0x10 -#define DRM_RADEON_GETPARAM 0x11 -#define DRM_RADEON_FLIP 0x12 -#define DRM_RADEON_ALLOC 0x13 -#define DRM_RADEON_FREE 0x14 -#define DRM_RADEON_INIT_HEAP 0x15 -#define DRM_RADEON_IRQ_EMIT 0x16 -#define DRM_RADEON_IRQ_WAIT 0x17 -#define DRM_RADEON_CP_RESUME 0x18 -#define DRM_RADEON_SETPARAM 0x19 -#define DRM_RADEON_SURF_ALLOC 0x1a -#define DRM_RADEON_SURF_FREE 0x1b -/* KMS ioctl */ -#define DRM_RADEON_GEM_INFO 0x1c -#define DRM_RADEON_GEM_CREATE 0x1d -#define DRM_RADEON_GEM_MMAP 0x1e -#define DRM_RADEON_GEM_PREAD 0x21 -#define DRM_RADEON_GEM_PWRITE 0x22 -#define DRM_RADEON_GEM_SET_DOMAIN 0x23 -#define DRM_RADEON_GEM_WAIT_IDLE 0x24 -#define DRM_RADEON_CS 0x26 -#define DRM_RADEON_INFO 0x27 -#define DRM_RADEON_GEM_SET_TILING 0x28 -#define DRM_RADEON_GEM_GET_TILING 0x29 -#define DRM_RADEON_GEM_BUSY 0x2a -#define DRM_RADEON_GEM_VA 0x2b - -#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) -#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) -#define DRM_IOCTL_RADEON_CP_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_STOP, drm_radeon_cp_stop_t) -#define DRM_IOCTL_RADEON_CP_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESET) -#define DRM_IOCTL_RADEON_CP_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_IDLE) -#define DRM_IOCTL_RADEON_RESET DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_RESET) -#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FULLSCREEN, drm_radeon_fullscreen_t) -#define DRM_IOCTL_RADEON_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_SWAP) -#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CLEAR, drm_radeon_clear_t) -#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX, drm_radeon_vertex_t) -#define DRM_IOCTL_RADEON_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INDICES, drm_radeon_indices_t) -#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_STIPPLE, drm_radeon_stipple_t) -#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INDIRECT, drm_radeon_indirect_t) -#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_TEXTURE, drm_radeon_texture_t) -#define DRM_IOCTL_RADEON_VERTEX2 DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_VERTEX2, drm_radeon_vertex2_t) -#define DRM_IOCTL_RADEON_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CMDBUF, drm_radeon_cmd_buffer_t) -#define DRM_IOCTL_RADEON_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GETPARAM, drm_radeon_getparam_t) -#define DRM_IOCTL_RADEON_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_FLIP) -#define DRM_IOCTL_RADEON_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_ALLOC, drm_radeon_mem_alloc_t) -#define DRM_IOCTL_RADEON_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_FREE, drm_radeon_mem_free_t) -#define DRM_IOCTL_RADEON_INIT_HEAP DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_INIT_HEAP, drm_radeon_mem_init_heap_t) -#define DRM_IOCTL_RADEON_IRQ_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_IRQ_EMIT, drm_radeon_irq_emit_t) -#define DRM_IOCTL_RADEON_IRQ_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t) -#define DRM_IOCTL_RADEON_CP_RESUME DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME) -#define DRM_IOCTL_RADEON_SETPARAM DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t) -#define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t) -#define DRM_IOCTL_RADEON_SURF_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t) -/* KMS */ -#define DRM_IOCTL_RADEON_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_INFO, struct drm_radeon_gem_info) -#define DRM_IOCTL_RADEON_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_CREATE, struct drm_radeon_gem_create) -#define DRM_IOCTL_RADEON_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_MMAP, struct drm_radeon_gem_mmap) -#define DRM_IOCTL_RADEON_GEM_PREAD DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PREAD, struct drm_radeon_gem_pread) -#define DRM_IOCTL_RADEON_GEM_PWRITE DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_PWRITE, struct drm_radeon_gem_pwrite) -#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain) -#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) -#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) -#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) -#define DRM_IOCTL_RADEON_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling) -#define DRM_IOCTL_RADEON_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling) -#define DRM_IOCTL_RADEON_GEM_BUSY DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_BUSY, struct drm_radeon_gem_busy) -#define DRM_IOCTL_RADEON_GEM_VA DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_VA, struct drm_radeon_gem_va) - -typedef struct drm_radeon_init { - enum { - RADEON_INIT_CP = 0x01, - RADEON_CLEANUP_CP = 0x02, - RADEON_INIT_R200_CP = 0x03, - RADEON_INIT_R300_CP = 0x04, - RADEON_INIT_R600_CP = 0x05 - } func; - unsigned long sarea_priv_offset; - int is_pci; - int cp_mode; - int gart_size; - int ring_size; - int usec_timeout; - - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long ring_offset; - unsigned long ring_rptr_offset; - unsigned long buffers_offset; - unsigned long gart_textures_offset; -} drm_radeon_init_t; - -typedef struct drm_radeon_cp_stop { - int flush; - int idle; -} drm_radeon_cp_stop_t; - -typedef struct drm_radeon_fullscreen { - enum { - RADEON_INIT_FULLSCREEN = 0x01, - RADEON_CLEANUP_FULLSCREEN = 0x02 - } func; -} drm_radeon_fullscreen_t; - -#define CLEAR_X1 0 -#define CLEAR_Y1 1 -#define CLEAR_X2 2 -#define CLEAR_Y2 3 -#define CLEAR_DEPTH 4 - -typedef union drm_radeon_clear_rect { - float f[5]; - unsigned int ui[5]; -} drm_radeon_clear_rect_t; - -typedef struct drm_radeon_clear { - unsigned int flags; - unsigned int clear_color; - unsigned int clear_depth; - unsigned int color_mask; - unsigned int depth_mask; /* misnamed field: should be stencil */ - drm_radeon_clear_rect_t __user *depth_boxes; -} drm_radeon_clear_t; - -typedef struct drm_radeon_vertex { - int prim; - int idx; /* Index of vertex buffer */ - int count; /* Number of vertices in buffer */ - int discard; /* Client finished with buffer? */ -} drm_radeon_vertex_t; - -typedef struct drm_radeon_indices { - int prim; - int idx; - int start; - int end; - int discard; /* Client finished with buffer? */ -} drm_radeon_indices_t; - -/* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices - * - allows multiple primitives and state changes in a single ioctl - * - supports driver change to emit native primitives - */ -typedef struct drm_radeon_vertex2 { - int idx; /* Index of vertex buffer */ - int discard; /* Client finished with buffer? */ - int nr_states; - drm_radeon_state_t __user *state; - int nr_prims; - drm_radeon_prim_t __user *prim; -} drm_radeon_vertex2_t; - -/* v1.3 - obsoletes drm_radeon_vertex2 - * - allows arbitrarily large cliprect list - * - allows updating of tcl packet, vector and scalar state - * - allows memory-efficient description of state updates - * - allows state to be emitted without a primitive - * (for clears, ctx switches) - * - allows more than one dma buffer to be referenced per ioctl - * - supports tcl driver - * - may be extended in future versions with new cmd types, packets - */ -typedef struct drm_radeon_cmd_buffer { - int bufsz; - char __user *buf; - int nbox; - struct drm_clip_rect __user *boxes; -} drm_radeon_cmd_buffer_t; - -typedef struct drm_radeon_tex_image { - unsigned int x, y; /* Blit coordinates */ - unsigned int width, height; - const void __user *data; -} drm_radeon_tex_image_t; - -typedef struct drm_radeon_texture { - unsigned int offset; - int pitch; - int format; - int width; /* Texture image coordinates */ - int height; - drm_radeon_tex_image_t __user *image; -} drm_radeon_texture_t; - -typedef struct drm_radeon_stipple { - unsigned int __user *mask; -} drm_radeon_stipple_t; - -typedef struct drm_radeon_indirect { - int idx; - int start; - int end; - int discard; -} drm_radeon_indirect_t; - -/* enum for card type parameters */ -#define RADEON_CARD_PCI 0 -#define RADEON_CARD_AGP 1 -#define RADEON_CARD_PCIE 2 - -/* 1.3: An ioctl to get parameters that aren't available to the 3d - * client any other way. - */ -#define RADEON_PARAM_GART_BUFFER_OFFSET 1 /* card offset of 1st GART buffer */ -#define RADEON_PARAM_LAST_FRAME 2 -#define RADEON_PARAM_LAST_DISPATCH 3 -#define RADEON_PARAM_LAST_CLEAR 4 -/* Added with DRM version 1.6. */ -#define RADEON_PARAM_IRQ_NR 5 -#define RADEON_PARAM_GART_BASE 6 /* card offset of GART base */ -/* Added with DRM version 1.8. */ -#define RADEON_PARAM_REGISTER_HANDLE 7 /* for drmMap() */ -#define RADEON_PARAM_STATUS_HANDLE 8 -#define RADEON_PARAM_SAREA_HANDLE 9 -#define RADEON_PARAM_GART_TEX_HANDLE 10 -#define RADEON_PARAM_SCRATCH_OFFSET 11 -#define RADEON_PARAM_CARD_TYPE 12 -#define RADEON_PARAM_VBLANK_CRTC 13 /* VBLANK CRTC */ -#define RADEON_PARAM_FB_LOCATION 14 /* FB location */ -#define RADEON_PARAM_NUM_GB_PIPES 15 /* num GB pipes */ -#define RADEON_PARAM_DEVICE_ID 16 -#define RADEON_PARAM_NUM_Z_PIPES 17 /* num Z pipes */ - -typedef struct drm_radeon_getparam { - int param; - void __user *value; -} drm_radeon_getparam_t; - -/* 1.6: Set up a memory manager for regions of shared memory: - */ -#define RADEON_MEM_REGION_GART 1 -#define RADEON_MEM_REGION_FB 2 - -typedef struct drm_radeon_mem_alloc { - int region; - int alignment; - int size; - int __user *region_offset; /* offset from start of fb or GART */ -} drm_radeon_mem_alloc_t; - -typedef struct drm_radeon_mem_free { - int region; - int region_offset; -} drm_radeon_mem_free_t; - -typedef struct drm_radeon_mem_init_heap { - int region; - int size; - int start; -} drm_radeon_mem_init_heap_t; - -/* 1.6: Userspace can request & wait on irq's: - */ -typedef struct drm_radeon_irq_emit { - int __user *irq_seq; -} drm_radeon_irq_emit_t; - -typedef struct drm_radeon_irq_wait { - int irq_seq; -} drm_radeon_irq_wait_t; - -/* 1.10: Clients tell the DRM where they think the framebuffer is located in - * the card's address space, via a new generic ioctl to set parameters - */ - -typedef struct drm_radeon_setparam { - unsigned int param; - __s64 value; -} drm_radeon_setparam_t; - -#define RADEON_SETPARAM_FB_LOCATION 1 /* determined framebuffer location */ -#define RADEON_SETPARAM_SWITCH_TILING 2 /* enable/disable color tiling */ -#define RADEON_SETPARAM_PCIGART_LOCATION 3 /* PCI Gart Location */ -#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */ -#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5 /* PCI GART Table Size */ -#define RADEON_SETPARAM_VBLANK_CRTC 6 /* VBLANK CRTC */ -/* 1.14: Clients can allocate/free a surface - */ -typedef struct drm_radeon_surface_alloc { - unsigned int address; - unsigned int size; - unsigned int flags; -} drm_radeon_surface_alloc_t; - -typedef struct drm_radeon_surface_free { - unsigned int address; -} drm_radeon_surface_free_t; - -#define DRM_RADEON_VBLANK_CRTC1 1 -#define DRM_RADEON_VBLANK_CRTC2 2 - -/* - * Kernel modesetting world below. - */ -#define RADEON_GEM_DOMAIN_CPU 0x1 -#define RADEON_GEM_DOMAIN_GTT 0x2 -#define RADEON_GEM_DOMAIN_VRAM 0x4 - -struct drm_radeon_gem_info { - uint64_t gart_size; - uint64_t vram_size; - uint64_t vram_visible; -}; - -#define RADEON_GEM_NO_BACKING_STORE 1 - -struct drm_radeon_gem_create { - uint64_t size; - uint64_t alignment; - uint32_t handle; - uint32_t initial_domain; - uint32_t flags; -}; - -#define RADEON_TILING_MACRO 0x1 -#define RADEON_TILING_MICRO 0x2 -#define RADEON_TILING_SWAP_16BIT 0x4 -#define RADEON_TILING_SWAP_32BIT 0x8 -/* this object requires a surface when mapped - i.e. front buffer */ -#define RADEON_TILING_SURFACE 0x10 -#define RADEON_TILING_MICRO_SQUARE 0x20 -#define RADEON_TILING_EG_BANKW_SHIFT 8 -#define RADEON_TILING_EG_BANKW_MASK 0xf -#define RADEON_TILING_EG_BANKH_SHIFT 12 -#define RADEON_TILING_EG_BANKH_MASK 0xf -#define RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT 16 -#define RADEON_TILING_EG_MACRO_TILE_ASPECT_MASK 0xf -#define RADEON_TILING_EG_TILE_SPLIT_SHIFT 24 -#define RADEON_TILING_EG_TILE_SPLIT_MASK 0xf -#define RADEON_TILING_EG_STENCIL_TILE_SPLIT_SHIFT 28 -#define RADEON_TILING_EG_STENCIL_TILE_SPLIT_MASK 0xf - -struct drm_radeon_gem_set_tiling { - uint32_t handle; - uint32_t tiling_flags; - uint32_t pitch; -}; - -struct drm_radeon_gem_get_tiling { - uint32_t handle; - uint32_t tiling_flags; - uint32_t pitch; -}; - -struct drm_radeon_gem_mmap { - uint32_t handle; - uint32_t pad; - uint64_t offset; - uint64_t size; - uint64_t addr_ptr; -}; - -struct drm_radeon_gem_set_domain { - uint32_t handle; - uint32_t read_domains; - uint32_t write_domain; -}; - -struct drm_radeon_gem_wait_idle { - uint32_t handle; - uint32_t pad; -}; - -struct drm_radeon_gem_busy { - uint32_t handle; - uint32_t domain; -}; - -struct drm_radeon_gem_pread { - /** Handle for the object being read. */ - uint32_t handle; - uint32_t pad; - /** Offset into the object to read from */ - uint64_t offset; - /** Length of data to read */ - uint64_t size; - /** Pointer to write the data into. */ - /* void *, but pointers are not 32/64 compatible */ - uint64_t data_ptr; -}; - -struct drm_radeon_gem_pwrite { - /** Handle for the object being written to. */ - uint32_t handle; - uint32_t pad; - /** Offset into the object to write to */ - uint64_t offset; - /** Length of data to write */ - uint64_t size; - /** Pointer to read the data from. */ - /* void *, but pointers are not 32/64 compatible */ - uint64_t data_ptr; -}; - -#define RADEON_VA_MAP 1 -#define RADEON_VA_UNMAP 2 - -#define RADEON_VA_RESULT_OK 0 -#define RADEON_VA_RESULT_ERROR 1 -#define RADEON_VA_RESULT_VA_EXIST 2 - -#define RADEON_VM_PAGE_VALID (1 << 0) -#define RADEON_VM_PAGE_READABLE (1 << 1) -#define RADEON_VM_PAGE_WRITEABLE (1 << 2) -#define RADEON_VM_PAGE_SYSTEM (1 << 3) -#define RADEON_VM_PAGE_SNOOPED (1 << 4) - -struct drm_radeon_gem_va { - uint32_t handle; - uint32_t operation; - uint32_t vm_id; - uint32_t flags; - uint64_t offset; -}; - -#define RADEON_CHUNK_ID_RELOCS 0x01 -#define RADEON_CHUNK_ID_IB 0x02 -#define RADEON_CHUNK_ID_FLAGS 0x03 -#define RADEON_CHUNK_ID_CONST_IB 0x04 - -/* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */ -#define RADEON_CS_KEEP_TILING_FLAGS 0x01 -#define RADEON_CS_USE_VM 0x02 -/* The second dword of RADEON_CHUNK_ID_FLAGS is a uint32 that sets the ring type */ -#define RADEON_CS_RING_GFX 0 -#define RADEON_CS_RING_COMPUTE 1 -/* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority */ -/* 0 = normal, + = higher priority, - = lower priority */ - -struct drm_radeon_cs_chunk { - uint32_t chunk_id; - uint32_t length_dw; - uint64_t chunk_data; -}; - -/* drm_radeon_cs_reloc.flags */ -#define RADEON_RELOC_DONT_SYNC 0x01 - -struct drm_radeon_cs_reloc { - uint32_t handle; - uint32_t read_domains; - uint32_t write_domain; - uint32_t flags; -}; - -struct drm_radeon_cs { - uint32_t num_chunks; - uint32_t cs_id; - /* this points to uint64_t * which point to cs chunks */ - uint64_t chunks; - /* updates to the limits after this CS ioctl */ - uint64_t gart_limit; - uint64_t vram_limit; -}; - -#define RADEON_INFO_DEVICE_ID 0x00 -#define RADEON_INFO_NUM_GB_PIPES 0x01 -#define RADEON_INFO_NUM_Z_PIPES 0x02 -#define RADEON_INFO_ACCEL_WORKING 0x03 -#define RADEON_INFO_CRTC_FROM_ID 0x04 -#define RADEON_INFO_ACCEL_WORKING2 0x05 -#define RADEON_INFO_TILING_CONFIG 0x06 -#define RADEON_INFO_WANT_HYPERZ 0x07 -#define RADEON_INFO_WANT_CMASK 0x08 /* get access to CMASK on r300 */ -#define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */ -#define RADEON_INFO_NUM_BACKENDS 0x0a /* DB/backends for r600+ - need for OQ */ -#define RADEON_INFO_NUM_TILE_PIPES 0x0b /* tile pipes for r600+ */ -#define RADEON_INFO_FUSION_GART_WORKING 0x0c /* fusion writes to GTT were broken before this */ -#define RADEON_INFO_BACKEND_MAP 0x0d /* pipe to backend map, needed by mesa */ -/* virtual address start, va < start are reserved by the kernel */ -#define RADEON_INFO_VA_START 0x0e -/* maximum size of ib using the virtual memory cs */ -#define RADEON_INFO_IB_VM_MAX_SIZE 0x0f -/* max pipes - needed for compute shaders */ -#define RADEON_INFO_MAX_PIPES 0x10 - -struct drm_radeon_info { - uint32_t request; - uint32_t pad; - uint64_t value; -}; - -#endif diff --git a/ANDROID_3.4.5/include/drm/savage_drm.h b/ANDROID_3.4.5/include/drm/savage_drm.h deleted file mode 100644 index 818d49be..00000000 --- a/ANDROID_3.4.5/include/drm/savage_drm.h +++ /dev/null @@ -1,210 +0,0 @@ -/* savage_drm.h -- Public header for the savage driver - * - * Copyright 2004 Felix Kuehling - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF - * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - */ - -#ifndef __SAVAGE_DRM_H__ -#define __SAVAGE_DRM_H__ - -#ifndef __SAVAGE_SAREA_DEFINES__ -#define __SAVAGE_SAREA_DEFINES__ - -/* 2 heaps (1 for card, 1 for agp), each divided into up to 128 - * regions, subject to a minimum region size of (1<<16) == 64k. - * - * Clients may subdivide regions internally, but when sharing between - * clients, the region size is the minimum granularity. - */ - -#define SAVAGE_CARD_HEAP 0 -#define SAVAGE_AGP_HEAP 1 -#define SAVAGE_NR_TEX_HEAPS 2 -#define SAVAGE_NR_TEX_REGIONS 16 -#define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 - -#endif /* __SAVAGE_SAREA_DEFINES__ */ - -typedef struct _drm_savage_sarea { - /* LRU lists for texture memory in agp space and on the card. - */ - struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS + - 1]; - unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; - - /* Mechanism to validate card state. - */ - int ctxOwner; -} drm_savage_sarea_t, *drm_savage_sarea_ptr; - -/* Savage-specific ioctls - */ -#define DRM_SAVAGE_BCI_INIT 0x00 -#define DRM_SAVAGE_BCI_CMDBUF 0x01 -#define DRM_SAVAGE_BCI_EVENT_EMIT 0x02 -#define DRM_SAVAGE_BCI_EVENT_WAIT 0x03 - -#define DRM_IOCTL_SAVAGE_BCI_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t) -#define DRM_IOCTL_SAVAGE_BCI_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t) -#define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t) -#define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t) - -#define SAVAGE_DMA_PCI 1 -#define SAVAGE_DMA_AGP 3 -typedef struct drm_savage_init { - enum { - SAVAGE_INIT_BCI = 1, - SAVAGE_CLEANUP_BCI = 2 - } func; - unsigned int sarea_priv_offset; - - /* some parameters */ - unsigned int cob_size; - unsigned int bci_threshold_lo, bci_threshold_hi; - unsigned int dma_type; - - /* frame buffer layout */ - unsigned int fb_bpp; - unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; - unsigned int depth_bpp; - unsigned int depth_offset, depth_pitch; - - /* local textures */ - unsigned int texture_offset; - unsigned int texture_size; - - /* physical locations of non-permanent maps */ - unsigned long status_offset; - unsigned long buffers_offset; - unsigned long agp_textures_offset; - unsigned long cmd_dma_offset; -} drm_savage_init_t; - -typedef union drm_savage_cmd_header drm_savage_cmd_header_t; -typedef struct drm_savage_cmdbuf { - /* command buffer in client's address space */ - drm_savage_cmd_header_t __user *cmd_addr; - unsigned int size; /* size of the command buffer in 64bit units */ - - unsigned int dma_idx; /* DMA buffer index to use */ - int discard; /* discard DMA buffer when done */ - /* vertex buffer in client's address space */ - unsigned int __user *vb_addr; - unsigned int vb_size; /* size of client vertex buffer in bytes */ - unsigned int vb_stride; /* stride of vertices in 32bit words */ - /* boxes in client's address space */ - struct drm_clip_rect __user *box_addr; - unsigned int nbox; /* number of clipping boxes */ -} drm_savage_cmdbuf_t; - -#define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */ -#define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */ -#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */ -typedef struct drm_savage_event { - unsigned int count; - unsigned int flags; -} drm_savage_event_emit_t, drm_savage_event_wait_t; - -/* Commands for the cmdbuf ioctl - */ -#define SAVAGE_CMD_STATE 0 /* a range of state registers */ -#define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */ -#define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */ -#define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */ -#define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */ -#define SAVAGE_CMD_CLEAR 5 /* clear buffers */ -#define SAVAGE_CMD_SWAP 6 /* swap buffers */ - -/* Primitive types -*/ -#define SAVAGE_PRIM_TRILIST 0 /* triangle list */ -#define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */ -#define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */ -#define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat - * shading on s3d */ - -/* Skip flags (vertex format) - */ -#define SAVAGE_SKIP_Z 0x01 -#define SAVAGE_SKIP_W 0x02 -#define SAVAGE_SKIP_C0 0x04 -#define SAVAGE_SKIP_C1 0x08 -#define SAVAGE_SKIP_S0 0x10 -#define SAVAGE_SKIP_T0 0x20 -#define SAVAGE_SKIP_ST0 0x30 -#define SAVAGE_SKIP_S1 0x40 -#define SAVAGE_SKIP_T1 0x80 -#define SAVAGE_SKIP_ST1 0xc0 -#define SAVAGE_SKIP_ALL_S3D 0x3f -#define SAVAGE_SKIP_ALL_S4 0xff - -/* Buffer names for clear command - */ -#define SAVAGE_FRONT 0x1 -#define SAVAGE_BACK 0x2 -#define SAVAGE_DEPTH 0x4 - -/* 64-bit command header - */ -union drm_savage_cmd_header { - struct { - unsigned char cmd; /* command */ - unsigned char pad0; - unsigned short pad1; - unsigned short pad2; - unsigned short pad3; - } cmd; /* generic */ - struct { - unsigned char cmd; - unsigned char global; /* need idle engine? */ - unsigned short count; /* number of consecutive registers */ - unsigned short start; /* first register */ - unsigned short pad3; - } state; /* SAVAGE_CMD_STATE */ - struct { - unsigned char cmd; - unsigned char prim; /* primitive type */ - unsigned short skip; /* vertex format (skip flags) */ - unsigned short count; /* number of vertices */ - unsigned short start; /* first vertex in DMA/vertex buffer */ - } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */ - struct { - unsigned char cmd; - unsigned char prim; - unsigned short skip; - unsigned short count; /* number of indices that follow */ - unsigned short pad3; - } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */ - struct { - unsigned char cmd; - unsigned char pad0; - unsigned short pad1; - unsigned int flags; - } clear0; /* SAVAGE_CMD_CLEAR */ - struct { - unsigned int mask; - unsigned int value; - } clear1; /* SAVAGE_CMD_CLEAR data */ -}; - -#endif diff --git a/ANDROID_3.4.5/include/drm/sis_drm.h b/ANDROID_3.4.5/include/drm/sis_drm.h deleted file mode 100644 index 035b804d..00000000 --- a/ANDROID_3.4.5/include/drm/sis_drm.h +++ /dev/null @@ -1,71 +0,0 @@ -/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */ -/* - * Copyright 2005 Eric Anholt - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - */ - -#ifndef __SIS_DRM_H__ -#define __SIS_DRM_H__ - -/* SiS specific ioctls */ -#define NOT_USED_0_3 -#define DRM_SIS_FB_ALLOC 0x04 -#define DRM_SIS_FB_FREE 0x05 -#define NOT_USED_6_12 -#define DRM_SIS_AGP_INIT 0x13 -#define DRM_SIS_AGP_ALLOC 0x14 -#define DRM_SIS_AGP_FREE 0x15 -#define DRM_SIS_FB_INIT 0x16 - -#define DRM_IOCTL_SIS_FB_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_FB_ALLOC, drm_sis_mem_t) -#define DRM_IOCTL_SIS_FB_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_FREE, drm_sis_mem_t) -#define DRM_IOCTL_SIS_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_INIT, drm_sis_agp_t) -#define DRM_IOCTL_SIS_AGP_ALLOC DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_ALLOC, drm_sis_mem_t) -#define DRM_IOCTL_SIS_AGP_FREE DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_AGP_FREE, drm_sis_mem_t) -#define DRM_IOCTL_SIS_FB_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_INIT, drm_sis_fb_t) -/* -#define DRM_IOCTL_SIS_FLIP DRM_IOW( 0x48, drm_sis_flip_t) -#define DRM_IOCTL_SIS_FLIP_INIT DRM_IO( 0x49) -#define DRM_IOCTL_SIS_FLIP_FINAL DRM_IO( 0x50) -*/ - -typedef struct { - int context; - unsigned int offset; - unsigned int size; - unsigned long free; -} drm_sis_mem_t; - -typedef struct { - unsigned int offset, size; -} drm_sis_agp_t; - -typedef struct { - unsigned int offset, size; -} drm_sis_fb_t; - -struct sis_file_private { - struct list_head obj_list; -}; - -#endif /* __SIS_DRM_H__ */ diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_bo_api.h b/ANDROID_3.4.5/include/drm/ttm/ttm_bo_api.h deleted file mode 100644 index 974c8f80..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_bo_api.h +++ /dev/null @@ -1,732 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ - -#ifndef _TTM_BO_API_H_ -#define _TTM_BO_API_H_ - -#include "drm_hashtab.h" -#include <linux/kref.h> -#include <linux/list.h> -#include <linux/wait.h> -#include <linux/mutex.h> -#include <linux/mm.h> -#include <linux/rbtree.h> -#include <linux/bitmap.h> - -struct ttm_bo_device; - -struct drm_mm_node; - - -/** - * struct ttm_placement - * - * @fpfn: first valid page frame number to put the object - * @lpfn: last valid page frame number to put the object - * @num_placement: number of preferred placements - * @placement: preferred placements - * @num_busy_placement: number of preferred placements when need to evict buffer - * @busy_placement: preferred placements when need to evict buffer - * - * Structure indicating the placement you request for an object. - */ -struct ttm_placement { - unsigned fpfn; - unsigned lpfn; - unsigned num_placement; - const uint32_t *placement; - unsigned num_busy_placement; - const uint32_t *busy_placement; -}; - -/** - * struct ttm_bus_placement - * - * @addr: mapped virtual address - * @base: bus base address - * @is_iomem: is this io memory ? - * @size: size in byte - * @offset: offset from the base address - * @io_reserved_vm: The VM system has a refcount in @io_reserved_count - * @io_reserved_count: Refcounting the numbers of callers to ttm_mem_io_reserve - * - * Structure indicating the bus placement of an object. - */ -struct ttm_bus_placement { - void *addr; - unsigned long base; - unsigned long size; - unsigned long offset; - bool is_iomem; - bool io_reserved_vm; - uint64_t io_reserved_count; -}; - - -/** - * struct ttm_mem_reg - * - * @mm_node: Memory manager node. - * @size: Requested size of memory region. - * @num_pages: Actual size of memory region in pages. - * @page_alignment: Page alignment. - * @placement: Placement flags. - * @bus: Placement on io bus accessible to the CPU - * - * Structure indicating the placement and space resources used by a - * buffer object. - */ - -struct ttm_mem_reg { - void *mm_node; - unsigned long start; - unsigned long size; - unsigned long num_pages; - uint32_t page_alignment; - uint32_t mem_type; - uint32_t placement; - struct ttm_bus_placement bus; -}; - -/** - * enum ttm_bo_type - * - * @ttm_bo_type_device: These are 'normal' buffers that can - * be mmapped by user space. Each of these bos occupy a slot in the - * device address space, that can be used for normal vm operations. - * - * @ttm_bo_type_kernel: These buffers are like ttm_bo_type_device buffers, - * but they cannot be accessed from user-space. For kernel-only use. - */ - -enum ttm_bo_type { - ttm_bo_type_device, - ttm_bo_type_kernel -}; - -struct ttm_tt; - -/** - * struct ttm_buffer_object - * - * @bdev: Pointer to the buffer object device structure. - * @buffer_start: The virtual user-space start address of ttm_bo_type_user - * buffers. - * @type: The bo type. - * @destroy: Destruction function. If NULL, kfree is used. - * @num_pages: Actual number of pages. - * @addr_space_offset: Address space offset. - * @acc_size: Accounted size for this object. - * @kref: Reference count of this buffer object. When this refcount reaches - * zero, the object is put on the delayed delete list. - * @list_kref: List reference count of this buffer object. This member is - * used to avoid destruction while the buffer object is still on a list. - * Lru lists may keep one refcount, the delayed delete list, and kref != 0 - * keeps one refcount. When this refcount reaches zero, - * the object is destroyed. - * @event_queue: Queue for processes waiting on buffer object status change. - * @mem: structure describing current placement. - * @persistent_swap_storage: Usually the swap storage is deleted for buffers - * pinned in physical memory. If this behaviour is not desired, this member - * holds a pointer to a persistent shmem object. - * @ttm: TTM structure holding system pages. - * @evicted: Whether the object was evicted without user-space knowing. - * @cpu_writes: For synchronization. Number of cpu writers. - * @lru: List head for the lru list. - * @ddestroy: List head for the delayed destroy list. - * @swap: List head for swap LRU list. - * @val_seq: Sequence of the validation holding the @reserved lock. - * Used to avoid starvation when many processes compete to validate the - * buffer. This member is protected by the bo_device::lru_lock. - * @seq_valid: The value of @val_seq is valid. This value is protected by - * the bo_device::lru_lock. - * @reserved: Deadlock-free lock used for synchronization state transitions. - * @sync_obj_arg: Opaque argument to synchronization object function. - * @sync_obj: Pointer to a synchronization object. - * @priv_flags: Flags describing buffer object internal state. - * @vm_rb: Rb node for the vm rb tree. - * @vm_node: Address space manager node. - * @offset: The current GPU offset, which can have different meanings - * depending on the memory type. For SYSTEM type memory, it should be 0. - * @cur_placement: Hint of current placement. - * - * Base class for TTM buffer object, that deals with data placement and CPU - * mappings. GPU mappings are really up to the driver, but for simpler GPUs - * the driver can usually use the placement offset @offset directly as the - * GPU virtual address. For drivers implementing multiple - * GPU memory manager contexts, the driver should manage the address space - * in these contexts separately and use these objects to get the correct - * placement and caching for these GPU maps. This makes it possible to use - * these objects for even quite elaborate memory management schemes. - * The destroy member, the API visibility of this object makes it possible - * to derive driver specific types. - */ - -struct ttm_buffer_object { - /** - * Members constant at init. - */ - - struct ttm_bo_global *glob; - struct ttm_bo_device *bdev; - unsigned long buffer_start; - enum ttm_bo_type type; - void (*destroy) (struct ttm_buffer_object *); - unsigned long num_pages; - uint64_t addr_space_offset; - size_t acc_size; - - /** - * Members not needing protection. - */ - - struct kref kref; - struct kref list_kref; - wait_queue_head_t event_queue; - - /** - * Members protected by the bo::reserved lock. - */ - - struct ttm_mem_reg mem; - struct file *persistent_swap_storage; - struct ttm_tt *ttm; - bool evicted; - - /** - * Members protected by the bo::reserved lock only when written to. - */ - - atomic_t cpu_writers; - - /** - * Members protected by the bdev::lru_lock. - */ - - struct list_head lru; - struct list_head ddestroy; - struct list_head swap; - struct list_head io_reserve_lru; - uint32_t val_seq; - bool seq_valid; - - /** - * Members protected by the bdev::lru_lock - * only when written to. - */ - - atomic_t reserved; - - /** - * Members protected by struct buffer_object_device::fence_lock - * In addition, setting sync_obj to anything else - * than NULL requires bo::reserved to be held. This allows for - * checking NULL while reserved but not holding the mentioned lock. - */ - - void *sync_obj_arg; - void *sync_obj; - unsigned long priv_flags; - - /** - * Members protected by the bdev::vm_lock - */ - - struct rb_node vm_rb; - struct drm_mm_node *vm_node; - - - /** - * Special members that are protected by the reserve lock - * and the bo::lock when written to. Can be read with - * either of these locks held. - */ - - unsigned long offset; - uint32_t cur_placement; -}; - -/** - * struct ttm_bo_kmap_obj - * - * @virtual: The current kernel virtual address. - * @page: The page when kmap'ing a single page. - * @bo_kmap_type: Type of bo_kmap. - * - * Object describing a kernel mapping. Since a TTM bo may be located - * in various memory types with various caching policies, the - * mapping can either be an ioremap, a vmap, a kmap or part of a - * premapped region. - */ - -#define TTM_BO_MAP_IOMEM_MASK 0x80 -struct ttm_bo_kmap_obj { - void *virtual; - struct page *page; - enum { - ttm_bo_map_iomap = 1 | TTM_BO_MAP_IOMEM_MASK, - ttm_bo_map_vmap = 2, - ttm_bo_map_kmap = 3, - ttm_bo_map_premapped = 4 | TTM_BO_MAP_IOMEM_MASK, - } bo_kmap_type; - struct ttm_buffer_object *bo; -}; - -/** - * ttm_bo_reference - reference a struct ttm_buffer_object - * - * @bo: The buffer object. - * - * Returns a refcounted pointer to a buffer object. - */ - -static inline struct ttm_buffer_object * -ttm_bo_reference(struct ttm_buffer_object *bo) -{ - kref_get(&bo->kref); - return bo; -} - -/** - * ttm_bo_wait - wait for buffer idle. - * - * @bo: The buffer object. - * @interruptible: Use interruptible wait. - * @no_wait: Return immediately if buffer is busy. - * - * This function must be called with the bo::mutex held, and makes - * sure any previous rendering to the buffer is completed. - * Note: It might be necessary to block validations before the - * wait by reserving the buffer. - * Returns -EBUSY if no_wait is true and the buffer is busy. - * Returns -ERESTARTSYS if interrupted by a signal. - */ -extern int ttm_bo_wait(struct ttm_buffer_object *bo, bool lazy, - bool interruptible, bool no_wait); -/** - * ttm_bo_validate - * - * @bo: The buffer object. - * @placement: Proposed placement for the buffer object. - * @interruptible: Sleep interruptible if sleeping. - * @no_wait_reserve: Return immediately if other buffers are busy. - * @no_wait_gpu: Return immediately if the GPU is busy. - * - * Changes placement and caching policy of the buffer object - * according proposed placement. - * Returns - * -EINVAL on invalid proposed placement. - * -ENOMEM on out-of-memory condition. - * -EBUSY if no_wait is true and buffer busy. - * -ERESTARTSYS if interrupted by a signal. - */ -extern int ttm_bo_validate(struct ttm_buffer_object *bo, - struct ttm_placement *placement, - bool interruptible, bool no_wait_reserve, - bool no_wait_gpu); - -/** - * ttm_bo_unref - * - * @bo: The buffer object. - * - * Unreference and clear a pointer to a buffer object. - */ -extern void ttm_bo_unref(struct ttm_buffer_object **bo); - - -/** - * ttm_bo_list_ref_sub - * - * @bo: The buffer object. - * @count: The number of references with which to decrease @bo::list_kref; - * @never_free: The refcount should not reach zero with this operation. - * - * Release @count lru list references to this buffer object. - */ -extern void ttm_bo_list_ref_sub(struct ttm_buffer_object *bo, int count, - bool never_free); - -/** - * ttm_bo_add_to_lru - * - * @bo: The buffer object. - * - * Add this bo to the relevant mem type lru and, if it's backed by - * system pages (ttms) to the swap list. - * This function must be called with struct ttm_bo_global::lru_lock held, and - * is typically called immediately prior to unreserving a bo. - */ -extern void ttm_bo_add_to_lru(struct ttm_buffer_object *bo); - -/** - * ttm_bo_del_from_lru - * - * @bo: The buffer object. - * - * Remove this bo from all lru lists used to lookup and reserve an object. - * This function must be called with struct ttm_bo_global::lru_lock held, - * and is usually called just immediately after the bo has been reserved to - * avoid recursive reservation from lru lists. - */ -extern int ttm_bo_del_from_lru(struct ttm_buffer_object *bo); - - -/** - * ttm_bo_lock_delayed_workqueue - * - * Prevent the delayed workqueue from running. - * Returns - * True if the workqueue was queued at the time - */ -extern int ttm_bo_lock_delayed_workqueue(struct ttm_bo_device *bdev); - -/** - * ttm_bo_unlock_delayed_workqueue - * - * Allows the delayed workqueue to run. - */ -extern void ttm_bo_unlock_delayed_workqueue(struct ttm_bo_device *bdev, - int resched); - -/** - * ttm_bo_synccpu_write_grab - * - * @bo: The buffer object: - * @no_wait: Return immediately if buffer is busy. - * - * Synchronizes a buffer object for CPU RW access. This means - * blocking command submission that affects the buffer and - * waiting for buffer idle. This lock is recursive. - * Returns - * -EBUSY if the buffer is busy and no_wait is true. - * -ERESTARTSYS if interrupted by a signal. - */ -extern int -ttm_bo_synccpu_write_grab(struct ttm_buffer_object *bo, bool no_wait); - -/** - * ttm_bo_synccpu_write_release: - * - * @bo : The buffer object. - * - * Releases a synccpu lock. - */ -extern void ttm_bo_synccpu_write_release(struct ttm_buffer_object *bo); - -/** - * ttm_bo_acc_size - * - * @bdev: Pointer to a ttm_bo_device struct. - * @bo_size: size of the buffer object in byte. - * @struct_size: size of the structure holding buffer object datas - * - * Returns size to account for a buffer object - */ -size_t ttm_bo_acc_size(struct ttm_bo_device *bdev, - unsigned long bo_size, - unsigned struct_size); -size_t ttm_bo_dma_acc_size(struct ttm_bo_device *bdev, - unsigned long bo_size, - unsigned struct_size); - -/** - * ttm_bo_init - * - * @bdev: Pointer to a ttm_bo_device struct. - * @bo: Pointer to a ttm_buffer_object to be initialized. - * @size: Requested size of buffer object. - * @type: Requested type of buffer object. - * @flags: Initial placement flags. - * @page_alignment: Data alignment in pages. - * @buffer_start: Virtual address of user space data backing a - * user buffer object. - * @interruptible: If needing to sleep to wait for GPU resources, - * sleep interruptible. - * @persistent_swap_storage: Usually the swap storage is deleted for buffers - * pinned in physical memory. If this behaviour is not desired, this member - * holds a pointer to a persistent shmem object. Typically, this would - * point to the shmem object backing a GEM object if TTM is used to back a - * GEM user interface. - * @acc_size: Accounted size for this object. - * @destroy: Destroy function. Use NULL for kfree(). - * - * This function initializes a pre-allocated struct ttm_buffer_object. - * As this object may be part of a larger structure, this function, - * together with the @destroy function, - * enables driver-specific objects derived from a ttm_buffer_object. - * On successful return, the object kref and list_kref are set to 1. - * If a failure occurs, the function will call the @destroy function, or - * kfree() if @destroy is NULL. Thus, after a failure, dereferencing @bo is - * illegal and will likely cause memory corruption. - * - * Returns - * -ENOMEM: Out of memory. - * -EINVAL: Invalid placement flags. - * -ERESTARTSYS: Interrupted by signal while sleeping waiting for resources. - */ - -extern int ttm_bo_init(struct ttm_bo_device *bdev, - struct ttm_buffer_object *bo, - unsigned long size, - enum ttm_bo_type type, - struct ttm_placement *placement, - uint32_t page_alignment, - unsigned long buffer_start, - bool interrubtible, - struct file *persistent_swap_storage, - size_t acc_size, - void (*destroy) (struct ttm_buffer_object *)); - -/** - * ttm_bo_synccpu_object_init - * - * @bdev: Pointer to a ttm_bo_device struct. - * @bo: Pointer to a ttm_buffer_object to be initialized. - * @size: Requested size of buffer object. - * @type: Requested type of buffer object. - * @flags: Initial placement flags. - * @page_alignment: Data alignment in pages. - * @buffer_start: Virtual address of user space data backing a - * user buffer object. - * @interruptible: If needing to sleep while waiting for GPU resources, - * sleep interruptible. - * @persistent_swap_storage: Usually the swap storage is deleted for buffers - * pinned in physical memory. If this behaviour is not desired, this member - * holds a pointer to a persistent shmem object. Typically, this would - * point to the shmem object backing a GEM object if TTM is used to back a - * GEM user interface. - * @p_bo: On successful completion *p_bo points to the created object. - * - * This function allocates a ttm_buffer_object, and then calls ttm_bo_init - * on that object. The destroy function is set to kfree(). - * Returns - * -ENOMEM: Out of memory. - * -EINVAL: Invalid placement flags. - * -ERESTARTSYS: Interrupted by signal while waiting for resources. - */ - -extern int ttm_bo_create(struct ttm_bo_device *bdev, - unsigned long size, - enum ttm_bo_type type, - struct ttm_placement *placement, - uint32_t page_alignment, - unsigned long buffer_start, - bool interruptible, - struct file *persistent_swap_storage, - struct ttm_buffer_object **p_bo); - -/** - * ttm_bo_check_placement - * - * @bo: the buffer object. - * @placement: placements - * - * Performs minimal validity checking on an intended change of - * placement flags. - * Returns - * -EINVAL: Intended change is invalid or not allowed. - */ -extern int ttm_bo_check_placement(struct ttm_buffer_object *bo, - struct ttm_placement *placement); - -/** - * ttm_bo_init_mm - * - * @bdev: Pointer to a ttm_bo_device struct. - * @mem_type: The memory type. - * @p_size: size managed area in pages. - * - * Initialize a manager for a given memory type. - * Note: if part of driver firstopen, it must be protected from a - * potentially racing lastclose. - * Returns: - * -EINVAL: invalid size or memory type. - * -ENOMEM: Not enough memory. - * May also return driver-specified errors. - */ - -extern int ttm_bo_init_mm(struct ttm_bo_device *bdev, unsigned type, - unsigned long p_size); -/** - * ttm_bo_clean_mm - * - * @bdev: Pointer to a ttm_bo_device struct. - * @mem_type: The memory type. - * - * Take down a manager for a given memory type after first walking - * the LRU list to evict any buffers left alive. - * - * Normally, this function is part of lastclose() or unload(), and at that - * point there shouldn't be any buffers left created by user-space, since - * there should've been removed by the file descriptor release() method. - * However, before this function is run, make sure to signal all sync objects, - * and verify that the delayed delete queue is empty. The driver must also - * make sure that there are no NO_EVICT buffers present in this memory type - * when the call is made. - * - * If this function is part of a VT switch, the caller must make sure that - * there are no appications currently validating buffers before this - * function is called. The caller can do that by first taking the - * struct ttm_bo_device::ttm_lock in write mode. - * - * Returns: - * -EINVAL: invalid or uninitialized memory type. - * -EBUSY: There are still buffers left in this memory type. - */ - -extern int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type); - -/** - * ttm_bo_evict_mm - * - * @bdev: Pointer to a ttm_bo_device struct. - * @mem_type: The memory type. - * - * Evicts all buffers on the lru list of the memory type. - * This is normally part of a VT switch or an - * out-of-memory-space-due-to-fragmentation handler. - * The caller must make sure that there are no other processes - * currently validating buffers, and can do that by taking the - * struct ttm_bo_device::ttm_lock in write mode. - * - * Returns: - * -EINVAL: Invalid or uninitialized memory type. - * -ERESTARTSYS: The call was interrupted by a signal while waiting to - * evict a buffer. - */ - -extern int ttm_bo_evict_mm(struct ttm_bo_device *bdev, unsigned mem_type); - -/** - * ttm_kmap_obj_virtual - * - * @map: A struct ttm_bo_kmap_obj returned from ttm_bo_kmap. - * @is_iomem: Pointer to an integer that on return indicates 1 if the - * virtual map is io memory, 0 if normal memory. - * - * Returns the virtual address of a buffer object area mapped by ttm_bo_kmap. - * If *is_iomem is 1 on return, the virtual address points to an io memory area, - * that should strictly be accessed by the iowriteXX() and similar functions. - */ - -static inline void *ttm_kmap_obj_virtual(struct ttm_bo_kmap_obj *map, - bool *is_iomem) -{ - *is_iomem = !!(map->bo_kmap_type & TTM_BO_MAP_IOMEM_MASK); - return map->virtual; -} - -/** - * ttm_bo_kmap - * - * @bo: The buffer object. - * @start_page: The first page to map. - * @num_pages: Number of pages to map. - * @map: pointer to a struct ttm_bo_kmap_obj representing the map. - * - * Sets up a kernel virtual mapping, using ioremap, vmap or kmap to the - * data in the buffer object. The ttm_kmap_obj_virtual function can then be - * used to obtain a virtual address to the data. - * - * Returns - * -ENOMEM: Out of memory. - * -EINVAL: Invalid range. - */ - -extern int ttm_bo_kmap(struct ttm_buffer_object *bo, unsigned long start_page, - unsigned long num_pages, struct ttm_bo_kmap_obj *map); - -/** - * ttm_bo_kunmap - * - * @map: Object describing the map to unmap. - * - * Unmaps a kernel map set up by ttm_bo_kmap. - */ - -extern void ttm_bo_kunmap(struct ttm_bo_kmap_obj *map); - -/** - * ttm_fbdev_mmap - mmap fbdev memory backed by a ttm buffer object. - * - * @vma: vma as input from the fbdev mmap method. - * @bo: The bo backing the address space. The address space will - * have the same size as the bo, and start at offset 0. - * - * This function is intended to be called by the fbdev mmap method - * if the fbdev address space is to be backed by a bo. - */ - -extern int ttm_fbdev_mmap(struct vm_area_struct *vma, - struct ttm_buffer_object *bo); - -/** - * ttm_bo_mmap - mmap out of the ttm device address space. - * - * @filp: filp as input from the mmap method. - * @vma: vma as input from the mmap method. - * @bdev: Pointer to the ttm_bo_device with the address space manager. - * - * This function is intended to be called by the device mmap method. - * if the device address space is to be backed by the bo manager. - */ - -extern int ttm_bo_mmap(struct file *filp, struct vm_area_struct *vma, - struct ttm_bo_device *bdev); - -/** - * ttm_bo_io - * - * @bdev: Pointer to the struct ttm_bo_device. - * @filp: Pointer to the struct file attempting to read / write. - * @wbuf: User-space pointer to address of buffer to write. NULL on read. - * @rbuf: User-space pointer to address of buffer to read into. - * Null on write. - * @count: Number of bytes to read / write. - * @f_pos: Pointer to current file position. - * @write: 1 for read, 0 for write. - * - * This function implements read / write into ttm buffer objects, and is - * intended to - * be called from the fops::read and fops::write method. - * Returns: - * See man (2) write, man(2) read. In particular, - * the function may return -ERESTARTSYS if - * interrupted by a signal. - */ - -extern ssize_t ttm_bo_io(struct ttm_bo_device *bdev, struct file *filp, - const char __user *wbuf, char __user *rbuf, - size_t count, loff_t *f_pos, bool write); - -extern void ttm_bo_swapout_all(struct ttm_bo_device *bdev); - -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_bo_driver.h b/ANDROID_3.4.5/include/drm/ttm/ttm_bo_driver.h deleted file mode 100644 index d43e8923..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_bo_driver.h +++ /dev/null @@ -1,1037 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2006-2009 Vmware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ -#ifndef _TTM_BO_DRIVER_H_ -#define _TTM_BO_DRIVER_H_ - -#include "ttm/ttm_bo_api.h" -#include "ttm/ttm_memory.h" -#include "ttm/ttm_module.h" -#include "drm_mm.h" -#include "drm_global.h" -#include "linux/workqueue.h" -#include "linux/fs.h" -#include "linux/spinlock.h" - -struct ttm_backend; - -struct ttm_backend_func { - /** - * struct ttm_backend_func member bind - * - * @ttm: Pointer to a struct ttm_tt. - * @bo_mem: Pointer to a struct ttm_mem_reg describing the - * memory type and location for binding. - * - * Bind the backend pages into the aperture in the location - * indicated by @bo_mem. This function should be able to handle - * differences between aperture and system page sizes. - */ - int (*bind) (struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem); - - /** - * struct ttm_backend_func member unbind - * - * @ttm: Pointer to a struct ttm_tt. - * - * Unbind previously bound backend pages. This function should be - * able to handle differences between aperture and system page sizes. - */ - int (*unbind) (struct ttm_tt *ttm); - - /** - * struct ttm_backend_func member destroy - * - * @ttm: Pointer to a struct ttm_tt. - * - * Destroy the backend. This will be call back from ttm_tt_destroy so - * don't call ttm_tt_destroy from the callback or infinite loop. - */ - void (*destroy) (struct ttm_tt *ttm); -}; - -#define TTM_PAGE_FLAG_WRITE (1 << 3) -#define TTM_PAGE_FLAG_SWAPPED (1 << 4) -#define TTM_PAGE_FLAG_PERSISTENT_SWAP (1 << 5) -#define TTM_PAGE_FLAG_ZERO_ALLOC (1 << 6) -#define TTM_PAGE_FLAG_DMA32 (1 << 7) - -enum ttm_caching_state { - tt_uncached, - tt_wc, - tt_cached -}; - -/** - * struct ttm_tt - * - * @bdev: Pointer to a struct ttm_bo_device. - * @func: Pointer to a struct ttm_backend_func that describes - * the backend methods. - * @dummy_read_page: Page to map where the ttm_tt page array contains a NULL - * pointer. - * @pages: Array of pages backing the data. - * @num_pages: Number of pages in the page array. - * @bdev: Pointer to the current struct ttm_bo_device. - * @be: Pointer to the ttm backend. - * @swap_storage: Pointer to shmem struct file for swap storage. - * @caching_state: The current caching state of the pages. - * @state: The current binding state of the pages. - * - * This is a structure holding the pages, caching- and aperture binding - * status for a buffer object that isn't backed by fixed (VRAM / AGP) - * memory. - */ - -struct ttm_tt { - struct ttm_bo_device *bdev; - struct ttm_backend_func *func; - struct page *dummy_read_page; - struct page **pages; - uint32_t page_flags; - unsigned long num_pages; - struct ttm_bo_global *glob; - struct ttm_backend *be; - struct file *swap_storage; - enum ttm_caching_state caching_state; - enum { - tt_bound, - tt_unbound, - tt_unpopulated, - } state; -}; - -/** - * struct ttm_dma_tt - * - * @ttm: Base ttm_tt struct. - * @dma_address: The DMA (bus) addresses of the pages - * @pages_list: used by some page allocation backend - * - * This is a structure holding the pages, caching- and aperture binding - * status for a buffer object that isn't backed by fixed (VRAM / AGP) - * memory. - */ -struct ttm_dma_tt { - struct ttm_tt ttm; - dma_addr_t *dma_address; - struct list_head pages_list; -}; - -#define TTM_MEMTYPE_FLAG_FIXED (1 << 0) /* Fixed (on-card) PCI memory */ -#define TTM_MEMTYPE_FLAG_MAPPABLE (1 << 1) /* Memory mappable */ -#define TTM_MEMTYPE_FLAG_CMA (1 << 3) /* Can't map aperture */ - -struct ttm_mem_type_manager; - -struct ttm_mem_type_manager_func { - /** - * struct ttm_mem_type_manager member init - * - * @man: Pointer to a memory type manager. - * @p_size: Implementation dependent, but typically the size of the - * range to be managed in pages. - * - * Called to initialize a private range manager. The function is - * expected to initialize the man::priv member. - * Returns 0 on success, negative error code on failure. - */ - int (*init)(struct ttm_mem_type_manager *man, unsigned long p_size); - - /** - * struct ttm_mem_type_manager member takedown - * - * @man: Pointer to a memory type manager. - * - * Called to undo the setup done in init. All allocated resources - * should be freed. - */ - int (*takedown)(struct ttm_mem_type_manager *man); - - /** - * struct ttm_mem_type_manager member get_node - * - * @man: Pointer to a memory type manager. - * @bo: Pointer to the buffer object we're allocating space for. - * @placement: Placement details. - * @mem: Pointer to a struct ttm_mem_reg to be filled in. - * - * This function should allocate space in the memory type managed - * by @man. Placement details if - * applicable are given by @placement. If successful, - * @mem::mm_node should be set to a non-null value, and - * @mem::start should be set to a value identifying the beginning - * of the range allocated, and the function should return zero. - * If the memory region accommodate the buffer object, @mem::mm_node - * should be set to NULL, and the function should return 0. - * If a system error occurred, preventing the request to be fulfilled, - * the function should return a negative error code. - * - * Note that @mem::mm_node will only be dereferenced by - * struct ttm_mem_type_manager functions and optionally by the driver, - * which has knowledge of the underlying type. - * - * This function may not be called from within atomic context, so - * an implementation can and must use either a mutex or a spinlock to - * protect any data structures managing the space. - */ - int (*get_node)(struct ttm_mem_type_manager *man, - struct ttm_buffer_object *bo, - struct ttm_placement *placement, - struct ttm_mem_reg *mem); - - /** - * struct ttm_mem_type_manager member put_node - * - * @man: Pointer to a memory type manager. - * @mem: Pointer to a struct ttm_mem_reg to be filled in. - * - * This function frees memory type resources previously allocated - * and that are identified by @mem::mm_node and @mem::start. May not - * be called from within atomic context. - */ - void (*put_node)(struct ttm_mem_type_manager *man, - struct ttm_mem_reg *mem); - - /** - * struct ttm_mem_type_manager member debug - * - * @man: Pointer to a memory type manager. - * @prefix: Prefix to be used in printout to identify the caller. - * - * This function is called to print out the state of the memory - * type manager to aid debugging of out-of-memory conditions. - * It may not be called from within atomic context. - */ - void (*debug)(struct ttm_mem_type_manager *man, const char *prefix); -}; - -/** - * struct ttm_mem_type_manager - * - * @has_type: The memory type has been initialized. - * @use_type: The memory type is enabled. - * @flags: TTM_MEMTYPE_XX flags identifying the traits of the memory - * managed by this memory type. - * @gpu_offset: If used, the GPU offset of the first managed page of - * fixed memory or the first managed location in an aperture. - * @size: Size of the managed region. - * @available_caching: A mask of available caching types, TTM_PL_FLAG_XX, - * as defined in ttm_placement_common.h - * @default_caching: The default caching policy used for a buffer object - * placed in this memory type if the user doesn't provide one. - * @func: structure pointer implementing the range manager. See above - * @priv: Driver private closure for @func. - * @io_reserve_mutex: Mutex optionally protecting shared io_reserve structures - * @use_io_reserve_lru: Use an lru list to try to unreserve io_mem_regions - * reserved by the TTM vm system. - * @io_reserve_lru: Optional lru list for unreserving io mem regions. - * @io_reserve_fastpath: Only use bdev::driver::io_mem_reserve to obtain - * static information. bdev::driver::io_mem_free is never used. - * @lru: The lru list for this memory type. - * - * This structure is used to identify and manage memory types for a device. - * It's set up by the ttm_bo_driver::init_mem_type method. - */ - - - -struct ttm_mem_type_manager { - struct ttm_bo_device *bdev; - - /* - * No protection. Constant from start. - */ - - bool has_type; - bool use_type; - uint32_t flags; - unsigned long gpu_offset; - uint64_t size; - uint32_t available_caching; - uint32_t default_caching; - const struct ttm_mem_type_manager_func *func; - void *priv; - struct mutex io_reserve_mutex; - bool use_io_reserve_lru; - bool io_reserve_fastpath; - - /* - * Protected by @io_reserve_mutex: - */ - - struct list_head io_reserve_lru; - - /* - * Protected by the global->lru_lock. - */ - - struct list_head lru; -}; - -/** - * struct ttm_bo_driver - * - * @create_ttm_backend_entry: Callback to create a struct ttm_backend. - * @invalidate_caches: Callback to invalidate read caches when a buffer object - * has been evicted. - * @init_mem_type: Callback to initialize a struct ttm_mem_type_manager - * structure. - * @evict_flags: Callback to obtain placement flags when a buffer is evicted. - * @move: Callback for a driver to hook in accelerated functions to - * move a buffer. - * If set to NULL, a potentially slow memcpy() move is used. - * @sync_obj_signaled: See ttm_fence_api.h - * @sync_obj_wait: See ttm_fence_api.h - * @sync_obj_flush: See ttm_fence_api.h - * @sync_obj_unref: See ttm_fence_api.h - * @sync_obj_ref: See ttm_fence_api.h - */ - -struct ttm_bo_driver { - /** - * ttm_tt_create - * - * @bdev: pointer to a struct ttm_bo_device: - * @size: Size of the data needed backing. - * @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags. - * @dummy_read_page: See struct ttm_bo_device. - * - * Create a struct ttm_tt to back data with system memory pages. - * No pages are actually allocated. - * Returns: - * NULL: Out of memory. - */ - struct ttm_tt *(*ttm_tt_create)(struct ttm_bo_device *bdev, - unsigned long size, - uint32_t page_flags, - struct page *dummy_read_page); - - /** - * ttm_tt_populate - * - * @ttm: The struct ttm_tt to contain the backing pages. - * - * Allocate all backing pages - * Returns: - * -ENOMEM: Out of memory. - */ - int (*ttm_tt_populate)(struct ttm_tt *ttm); - - /** - * ttm_tt_unpopulate - * - * @ttm: The struct ttm_tt to contain the backing pages. - * - * Free all backing page - */ - void (*ttm_tt_unpopulate)(struct ttm_tt *ttm); - - /** - * struct ttm_bo_driver member invalidate_caches - * - * @bdev: the buffer object device. - * @flags: new placement of the rebound buffer object. - * - * A previosly evicted buffer has been rebound in a - * potentially new location. Tell the driver that it might - * consider invalidating read (texture) caches on the next command - * submission as a consequence. - */ - - int (*invalidate_caches) (struct ttm_bo_device *bdev, uint32_t flags); - int (*init_mem_type) (struct ttm_bo_device *bdev, uint32_t type, - struct ttm_mem_type_manager *man); - /** - * struct ttm_bo_driver member evict_flags: - * - * @bo: the buffer object to be evicted - * - * Return the bo flags for a buffer which is not mapped to the hardware. - * These will be placed in proposed_flags so that when the move is - * finished, they'll end up in bo->mem.flags - */ - - void(*evict_flags) (struct ttm_buffer_object *bo, - struct ttm_placement *placement); - /** - * struct ttm_bo_driver member move: - * - * @bo: the buffer to move - * @evict: whether this motion is evicting the buffer from - * the graphics address space - * @interruptible: Use interruptible sleeps if possible when sleeping. - * @no_wait: whether this should give up and return -EBUSY - * if this move would require sleeping - * @new_mem: the new memory region receiving the buffer - * - * Move a buffer between two memory regions. - */ - int (*move) (struct ttm_buffer_object *bo, - bool evict, bool interruptible, - bool no_wait_reserve, bool no_wait_gpu, - struct ttm_mem_reg *new_mem); - - /** - * struct ttm_bo_driver_member verify_access - * - * @bo: Pointer to a buffer object. - * @filp: Pointer to a struct file trying to access the object. - * - * Called from the map / write / read methods to verify that the - * caller is permitted to access the buffer object. - * This member may be set to NULL, which will refuse this kind of - * access for all buffer objects. - * This function should return 0 if access is granted, -EPERM otherwise. - */ - int (*verify_access) (struct ttm_buffer_object *bo, - struct file *filp); - - /** - * In case a driver writer dislikes the TTM fence objects, - * the driver writer can replace those with sync objects of - * his / her own. If it turns out that no driver writer is - * using these. I suggest we remove these hooks and plug in - * fences directly. The bo driver needs the following functionality: - * See the corresponding functions in the fence object API - * documentation. - */ - - bool (*sync_obj_signaled) (void *sync_obj, void *sync_arg); - int (*sync_obj_wait) (void *sync_obj, void *sync_arg, - bool lazy, bool interruptible); - int (*sync_obj_flush) (void *sync_obj, void *sync_arg); - void (*sync_obj_unref) (void **sync_obj); - void *(*sync_obj_ref) (void *sync_obj); - - /* hook to notify driver about a driver move so it - * can do tiling things */ - void (*move_notify)(struct ttm_buffer_object *bo, - struct ttm_mem_reg *new_mem); - /* notify the driver we are taking a fault on this BO - * and have reserved it */ - int (*fault_reserve_notify)(struct ttm_buffer_object *bo); - - /** - * notify the driver that we're about to swap out this bo - */ - void (*swap_notify) (struct ttm_buffer_object *bo); - - /** - * Driver callback on when mapping io memory (for bo_move_memcpy - * for instance). TTM will take care to call io_mem_free whenever - * the mapping is not use anymore. io_mem_reserve & io_mem_free - * are balanced. - */ - int (*io_mem_reserve)(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem); - void (*io_mem_free)(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem); -}; - -/** - * struct ttm_bo_global_ref - Argument to initialize a struct ttm_bo_global. - */ - -struct ttm_bo_global_ref { - struct drm_global_reference ref; - struct ttm_mem_global *mem_glob; -}; - -/** - * struct ttm_bo_global - Buffer object driver global data. - * - * @mem_glob: Pointer to a struct ttm_mem_global object for accounting. - * @dummy_read_page: Pointer to a dummy page used for mapping requests - * of unpopulated pages. - * @shrink: A shrink callback object used for buffer object swap. - * @device_list_mutex: Mutex protecting the device list. - * This mutex is held while traversing the device list for pm options. - * @lru_lock: Spinlock protecting the bo subsystem lru lists. - * @device_list: List of buffer object devices. - * @swap_lru: Lru list of buffer objects used for swapping. - */ - -struct ttm_bo_global { - - /** - * Constant after init. - */ - - struct kobject kobj; - struct ttm_mem_global *mem_glob; - struct page *dummy_read_page; - struct ttm_mem_shrink shrink; - struct mutex device_list_mutex; - spinlock_t lru_lock; - - /** - * Protected by device_list_mutex. - */ - struct list_head device_list; - - /** - * Protected by the lru_lock. - */ - struct list_head swap_lru; - - /** - * Internal protection. - */ - atomic_t bo_count; -}; - - -#define TTM_NUM_MEM_TYPES 8 - -#define TTM_BO_PRIV_FLAG_MOVING 0 /* Buffer object is moving and needs - idling before CPU mapping */ -#define TTM_BO_PRIV_FLAG_MAX 1 -/** - * struct ttm_bo_device - Buffer object driver device-specific data. - * - * @driver: Pointer to a struct ttm_bo_driver struct setup by the driver. - * @man: An array of mem_type_managers. - * @fence_lock: Protects the synchronizing members on *all* bos belonging - * to this device. - * @addr_space_mm: Range manager for the device address space. - * lru_lock: Spinlock that protects the buffer+device lru lists and - * ddestroy lists. - * @val_seq: Current validation sequence. - * @nice_mode: Try nicely to wait for buffer idle when cleaning a manager. - * If a GPU lockup has been detected, this is forced to 0. - * @dev_mapping: A pointer to the struct address_space representing the - * device address space. - * @wq: Work queue structure for the delayed delete workqueue. - * - */ - -struct ttm_bo_device { - - /* - * Constant after bo device init / atomic. - */ - struct list_head device_list; - struct ttm_bo_global *glob; - struct ttm_bo_driver *driver; - rwlock_t vm_lock; - struct ttm_mem_type_manager man[TTM_NUM_MEM_TYPES]; - spinlock_t fence_lock; - /* - * Protected by the vm lock. - */ - struct rb_root addr_space_rb; - struct drm_mm addr_space_mm; - - /* - * Protected by the global:lru lock. - */ - struct list_head ddestroy; - uint32_t val_seq; - - /* - * Protected by load / firstopen / lastclose /unload sync. - */ - - bool nice_mode; - struct address_space *dev_mapping; - - /* - * Internal protection. - */ - - struct delayed_work wq; - - bool need_dma32; -}; - -/** - * ttm_flag_masked - * - * @old: Pointer to the result and original value. - * @new: New value of bits. - * @mask: Mask of bits to change. - * - * Convenience function to change a number of bits identified by a mask. - */ - -static inline uint32_t -ttm_flag_masked(uint32_t *old, uint32_t new, uint32_t mask) -{ - *old ^= (*old ^ new) & mask; - return *old; -} - -/** - * ttm_tt_init - * - * @ttm: The struct ttm_tt. - * @bdev: pointer to a struct ttm_bo_device: - * @size: Size of the data needed backing. - * @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags. - * @dummy_read_page: See struct ttm_bo_device. - * - * Create a struct ttm_tt to back data with system memory pages. - * No pages are actually allocated. - * Returns: - * NULL: Out of memory. - */ -extern int ttm_tt_init(struct ttm_tt *ttm, struct ttm_bo_device *bdev, - unsigned long size, uint32_t page_flags, - struct page *dummy_read_page); -extern int ttm_dma_tt_init(struct ttm_dma_tt *ttm_dma, struct ttm_bo_device *bdev, - unsigned long size, uint32_t page_flags, - struct page *dummy_read_page); - -/** - * ttm_tt_fini - * - * @ttm: the ttm_tt structure. - * - * Free memory of ttm_tt structure - */ -extern void ttm_tt_fini(struct ttm_tt *ttm); -extern void ttm_dma_tt_fini(struct ttm_dma_tt *ttm_dma); - -/** - * ttm_ttm_bind: - * - * @ttm: The struct ttm_tt containing backing pages. - * @bo_mem: The struct ttm_mem_reg identifying the binding location. - * - * Bind the pages of @ttm to an aperture location identified by @bo_mem - */ -extern int ttm_tt_bind(struct ttm_tt *ttm, struct ttm_mem_reg *bo_mem); - -/** - * ttm_ttm_destroy: - * - * @ttm: The struct ttm_tt. - * - * Unbind, unpopulate and destroy common struct ttm_tt. - */ -extern void ttm_tt_destroy(struct ttm_tt *ttm); - -/** - * ttm_ttm_unbind: - * - * @ttm: The struct ttm_tt. - * - * Unbind a struct ttm_tt. - */ -extern void ttm_tt_unbind(struct ttm_tt *ttm); - -/** - * ttm_tt_swapin: - * - * @ttm: The struct ttm_tt. - * - * Swap in a previously swap out ttm_tt. - */ -extern int ttm_tt_swapin(struct ttm_tt *ttm); - -/** - * ttm_tt_cache_flush: - * - * @pages: An array of pointers to struct page:s to flush. - * @num_pages: Number of pages to flush. - * - * Flush the data of the indicated pages from the cpu caches. - * This is used when changing caching attributes of the pages from - * cache-coherent. - */ -extern void ttm_tt_cache_flush(struct page *pages[], unsigned long num_pages); - -/** - * ttm_tt_set_placement_caching: - * - * @ttm A struct ttm_tt the backing pages of which will change caching policy. - * @placement: Flag indicating the desired caching policy. - * - * This function will change caching policy of any default kernel mappings of - * the pages backing @ttm. If changing from cached to uncached or - * write-combined, - * all CPU caches will first be flushed to make sure the data of the pages - * hit RAM. This function may be very costly as it involves global TLB - * and cache flushes and potential page splitting / combining. - */ -extern int ttm_tt_set_placement_caching(struct ttm_tt *ttm, uint32_t placement); -extern int ttm_tt_swapout(struct ttm_tt *ttm, - struct file *persistent_swap_storage); - -/* - * ttm_bo.c - */ - -/** - * ttm_mem_reg_is_pci - * - * @bdev: Pointer to a struct ttm_bo_device. - * @mem: A valid struct ttm_mem_reg. - * - * Returns true if the memory described by @mem is PCI memory, - * false otherwise. - */ -extern bool ttm_mem_reg_is_pci(struct ttm_bo_device *bdev, - struct ttm_mem_reg *mem); - -/** - * ttm_bo_mem_space - * - * @bo: Pointer to a struct ttm_buffer_object. the data of which - * we want to allocate space for. - * @proposed_placement: Proposed new placement for the buffer object. - * @mem: A struct ttm_mem_reg. - * @interruptible: Sleep interruptible when sliping. - * @no_wait_reserve: Return immediately if other buffers are busy. - * @no_wait_gpu: Return immediately if the GPU is busy. - * - * Allocate memory space for the buffer object pointed to by @bo, using - * the placement flags in @mem, potentially evicting other idle buffer objects. - * This function may sleep while waiting for space to become available. - * Returns: - * -EBUSY: No space available (only if no_wait == 1). - * -ENOMEM: Could not allocate memory for the buffer object, either due to - * fragmentation or concurrent allocators. - * -ERESTARTSYS: An interruptible sleep was interrupted by a signal. - */ -extern int ttm_bo_mem_space(struct ttm_buffer_object *bo, - struct ttm_placement *placement, - struct ttm_mem_reg *mem, - bool interruptible, - bool no_wait_reserve, bool no_wait_gpu); - -extern void ttm_bo_mem_put(struct ttm_buffer_object *bo, - struct ttm_mem_reg *mem); -extern void ttm_bo_mem_put_locked(struct ttm_buffer_object *bo, - struct ttm_mem_reg *mem); - -/** - * ttm_bo_wait_for_cpu - * - * @bo: Pointer to a struct ttm_buffer_object. - * @no_wait: Don't sleep while waiting. - * - * Wait until a buffer object is no longer sync'ed for CPU access. - * Returns: - * -EBUSY: Buffer object was sync'ed for CPU access. (only if no_wait == 1). - * -ERESTARTSYS: An interruptible sleep was interrupted by a signal. - */ - -extern int ttm_bo_wait_cpu(struct ttm_buffer_object *bo, bool no_wait); - -extern void ttm_bo_global_release(struct drm_global_reference *ref); -extern int ttm_bo_global_init(struct drm_global_reference *ref); - -extern int ttm_bo_device_release(struct ttm_bo_device *bdev); - -/** - * ttm_bo_device_init - * - * @bdev: A pointer to a struct ttm_bo_device to initialize. - * @glob: A pointer to an initialized struct ttm_bo_global. - * @driver: A pointer to a struct ttm_bo_driver set up by the caller. - * @file_page_offset: Offset into the device address space that is available - * for buffer data. This ensures compatibility with other users of the - * address space. - * - * Initializes a struct ttm_bo_device: - * Returns: - * !0: Failure. - */ -extern int ttm_bo_device_init(struct ttm_bo_device *bdev, - struct ttm_bo_global *glob, - struct ttm_bo_driver *driver, - uint64_t file_page_offset, bool need_dma32); - -/** - * ttm_bo_unmap_virtual - * - * @bo: tear down the virtual mappings for this BO - */ -extern void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo); - -/** - * ttm_bo_unmap_virtual - * - * @bo: tear down the virtual mappings for this BO - * - * The caller must take ttm_mem_io_lock before calling this function. - */ -extern void ttm_bo_unmap_virtual_locked(struct ttm_buffer_object *bo); - -extern int ttm_mem_io_reserve_vm(struct ttm_buffer_object *bo); -extern void ttm_mem_io_free_vm(struct ttm_buffer_object *bo); -extern int ttm_mem_io_lock(struct ttm_mem_type_manager *man, - bool interruptible); -extern void ttm_mem_io_unlock(struct ttm_mem_type_manager *man); - - -/** - * ttm_bo_reserve: - * - * @bo: A pointer to a struct ttm_buffer_object. - * @interruptible: Sleep interruptible if waiting. - * @no_wait: Don't sleep while trying to reserve, rather return -EBUSY. - * @use_sequence: If @bo is already reserved, Only sleep waiting for - * it to become unreserved if @sequence < (@bo)->sequence. - * - * Locks a buffer object for validation. (Or prevents other processes from - * locking it for validation) and removes it from lru lists, while taking - * a number of measures to prevent deadlocks. - * - * Deadlocks may occur when two processes try to reserve multiple buffers in - * different order, either by will or as a result of a buffer being evicted - * to make room for a buffer already reserved. (Buffers are reserved before - * they are evicted). The following algorithm prevents such deadlocks from - * occurring: - * 1) Buffers are reserved with the lru spinlock held. Upon successful - * reservation they are removed from the lru list. This stops a reserved buffer - * from being evicted. However the lru spinlock is released between the time - * a buffer is selected for eviction and the time it is reserved. - * Therefore a check is made when a buffer is reserved for eviction, that it - * is still the first buffer in the lru list, before it is removed from the - * list. @check_lru == 1 forces this check. If it fails, the function returns - * -EINVAL, and the caller should then choose a new buffer to evict and repeat - * the procedure. - * 2) Processes attempting to reserve multiple buffers other than for eviction, - * (typically execbuf), should first obtain a unique 32-bit - * validation sequence number, - * and call this function with @use_sequence == 1 and @sequence == the unique - * sequence number. If upon call of this function, the buffer object is already - * reserved, the validation sequence is checked against the validation - * sequence of the process currently reserving the buffer, - * and if the current validation sequence is greater than that of the process - * holding the reservation, the function returns -EAGAIN. Otherwise it sleeps - * waiting for the buffer to become unreserved, after which it retries - * reserving. - * The caller should, when receiving an -EAGAIN error - * release all its buffer reservations, wait for @bo to become unreserved, and - * then rerun the validation with the same validation sequence. This procedure - * will always guarantee that the process with the lowest validation sequence - * will eventually succeed, preventing both deadlocks and starvation. - * - * Returns: - * -EAGAIN: The reservation may cause a deadlock. - * Release all buffer reservations, wait for @bo to become unreserved and - * try again. (only if use_sequence == 1). - * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by - * a signal. Release all buffer reservations and return to user-space. - * -EBUSY: The function needed to sleep, but @no_wait was true - * -EDEADLK: Bo already reserved using @sequence. This error code will only - * be returned if @use_sequence is set to true. - */ -extern int ttm_bo_reserve(struct ttm_buffer_object *bo, - bool interruptible, - bool no_wait, bool use_sequence, uint32_t sequence); - - -/** - * ttm_bo_reserve_locked: - * - * @bo: A pointer to a struct ttm_buffer_object. - * @interruptible: Sleep interruptible if waiting. - * @no_wait: Don't sleep while trying to reserve, rather return -EBUSY. - * @use_sequence: If @bo is already reserved, Only sleep waiting for - * it to become unreserved if @sequence < (@bo)->sequence. - * - * Must be called with struct ttm_bo_global::lru_lock held, - * and will not remove reserved buffers from the lru lists. - * The function may release the LRU spinlock if it needs to sleep. - * Otherwise identical to ttm_bo_reserve. - * - * Returns: - * -EAGAIN: The reservation may cause a deadlock. - * Release all buffer reservations, wait for @bo to become unreserved and - * try again. (only if use_sequence == 1). - * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by - * a signal. Release all buffer reservations and return to user-space. - * -EBUSY: The function needed to sleep, but @no_wait was true - * -EDEADLK: Bo already reserved using @sequence. This error code will only - * be returned if @use_sequence is set to true. - */ -extern int ttm_bo_reserve_locked(struct ttm_buffer_object *bo, - bool interruptible, - bool no_wait, bool use_sequence, - uint32_t sequence); - -/** - * ttm_bo_unreserve - * - * @bo: A pointer to a struct ttm_buffer_object. - * - * Unreserve a previous reservation of @bo. - */ -extern void ttm_bo_unreserve(struct ttm_buffer_object *bo); - -/** - * ttm_bo_unreserve_locked - * - * @bo: A pointer to a struct ttm_buffer_object. - * - * Unreserve a previous reservation of @bo. - * Needs to be called with struct ttm_bo_global::lru_lock held. - */ -extern void ttm_bo_unreserve_locked(struct ttm_buffer_object *bo); - -/** - * ttm_bo_wait_unreserved - * - * @bo: A pointer to a struct ttm_buffer_object. - * - * Wait for a struct ttm_buffer_object to become unreserved. - * This is typically used in the execbuf code to relax cpu-usage when - * a potential deadlock condition backoff. - */ -extern int ttm_bo_wait_unreserved(struct ttm_buffer_object *bo, - bool interruptible); - -/* - * ttm_bo_util.c - */ - -/** - * ttm_bo_move_ttm - * - * @bo: A pointer to a struct ttm_buffer_object. - * @evict: 1: This is an eviction. Don't try to pipeline. - * @no_wait_reserve: Return immediately if other buffers are busy. - * @no_wait_gpu: Return immediately if the GPU is busy. - * @new_mem: struct ttm_mem_reg indicating where to move. - * - * Optimized move function for a buffer object with both old and - * new placement backed by a TTM. The function will, if successful, - * free any old aperture space, and set (@new_mem)->mm_node to NULL, - * and update the (@bo)->mem placement flags. If unsuccessful, the old - * data remains untouched, and it's up to the caller to free the - * memory space indicated by @new_mem. - * Returns: - * !0: Failure. - */ - -extern int ttm_bo_move_ttm(struct ttm_buffer_object *bo, - bool evict, bool no_wait_reserve, - bool no_wait_gpu, struct ttm_mem_reg *new_mem); - -/** - * ttm_bo_move_memcpy - * - * @bo: A pointer to a struct ttm_buffer_object. - * @evict: 1: This is an eviction. Don't try to pipeline. - * @no_wait_reserve: Return immediately if other buffers are busy. - * @no_wait_gpu: Return immediately if the GPU is busy. - * @new_mem: struct ttm_mem_reg indicating where to move. - * - * Fallback move function for a mappable buffer object in mappable memory. - * The function will, if successful, - * free any old aperture space, and set (@new_mem)->mm_node to NULL, - * and update the (@bo)->mem placement flags. If unsuccessful, the old - * data remains untouched, and it's up to the caller to free the - * memory space indicated by @new_mem. - * Returns: - * !0: Failure. - */ - -extern int ttm_bo_move_memcpy(struct ttm_buffer_object *bo, - bool evict, bool no_wait_reserve, - bool no_wait_gpu, struct ttm_mem_reg *new_mem); - -/** - * ttm_bo_free_old_node - * - * @bo: A pointer to a struct ttm_buffer_object. - * - * Utility function to free an old placement after a successful move. - */ -extern void ttm_bo_free_old_node(struct ttm_buffer_object *bo); - -/** - * ttm_bo_move_accel_cleanup. - * - * @bo: A pointer to a struct ttm_buffer_object. - * @sync_obj: A sync object that signals when moving is complete. - * @sync_obj_arg: An argument to pass to the sync object idle / wait - * functions. - * @evict: This is an evict move. Don't return until the buffer is idle. - * @no_wait_reserve: Return immediately if other buffers are busy. - * @no_wait_gpu: Return immediately if the GPU is busy. - * @new_mem: struct ttm_mem_reg indicating where to move. - * - * Accelerated move function to be called when an accelerated move - * has been scheduled. The function will create a new temporary buffer object - * representing the old placement, and put the sync object on both buffer - * objects. After that the newly created buffer object is unref'd to be - * destroyed when the move is complete. This will help pipeline - * buffer moves. - */ - -extern int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo, - void *sync_obj, - void *sync_obj_arg, - bool evict, bool no_wait_reserve, - bool no_wait_gpu, - struct ttm_mem_reg *new_mem); -/** - * ttm_io_prot - * - * @c_state: Caching state. - * @tmp: Page protection flag for a normal, cached mapping. - * - * Utility function that returns the pgprot_t that should be used for - * setting up a PTE with the caching model indicated by @c_state. - */ -extern pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t tmp); - -extern const struct ttm_mem_type_manager_func ttm_bo_manager_func; - -#if (defined(CONFIG_AGP) || (defined(CONFIG_AGP_MODULE) && defined(MODULE))) -#define TTM_HAS_AGP -#include <linux/agp_backend.h> - -/** - * ttm_agp_tt_create - * - * @bdev: Pointer to a struct ttm_bo_device. - * @bridge: The agp bridge this device is sitting on. - * @size: Size of the data needed backing. - * @page_flags: Page flags as identified by TTM_PAGE_FLAG_XX flags. - * @dummy_read_page: See struct ttm_bo_device. - * - * - * Create a TTM backend that uses the indicated AGP bridge as an aperture - * for TT memory. This function uses the linux agpgart interface to - * bind and unbind memory backing a ttm_tt. - */ -extern struct ttm_tt *ttm_agp_tt_create(struct ttm_bo_device *bdev, - struct agp_bridge_data *bridge, - unsigned long size, uint32_t page_flags, - struct page *dummy_read_page); -int ttm_agp_tt_populate(struct ttm_tt *ttm); -void ttm_agp_tt_unpopulate(struct ttm_tt *ttm); -#endif - -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_execbuf_util.h b/ANDROID_3.4.5/include/drm/ttm/ttm_execbuf_util.h deleted file mode 100644 index 26cc7f9f..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_execbuf_util.h +++ /dev/null @@ -1,112 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ - -#ifndef _TTM_EXECBUF_UTIL_H_ -#define _TTM_EXECBUF_UTIL_H_ - -#include "ttm/ttm_bo_api.h" -#include <linux/list.h> - -/** - * struct ttm_validate_buffer - * - * @head: list head for thread-private list. - * @bo: refcounted buffer object pointer. - * @new_sync_obj_arg: New sync_obj_arg for @bo, to be used once - * adding a new sync object. - * @reserved: Indicates whether @bo has been reserved for validation. - * @removed: Indicates whether @bo has been removed from lru lists. - * @put_count: Number of outstanding references on bo::list_kref. - * @old_sync_obj: Pointer to a sync object about to be unreferenced - */ - -struct ttm_validate_buffer { - struct list_head head; - struct ttm_buffer_object *bo; - void *new_sync_obj_arg; - bool reserved; - bool removed; - int put_count; - void *old_sync_obj; -}; - -/** - * function ttm_eu_backoff_reservation - * - * @list: thread private list of ttm_validate_buffer structs. - * - * Undoes all buffer validation reservations for bos pointed to by - * the list entries. - */ - -extern void ttm_eu_backoff_reservation(struct list_head *list); - -/** - * function ttm_eu_reserve_buffers - * - * @list: thread private list of ttm_validate_buffer structs. - * - * Tries to reserve bos pointed to by the list entries for validation. - * If the function returns 0, all buffers are marked as "unfenced", - * taken off the lru lists and are not synced for write CPU usage. - * - * If the function detects a deadlock due to multiple threads trying to - * reserve the same buffers in reverse order, all threads except one will - * back off and retry. This function may sleep while waiting for - * CPU write reservations to be cleared, and for other threads to - * unreserve their buffers. - * - * This function may return -ERESTART or -EAGAIN if the calling process - * receives a signal while waiting. In that case, no buffers on the list - * will be reserved upon return. - * - * Buffers reserved by this function should be unreserved by - * a call to either ttm_eu_backoff_reservation() or - * ttm_eu_fence_buffer_objects() when command submission is complete or - * has failed. - */ - -extern int ttm_eu_reserve_buffers(struct list_head *list); - -/** - * function ttm_eu_fence_buffer_objects. - * - * @list: thread private list of ttm_validate_buffer structs. - * @sync_obj: The new sync object for the buffers. - * - * This function should be called when command submission is complete, and - * it will add a new sync object to bos pointed to by entries on @list. - * It also unreserves all buffers, putting them on lru lists. - * - */ - -extern void ttm_eu_fence_buffer_objects(struct list_head *list, void *sync_obj); - -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_lock.h b/ANDROID_3.4.5/include/drm/ttm/ttm_lock.h deleted file mode 100644 index 2e7f0c94..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_lock.h +++ /dev/null @@ -1,247 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2007-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ - -/** @file ttm_lock.h - * This file implements a simple replacement for the buffer manager use - * of the DRM heavyweight hardware lock. - * The lock is a read-write lock. Taking it in read mode and write mode - * is relatively fast, and intended for in-kernel use only. - * - * The vt mode is used only when there is a need to block all - * user-space processes from validating buffers. - * It's allowed to leave kernel space with the vt lock held. - * If a user-space process dies while having the vt-lock, - * it will be released during the file descriptor release. The vt lock - * excludes write lock and read lock. - * - * The suspend mode is used to lock out all TTM users when preparing for - * and executing suspend operations. - * - */ - -#ifndef _TTM_LOCK_H_ -#define _TTM_LOCK_H_ - -#include "ttm/ttm_object.h" -#include <linux/wait.h> -#include <linux/atomic.h> - -/** - * struct ttm_lock - * - * @base: ttm base object used solely to release the lock if the client - * holding the lock dies. - * @queue: Queue for processes waiting for lock change-of-status. - * @lock: Spinlock protecting some lock members. - * @rw: Read-write lock counter. Protected by @lock. - * @flags: Lock state. Protected by @lock. - * @kill_takers: Boolean whether to kill takers of the lock. - * @signal: Signal to send when kill_takers is true. - */ - -struct ttm_lock { - struct ttm_base_object base; - wait_queue_head_t queue; - spinlock_t lock; - int32_t rw; - uint32_t flags; - bool kill_takers; - int signal; - struct ttm_object_file *vt_holder; -}; - - -/** - * ttm_lock_init - * - * @lock: Pointer to a struct ttm_lock - * Initializes the lock. - */ -extern void ttm_lock_init(struct ttm_lock *lock); - -/** - * ttm_read_unlock - * - * @lock: Pointer to a struct ttm_lock - * - * Releases a read lock. - */ -extern void ttm_read_unlock(struct ttm_lock *lock); - -/** - * ttm_read_lock - * - * @lock: Pointer to a struct ttm_lock - * @interruptible: Interruptible sleeping while waiting for a lock. - * - * Takes the lock in read mode. - * Returns: - * -ERESTARTSYS If interrupted by a signal and interruptible is true. - */ -extern int ttm_read_lock(struct ttm_lock *lock, bool interruptible); - -/** - * ttm_read_trylock - * - * @lock: Pointer to a struct ttm_lock - * @interruptible: Interruptible sleeping while waiting for a lock. - * - * Tries to take the lock in read mode. If the lock is already held - * in write mode, the function will return -EBUSY. If the lock is held - * in vt or suspend mode, the function will sleep until these modes - * are unlocked. - * - * Returns: - * -EBUSY The lock was already held in write mode. - * -ERESTARTSYS If interrupted by a signal and interruptible is true. - */ -extern int ttm_read_trylock(struct ttm_lock *lock, bool interruptible); - -/** - * ttm_write_unlock - * - * @lock: Pointer to a struct ttm_lock - * - * Releases a write lock. - */ -extern void ttm_write_unlock(struct ttm_lock *lock); - -/** - * ttm_write_lock - * - * @lock: Pointer to a struct ttm_lock - * @interruptible: Interruptible sleeping while waiting for a lock. - * - * Takes the lock in write mode. - * Returns: - * -ERESTARTSYS If interrupted by a signal and interruptible is true. - */ -extern int ttm_write_lock(struct ttm_lock *lock, bool interruptible); - -/** - * ttm_lock_downgrade - * - * @lock: Pointer to a struct ttm_lock - * - * Downgrades a write lock to a read lock. - */ -extern void ttm_lock_downgrade(struct ttm_lock *lock); - -/** - * ttm_suspend_lock - * - * @lock: Pointer to a struct ttm_lock - * - * Takes the lock in suspend mode. Excludes read and write mode. - */ -extern void ttm_suspend_lock(struct ttm_lock *lock); - -/** - * ttm_suspend_unlock - * - * @lock: Pointer to a struct ttm_lock - * - * Releases a suspend lock - */ -extern void ttm_suspend_unlock(struct ttm_lock *lock); - -/** - * ttm_vt_lock - * - * @lock: Pointer to a struct ttm_lock - * @interruptible: Interruptible sleeping while waiting for a lock. - * @tfile: Pointer to a struct ttm_object_file to register the lock with. - * - * Takes the lock in vt mode. - * Returns: - * -ERESTARTSYS If interrupted by a signal and interruptible is true. - * -ENOMEM: Out of memory when locking. - */ -extern int ttm_vt_lock(struct ttm_lock *lock, bool interruptible, - struct ttm_object_file *tfile); - -/** - * ttm_vt_unlock - * - * @lock: Pointer to a struct ttm_lock - * - * Releases a vt lock. - * Returns: - * -EINVAL If the lock was not held. - */ -extern int ttm_vt_unlock(struct ttm_lock *lock); - -/** - * ttm_write_unlock - * - * @lock: Pointer to a struct ttm_lock - * - * Releases a write lock. - */ -extern void ttm_write_unlock(struct ttm_lock *lock); - -/** - * ttm_write_lock - * - * @lock: Pointer to a struct ttm_lock - * @interruptible: Interruptible sleeping while waiting for a lock. - * - * Takes the lock in write mode. - * Returns: - * -ERESTARTSYS If interrupted by a signal and interruptible is true. - */ -extern int ttm_write_lock(struct ttm_lock *lock, bool interruptible); - -/** - * ttm_lock_set_kill - * - * @lock: Pointer to a struct ttm_lock - * @val: Boolean whether to kill processes taking the lock. - * @signal: Signal to send to the process taking the lock. - * - * The kill-when-taking-lock functionality is used to kill processes that keep - * on using the TTM functionality when its resources has been taken down, for - * example when the X server exits. A typical sequence would look like this: - * - X server takes lock in write mode. - * - ttm_lock_set_kill() is called with @val set to true. - * - As part of X server exit, TTM resources are taken down. - * - X server releases the lock on file release. - * - Another dri client wants to render, takes the lock and is killed. - * - */ -static inline void ttm_lock_set_kill(struct ttm_lock *lock, bool val, - int signal) -{ - lock->kill_takers = val; - if (val) - lock->signal = signal; -} - -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_memory.h b/ANDROID_3.4.5/include/drm/ttm/ttm_memory.h deleted file mode 100644 index d6d1da46..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_memory.h +++ /dev/null @@ -1,160 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#ifndef TTM_MEMORY_H -#define TTM_MEMORY_H - -#include <linux/workqueue.h> -#include <linux/spinlock.h> -#include <linux/bug.h> -#include <linux/wait.h> -#include <linux/errno.h> -#include <linux/kobject.h> -#include <linux/mm.h> - -/** - * struct ttm_mem_shrink - callback to shrink TTM memory usage. - * - * @do_shrink: The callback function. - * - * Arguments to the do_shrink functions are intended to be passed using - * inheritance. That is, the argument class derives from struct ttm_mem_shrink, - * and can be accessed using container_of(). - */ - -struct ttm_mem_shrink { - int (*do_shrink) (struct ttm_mem_shrink *); -}; - -/** - * struct ttm_mem_global - Global memory accounting structure. - * - * @shrink: A single callback to shrink TTM memory usage. Extend this - * to a linked list to be able to handle multiple callbacks when needed. - * @swap_queue: A workqueue to handle shrinking in low memory situations. We - * need a separate workqueue since it will spend a lot of time waiting - * for the GPU, and this will otherwise block other workqueue tasks(?) - * At this point we use only a single-threaded workqueue. - * @work: The workqueue callback for the shrink queue. - * @queue: Wait queue for processes suspended waiting for memory. - * @lock: Lock to protect the @shrink - and the memory accounting members, - * that is, essentially the whole structure with some exceptions. - * @zones: Array of pointers to accounting zones. - * @num_zones: Number of populated entries in the @zones array. - * @zone_kernel: Pointer to the kernel zone. - * @zone_highmem: Pointer to the highmem zone if there is one. - * @zone_dma32: Pointer to the dma32 zone if there is one. - * - * Note that this structure is not per device. It should be global for all - * graphics devices. - */ - -#define TTM_MEM_MAX_ZONES 2 -struct ttm_mem_zone; -struct ttm_mem_global { - struct kobject kobj; - struct ttm_mem_shrink *shrink; - struct workqueue_struct *swap_queue; - struct work_struct work; - wait_queue_head_t queue; - spinlock_t lock; - struct ttm_mem_zone *zones[TTM_MEM_MAX_ZONES]; - unsigned int num_zones; - struct ttm_mem_zone *zone_kernel; -#ifdef CONFIG_HIGHMEM - struct ttm_mem_zone *zone_highmem; -#else - struct ttm_mem_zone *zone_dma32; -#endif -}; - -/** - * ttm_mem_init_shrink - initialize a struct ttm_mem_shrink object - * - * @shrink: The object to initialize. - * @func: The callback function. - */ - -static inline void ttm_mem_init_shrink(struct ttm_mem_shrink *shrink, - int (*func) (struct ttm_mem_shrink *)) -{ - shrink->do_shrink = func; -} - -/** - * ttm_mem_register_shrink - register a struct ttm_mem_shrink object. - * - * @glob: The struct ttm_mem_global object to register with. - * @shrink: An initialized struct ttm_mem_shrink object to register. - * - * Returns: - * -EBUSY: There's already a callback registered. (May change). - */ - -static inline int ttm_mem_register_shrink(struct ttm_mem_global *glob, - struct ttm_mem_shrink *shrink) -{ - spin_lock(&glob->lock); - if (glob->shrink != NULL) { - spin_unlock(&glob->lock); - return -EBUSY; - } - glob->shrink = shrink; - spin_unlock(&glob->lock); - return 0; -} - -/** - * ttm_mem_unregister_shrink - unregister a struct ttm_mem_shrink object. - * - * @glob: The struct ttm_mem_global object to unregister from. - * @shrink: A previously registert struct ttm_mem_shrink object. - * - */ - -static inline void ttm_mem_unregister_shrink(struct ttm_mem_global *glob, - struct ttm_mem_shrink *shrink) -{ - spin_lock(&glob->lock); - BUG_ON(glob->shrink != shrink); - glob->shrink = NULL; - spin_unlock(&glob->lock); -} - -extern int ttm_mem_global_init(struct ttm_mem_global *glob); -extern void ttm_mem_global_release(struct ttm_mem_global *glob); -extern int ttm_mem_global_alloc(struct ttm_mem_global *glob, uint64_t memory, - bool no_wait, bool interruptible); -extern void ttm_mem_global_free(struct ttm_mem_global *glob, - uint64_t amount); -extern int ttm_mem_global_alloc_page(struct ttm_mem_global *glob, - struct page *page, - bool no_wait, bool interruptible); -extern void ttm_mem_global_free_page(struct ttm_mem_global *glob, - struct page *page); -extern size_t ttm_round_pot(size_t size); -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_module.h b/ANDROID_3.4.5/include/drm/ttm/ttm_module.h deleted file mode 100644 index 45fa318c..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_module.h +++ /dev/null @@ -1,40 +0,0 @@ -/************************************************************************** - * - * Copyright 2008-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ - -#ifndef _TTM_MODULE_H_ -#define _TTM_MODULE_H_ - -#include <linux/kernel.h> -struct kobject; - -#define TTM_PFX "[TTM] " -extern struct kobject *ttm_get_kobj(void); - -#endif /* _TTM_MODULE_H_ */ diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_object.h b/ANDROID_3.4.5/include/drm/ttm/ttm_object.h deleted file mode 100644 index e46054e5..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_object.h +++ /dev/null @@ -1,271 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ -/** @file ttm_object.h - * - * Base- and reference object implementation for the various - * ttm objects. Implements reference counting, minimal security checks - * and release on file close. - */ - -#ifndef _TTM_OBJECT_H_ -#define _TTM_OBJECT_H_ - -#include <linux/list.h> -#include "drm_hashtab.h" -#include <linux/kref.h> -#include <ttm/ttm_memory.h> - -/** - * enum ttm_ref_type - * - * Describes what type of reference a ref object holds. - * - * TTM_REF_USAGE is a simple refcount on a base object. - * - * TTM_REF_SYNCCPU_READ is a SYNCCPU_READ reference on a - * buffer object. - * - * TTM_REF_SYNCCPU_WRITE is a SYNCCPU_WRITE reference on a - * buffer object. - * - */ - -enum ttm_ref_type { - TTM_REF_USAGE, - TTM_REF_SYNCCPU_READ, - TTM_REF_SYNCCPU_WRITE, - TTM_REF_NUM -}; - -/** - * enum ttm_object_type - * - * One entry per ttm object type. - * Device-specific types should use the - * ttm_driver_typex types. - */ - -enum ttm_object_type { - ttm_fence_type, - ttm_buffer_type, - ttm_lock_type, - ttm_driver_type0 = 256, - ttm_driver_type1, - ttm_driver_type2, - ttm_driver_type3, - ttm_driver_type4, - ttm_driver_type5 -}; - -struct ttm_object_file; -struct ttm_object_device; - -/** - * struct ttm_base_object - * - * @hash: hash entry for the per-device object hash. - * @type: derived type this object is base class for. - * @shareable: Other ttm_object_files can access this object. - * - * @tfile: Pointer to ttm_object_file of the creator. - * NULL if the object was not created by a user request. - * (kernel object). - * - * @refcount: Number of references to this object, not - * including the hash entry. A reference to a base object can - * only be held by a ref object. - * - * @refcount_release: A function to be called when there are - * no more references to this object. This function should - * destroy the object (or make sure destruction eventually happens), - * and when it is called, the object has - * already been taken out of the per-device hash. The parameter - * "base" should be set to NULL by the function. - * - * @ref_obj_release: A function to be called when a reference object - * with another ttm_ref_type than TTM_REF_USAGE is deleted. - * This function may, for example, release a lock held by a user-space - * process. - * - * This struct is intended to be used as a base struct for objects that - * are visible to user-space. It provides a global name, race-safe - * access and refcounting, minimal access contol and hooks for unref actions. - */ - -struct ttm_base_object { - struct drm_hash_item hash; - enum ttm_object_type object_type; - bool shareable; - struct ttm_object_file *tfile; - struct kref refcount; - void (*refcount_release) (struct ttm_base_object **base); - void (*ref_obj_release) (struct ttm_base_object *base, - enum ttm_ref_type ref_type); -}; - -/** - * ttm_base_object_init - * - * @tfile: Pointer to a struct ttm_object_file. - * @base: The struct ttm_base_object to initialize. - * @shareable: This object is shareable with other applcations. - * (different @tfile pointers.) - * @type: The object type. - * @refcount_release: See the struct ttm_base_object description. - * @ref_obj_release: See the struct ttm_base_object description. - * - * Initializes a struct ttm_base_object. - */ - -extern int ttm_base_object_init(struct ttm_object_file *tfile, - struct ttm_base_object *base, - bool shareable, - enum ttm_object_type type, - void (*refcount_release) (struct ttm_base_object - **), - void (*ref_obj_release) (struct ttm_base_object - *, - enum ttm_ref_type - ref_type)); - -/** - * ttm_base_object_lookup - * - * @tfile: Pointer to a struct ttm_object_file. - * @key: Hash key - * - * Looks up a struct ttm_base_object with the key @key. - * Also verifies that the object is visible to the application, by - * comparing the @tfile argument and checking the object shareable flag. - */ - -extern struct ttm_base_object *ttm_base_object_lookup(struct ttm_object_file - *tfile, uint32_t key); - -/** - * ttm_base_object_unref - * - * @p_base: Pointer to a pointer referencing a struct ttm_base_object. - * - * Decrements the base object refcount and clears the pointer pointed to by - * p_base. - */ - -extern void ttm_base_object_unref(struct ttm_base_object **p_base); - -/** - * ttm_ref_object_add. - * - * @tfile: A struct ttm_object_file representing the application owning the - * ref_object. - * @base: The base object to reference. - * @ref_type: The type of reference. - * @existed: Upon completion, indicates that an identical reference object - * already existed, and the refcount was upped on that object instead. - * - * Adding a ref object to a base object is basically like referencing the - * base object, but a user-space application holds the reference. When the - * file corresponding to @tfile is closed, all its reference objects are - * deleted. A reference object can have different types depending on what - * it's intended for. It can be refcounting to prevent object destruction, - * When user-space takes a lock, it can add a ref object to that lock to - * make sure the lock is released if the application dies. A ref object - * will hold a single reference on a base object. - */ -extern int ttm_ref_object_add(struct ttm_object_file *tfile, - struct ttm_base_object *base, - enum ttm_ref_type ref_type, bool *existed); -/** - * ttm_ref_object_base_unref - * - * @key: Key representing the base object. - * @ref_type: Ref type of the ref object to be dereferenced. - * - * Unreference a ref object with type @ref_type - * on the base object identified by @key. If there are no duplicate - * references, the ref object will be destroyed and the base object - * will be unreferenced. - */ -extern int ttm_ref_object_base_unref(struct ttm_object_file *tfile, - unsigned long key, - enum ttm_ref_type ref_type); - -/** - * ttm_object_file_init - initialize a struct ttm_object file - * - * @tdev: A struct ttm_object device this file is initialized on. - * @hash_order: Order of the hash table used to hold the reference objects. - * - * This is typically called by the file_ops::open function. - */ - -extern struct ttm_object_file *ttm_object_file_init(struct ttm_object_device - *tdev, - unsigned int hash_order); - -/** - * ttm_object_file_release - release data held by a ttm_object_file - * - * @p_tfile: Pointer to pointer to the ttm_object_file object to release. - * *p_tfile will be set to NULL by this function. - * - * Releases all data associated by a ttm_object_file. - * Typically called from file_ops::release. The caller must - * ensure that there are no concurrent users of tfile. - */ - -extern void ttm_object_file_release(struct ttm_object_file **p_tfile); - -/** - * ttm_object device init - initialize a struct ttm_object_device - * - * @hash_order: Order of hash table used to hash the base objects. - * - * This function is typically called on device initialization to prepare - * data structures needed for ttm base and ref objects. - */ - -extern struct ttm_object_device *ttm_object_device_init - (struct ttm_mem_global *mem_glob, unsigned int hash_order); - -/** - * ttm_object_device_release - release data held by a ttm_object_device - * - * @p_tdev: Pointer to pointer to the ttm_object_device object to release. - * *p_tdev will be set to NULL by this function. - * - * Releases all data associated by a ttm_object_device. - * Typically called from driver::unload before the destruction of the - * device private data structure. - */ - -extern void ttm_object_device_release(struct ttm_object_device **p_tdev); - -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_page_alloc.h b/ANDROID_3.4.5/include/drm/ttm/ttm_page_alloc.h deleted file mode 100644 index 5fe27400..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_page_alloc.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright (c) Red Hat Inc. - - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - * Authors: Dave Airlie <airlied@redhat.com> - * Jerome Glisse <jglisse@redhat.com> - */ -#ifndef TTM_PAGE_ALLOC -#define TTM_PAGE_ALLOC - -#include "ttm_bo_driver.h" -#include "ttm_memory.h" - -/** - * Initialize pool allocator. - */ -int ttm_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages); -/** - * Free pool allocator. - */ -void ttm_page_alloc_fini(void); - -/** - * ttm_pool_populate: - * - * @ttm: The struct ttm_tt to contain the backing pages. - * - * Add backing pages to all of @ttm - */ -extern int ttm_pool_populate(struct ttm_tt *ttm); - -/** - * ttm_pool_unpopulate: - * - * @ttm: The struct ttm_tt which to free backing pages. - * - * Free all pages of @ttm - */ -extern void ttm_pool_unpopulate(struct ttm_tt *ttm); - -/** - * Output the state of pools to debugfs file - */ -extern int ttm_page_alloc_debugfs(struct seq_file *m, void *data); - - -#ifdef CONFIG_SWIOTLB -/** - * Initialize pool allocator. - */ -int ttm_dma_page_alloc_init(struct ttm_mem_global *glob, unsigned max_pages); - -/** - * Free pool allocator. - */ -void ttm_dma_page_alloc_fini(void); - -/** - * Output the state of pools to debugfs file - */ -extern int ttm_dma_page_alloc_debugfs(struct seq_file *m, void *data); - -extern int ttm_dma_populate(struct ttm_dma_tt *ttm_dma, struct device *dev); -extern void ttm_dma_unpopulate(struct ttm_dma_tt *ttm_dma, struct device *dev); - -#else -static inline int ttm_dma_page_alloc_init(struct ttm_mem_global *glob, - unsigned max_pages) -{ - return -ENODEV; -} - -static inline void ttm_dma_page_alloc_fini(void) { return; } - -static inline int ttm_dma_page_alloc_debugfs(struct seq_file *m, void *data) -{ - return 0; -} -#endif - -#endif diff --git a/ANDROID_3.4.5/include/drm/ttm/ttm_placement.h b/ANDROID_3.4.5/include/drm/ttm/ttm_placement.h deleted file mode 100644 index c84ff153..00000000 --- a/ANDROID_3.4.5/include/drm/ttm/ttm_placement.h +++ /dev/null @@ -1,92 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ -/* - * Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com> - */ - -#ifndef _TTM_PLACEMENT_H_ -#define _TTM_PLACEMENT_H_ -/* - * Memory regions for data placement. - */ - -#define TTM_PL_SYSTEM 0 -#define TTM_PL_TT 1 -#define TTM_PL_VRAM 2 -#define TTM_PL_PRIV0 3 -#define TTM_PL_PRIV1 4 -#define TTM_PL_PRIV2 5 -#define TTM_PL_PRIV3 6 -#define TTM_PL_PRIV4 7 -#define TTM_PL_PRIV5 8 -#define TTM_PL_SWAPPED 15 - -#define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM) -#define TTM_PL_FLAG_TT (1 << TTM_PL_TT) -#define TTM_PL_FLAG_VRAM (1 << TTM_PL_VRAM) -#define TTM_PL_FLAG_PRIV0 (1 << TTM_PL_PRIV0) -#define TTM_PL_FLAG_PRIV1 (1 << TTM_PL_PRIV1) -#define TTM_PL_FLAG_PRIV2 (1 << TTM_PL_PRIV2) -#define TTM_PL_FLAG_PRIV3 (1 << TTM_PL_PRIV3) -#define TTM_PL_FLAG_PRIV4 (1 << TTM_PL_PRIV4) -#define TTM_PL_FLAG_PRIV5 (1 << TTM_PL_PRIV5) -#define TTM_PL_FLAG_SWAPPED (1 << TTM_PL_SWAPPED) -#define TTM_PL_MASK_MEM 0x0000FFFF - -/* - * Other flags that affects data placement. - * TTM_PL_FLAG_CACHED indicates cache-coherent mappings - * if available. - * TTM_PL_FLAG_SHARED means that another application may - * reference the buffer. - * TTM_PL_FLAG_NO_EVICT means that the buffer may never - * be evicted to make room for other buffers. - */ - -#define TTM_PL_FLAG_CACHED (1 << 16) -#define TTM_PL_FLAG_UNCACHED (1 << 17) -#define TTM_PL_FLAG_WC (1 << 18) -#define TTM_PL_FLAG_SHARED (1 << 20) -#define TTM_PL_FLAG_NO_EVICT (1 << 21) - -#define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \ - TTM_PL_FLAG_UNCACHED | \ - TTM_PL_FLAG_WC) - -#define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING) - -/* - * Access flags to be used for CPU- and GPU- mappings. - * The idea is that the TTM synchronization mechanism will - * allow concurrent READ access and exclusive write access. - * Currently GPU- and CPU accesses are exclusive. - */ - -#define TTM_ACCESS_READ (1 << 0) -#define TTM_ACCESS_WRITE (1 << 1) - -#endif diff --git a/ANDROID_3.4.5/include/drm/via_drm.h b/ANDROID_3.4.5/include/drm/via_drm.h deleted file mode 100644 index 79b3b6e0..00000000 --- a/ANDROID_3.4.5/include/drm/via_drm.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sub license, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - */ -#ifndef _VIA_DRM_H_ -#define _VIA_DRM_H_ - -#include "drm.h" - -/* WARNING: These defines must be the same as what the Xserver uses. - * if you change them, you must change the defines in the Xserver. - */ - -#ifndef _VIA_DEFINES_ -#define _VIA_DEFINES_ - -#ifndef __KERNEL__ -#include "via_drmclient.h" -#endif - -#define VIA_NR_SAREA_CLIPRECTS 8 -#define VIA_NR_XVMC_PORTS 10 -#define VIA_NR_XVMC_LOCKS 5 -#define VIA_MAX_CACHELINE_SIZE 64 -#define XVMCLOCKPTR(saPriv,lockNo) \ - ((volatile struct drm_hw_lock *)(((((unsigned long) (saPriv)->XvMCLockArea) + \ - (VIA_MAX_CACHELINE_SIZE - 1)) & \ - ~(VIA_MAX_CACHELINE_SIZE - 1)) + \ - VIA_MAX_CACHELINE_SIZE*(lockNo))) - -/* Each region is a minimum of 64k, and there are at most 64 of them. - */ -#define VIA_NR_TEX_REGIONS 64 -#define VIA_LOG_MIN_TEX_REGION_SIZE 16 -#endif - -#define VIA_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ -#define VIA_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ -#define VIA_UPLOAD_CTX 0x4 -#define VIA_UPLOAD_BUFFERS 0x8 -#define VIA_UPLOAD_TEX0 0x10 -#define VIA_UPLOAD_TEX1 0x20 -#define VIA_UPLOAD_CLIPRECTS 0x40 -#define VIA_UPLOAD_ALL 0xff - -/* VIA specific ioctls */ -#define DRM_VIA_ALLOCMEM 0x00 -#define DRM_VIA_FREEMEM 0x01 -#define DRM_VIA_AGP_INIT 0x02 -#define DRM_VIA_FB_INIT 0x03 -#define DRM_VIA_MAP_INIT 0x04 -#define DRM_VIA_DEC_FUTEX 0x05 -#define NOT_USED -#define DRM_VIA_DMA_INIT 0x07 -#define DRM_VIA_CMDBUFFER 0x08 -#define DRM_VIA_FLUSH 0x09 -#define DRM_VIA_PCICMD 0x0a -#define DRM_VIA_CMDBUF_SIZE 0x0b -#define NOT_USED -#define DRM_VIA_WAIT_IRQ 0x0d -#define DRM_VIA_DMA_BLIT 0x0e -#define DRM_VIA_BLIT_SYNC 0x0f - -#define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_ALLOCMEM, drm_via_mem_t) -#define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_FREEMEM, drm_via_mem_t) -#define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_AGP_INIT, drm_via_agp_t) -#define DRM_IOCTL_VIA_FB_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_FB_INIT, drm_via_fb_t) -#define DRM_IOCTL_VIA_MAP_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_MAP_INIT, drm_via_init_t) -#define DRM_IOCTL_VIA_DEC_FUTEX DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_DEC_FUTEX, drm_via_futex_t) -#define DRM_IOCTL_VIA_DMA_INIT DRM_IOWR(DRM_COMMAND_BASE + DRM_VIA_DMA_INIT, drm_via_dma_init_t) -#define DRM_IOCTL_VIA_CMDBUFFER DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_CMDBUFFER, drm_via_cmdbuffer_t) -#define DRM_IOCTL_VIA_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_VIA_FLUSH) -#define DRM_IOCTL_VIA_PCICMD DRM_IOW( DRM_COMMAND_BASE + DRM_VIA_PCICMD, drm_via_cmdbuffer_t) -#define DRM_IOCTL_VIA_CMDBUF_SIZE DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_CMDBUF_SIZE, \ - drm_via_cmdbuf_size_t) -#define DRM_IOCTL_VIA_WAIT_IRQ DRM_IOWR( DRM_COMMAND_BASE + DRM_VIA_WAIT_IRQ, drm_via_irqwait_t) -#define DRM_IOCTL_VIA_DMA_BLIT DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_DMA_BLIT, drm_via_dmablit_t) -#define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE + DRM_VIA_BLIT_SYNC, drm_via_blitsync_t) - -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -#define VIA_TEX_SETUP_SIZE 8 - -/* Flags for clear ioctl - */ -#define VIA_FRONT 0x1 -#define VIA_BACK 0x2 -#define VIA_DEPTH 0x4 -#define VIA_STENCIL 0x8 -#define VIA_MEM_VIDEO 0 /* matches drm constant */ -#define VIA_MEM_AGP 1 /* matches drm constant */ -#define VIA_MEM_SYSTEM 2 -#define VIA_MEM_MIXED 3 -#define VIA_MEM_UNKNOWN 4 - -typedef struct { - __u32 offset; - __u32 size; -} drm_via_agp_t; - -typedef struct { - __u32 offset; - __u32 size; -} drm_via_fb_t; - -typedef struct { - __u32 context; - __u32 type; - __u32 size; - unsigned long index; - unsigned long offset; -} drm_via_mem_t; - -typedef struct _drm_via_init { - enum { - VIA_INIT_MAP = 0x01, - VIA_CLEANUP_MAP = 0x02 - } func; - - unsigned long sarea_priv_offset; - unsigned long fb_offset; - unsigned long mmio_offset; - unsigned long agpAddr; -} drm_via_init_t; - -typedef struct _drm_via_futex { - enum { - VIA_FUTEX_WAIT = 0x00, - VIA_FUTEX_WAKE = 0X01 - } func; - __u32 ms; - __u32 lock; - __u32 val; -} drm_via_futex_t; - -typedef struct _drm_via_dma_init { - enum { - VIA_INIT_DMA = 0x01, - VIA_CLEANUP_DMA = 0x02, - VIA_DMA_INITIALIZED = 0x03 - } func; - - unsigned long offset; - unsigned long size; - unsigned long reg_pause_addr; -} drm_via_dma_init_t; - -typedef struct _drm_via_cmdbuffer { - char __user *buf; - unsigned long size; -} drm_via_cmdbuffer_t; - -/* Warning: If you change the SAREA structure you must change the Xserver - * structure as well */ - -typedef struct _drm_via_tex_region { - unsigned char next, prev; /* indices to form a circular LRU */ - unsigned char inUse; /* owned by a client, or free? */ - int age; /* tracked by clients to update local LRU's */ -} drm_via_tex_region_t; - -typedef struct _drm_via_sarea { - unsigned int dirty; - unsigned int nbox; - struct drm_clip_rect boxes[VIA_NR_SAREA_CLIPRECTS]; - drm_via_tex_region_t texList[VIA_NR_TEX_REGIONS + 1]; - int texAge; /* last time texture was uploaded */ - int ctxOwner; /* last context to upload state */ - int vertexPrim; - - /* - * Below is for XvMC. - * We want the lock integers alone on, and aligned to, a cache line. - * Therefore this somewhat strange construct. - */ - - char XvMCLockArea[VIA_MAX_CACHELINE_SIZE * (VIA_NR_XVMC_LOCKS + 1)]; - - unsigned int XvMCDisplaying[VIA_NR_XVMC_PORTS]; - unsigned int XvMCSubPicOn[VIA_NR_XVMC_PORTS]; - unsigned int XvMCCtxNoGrabbed; /* Last context to hold decoder */ - - /* Used by the 3d driver only at this point, for pageflipping: - */ - unsigned int pfCurrentOffset; -} drm_via_sarea_t; - -typedef struct _drm_via_cmdbuf_size { - enum { - VIA_CMDBUF_SPACE = 0x01, - VIA_CMDBUF_LAG = 0x02 - } func; - int wait; - __u32 size; -} drm_via_cmdbuf_size_t; - -typedef enum { - VIA_IRQ_ABSOLUTE = 0x0, - VIA_IRQ_RELATIVE = 0x1, - VIA_IRQ_SIGNAL = 0x10000000, - VIA_IRQ_FORCE_SEQUENCE = 0x20000000 -} via_irq_seq_type_t; - -#define VIA_IRQ_FLAGS_MASK 0xF0000000 - -enum drm_via_irqs { - drm_via_irq_hqv0 = 0, - drm_via_irq_hqv1, - drm_via_irq_dma0_dd, - drm_via_irq_dma0_td, - drm_via_irq_dma1_dd, - drm_via_irq_dma1_td, - drm_via_irq_num -}; - -struct drm_via_wait_irq_request { - unsigned irq; - via_irq_seq_type_t type; - __u32 sequence; - __u32 signal; -}; - -typedef union drm_via_irqwait { - struct drm_via_wait_irq_request request; - struct drm_wait_vblank_reply reply; -} drm_via_irqwait_t; - -typedef struct drm_via_blitsync { - __u32 sync_handle; - unsigned engine; -} drm_via_blitsync_t; - -/* - * Below,"flags" is currently unused but will be used for possible future - * extensions like kernel space bounce buffers for bad alignments and - * blit engine busy-wait polling for better latency in the absence of - * interrupts. - */ - -typedef struct drm_via_dmablit { - __u32 num_lines; - __u32 line_length; - - __u32 fb_addr; - __u32 fb_stride; - - unsigned char *mem_addr; - __u32 mem_stride; - - __u32 flags; - int to_fb; - - drm_via_blitsync_t sync; -} drm_via_dmablit_t; - -struct via_file_private { - struct list_head obj_list; -}; - -#endif /* _VIA_DRM_H_ */ diff --git a/ANDROID_3.4.5/include/drm/vmwgfx_drm.h b/ANDROID_3.4.5/include/drm/vmwgfx_drm.h deleted file mode 100644 index bcb0912a..00000000 --- a/ANDROID_3.4.5/include/drm/vmwgfx_drm.h +++ /dev/null @@ -1,790 +0,0 @@ -/************************************************************************** - * - * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#ifndef __VMWGFX_DRM_H__ -#define __VMWGFX_DRM_H__ - -#define DRM_VMW_MAX_SURFACE_FACES 6 -#define DRM_VMW_MAX_MIP_LEVELS 24 - - -#define DRM_VMW_GET_PARAM 0 -#define DRM_VMW_ALLOC_DMABUF 1 -#define DRM_VMW_UNREF_DMABUF 2 -#define DRM_VMW_CURSOR_BYPASS 3 -/* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ -#define DRM_VMW_CONTROL_STREAM 4 -#define DRM_VMW_CLAIM_STREAM 5 -#define DRM_VMW_UNREF_STREAM 6 -/* guarded by DRM_VMW_PARAM_3D == 1 */ -#define DRM_VMW_CREATE_CONTEXT 7 -#define DRM_VMW_UNREF_CONTEXT 8 -#define DRM_VMW_CREATE_SURFACE 9 -#define DRM_VMW_UNREF_SURFACE 10 -#define DRM_VMW_REF_SURFACE 11 -#define DRM_VMW_EXECBUF 12 -#define DRM_VMW_GET_3D_CAP 13 -#define DRM_VMW_FENCE_WAIT 14 -#define DRM_VMW_FENCE_SIGNALED 15 -#define DRM_VMW_FENCE_UNREF 16 -#define DRM_VMW_FENCE_EVENT 17 -#define DRM_VMW_PRESENT 18 -#define DRM_VMW_PRESENT_READBACK 19 -#define DRM_VMW_UPDATE_LAYOUT 20 - -/*************************************************************************/ -/** - * DRM_VMW_GET_PARAM - get device information. - * - * DRM_VMW_PARAM_FIFO_OFFSET: - * Offset to use to map the first page of the FIFO read-only. - * The fifo is mapped using the mmap() system call on the drm device. - * - * DRM_VMW_PARAM_OVERLAY_IOCTL: - * Does the driver support the overlay ioctl. - */ - -#define DRM_VMW_PARAM_NUM_STREAMS 0 -#define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 -#define DRM_VMW_PARAM_3D 2 -#define DRM_VMW_PARAM_HW_CAPS 3 -#define DRM_VMW_PARAM_FIFO_CAPS 4 -#define DRM_VMW_PARAM_MAX_FB_SIZE 5 -#define DRM_VMW_PARAM_FIFO_HW_VERSION 6 - -/** - * struct drm_vmw_getparam_arg - * - * @value: Returned value. //Out - * @param: Parameter to query. //In. - * - * Argument to the DRM_VMW_GET_PARAM Ioctl. - */ - -struct drm_vmw_getparam_arg { - uint64_t value; - uint32_t param; - uint32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_CREATE_CONTEXT - Create a host context. - * - * Allocates a device unique context id, and queues a create context command - * for the host. Does not wait for host completion. - */ - -/** - * struct drm_vmw_context_arg - * - * @cid: Device unique context ID. - * - * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. - * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. - */ - -struct drm_vmw_context_arg { - int32_t cid; - uint32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_UNREF_CONTEXT - Create a host context. - * - * Frees a global context id, and queues a destroy host command for the host. - * Does not wait for host completion. The context ID can be used directly - * in the command stream and shows up as the same context ID on the host. - */ - -/*************************************************************************/ -/** - * DRM_VMW_CREATE_SURFACE - Create a host suface. - * - * Allocates a device unique surface id, and queues a create surface command - * for the host. Does not wait for host completion. The surface ID can be - * used directly in the command stream and shows up as the same surface - * ID on the host. - */ - -/** - * struct drm_wmv_surface_create_req - * - * @flags: Surface flags as understood by the host. - * @format: Surface format as understood by the host. - * @mip_levels: Number of mip levels for each face. - * An unused face should have 0 encoded. - * @size_addr: Address of a user-space array of sruct drm_vmw_size - * cast to an uint64_t for 32-64 bit compatibility. - * The size of the array should equal the total number of mipmap levels. - * @shareable: Boolean whether other clients (as identified by file descriptors) - * may reference this surface. - * @scanout: Boolean whether the surface is intended to be used as a - * scanout. - * - * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. - * Output data from the DRM_VMW_REF_SURFACE Ioctl. - */ - -struct drm_vmw_surface_create_req { - uint32_t flags; - uint32_t format; - uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; - uint64_t size_addr; - int32_t shareable; - int32_t scanout; -}; - -/** - * struct drm_wmv_surface_arg - * - * @sid: Surface id of created surface or surface to destroy or reference. - * - * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. - * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. - * Input argument to the DRM_VMW_REF_SURFACE Ioctl. - */ - -struct drm_vmw_surface_arg { - int32_t sid; - uint32_t pad64; -}; - -/** - * struct drm_vmw_size ioctl. - * - * @width - mip level width - * @height - mip level height - * @depth - mip level depth - * - * Description of a mip level. - * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. - */ - -struct drm_vmw_size { - uint32_t width; - uint32_t height; - uint32_t depth; - uint32_t pad64; -}; - -/** - * union drm_vmw_surface_create_arg - * - * @rep: Output data as described above. - * @req: Input data as described above. - * - * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. - */ - -union drm_vmw_surface_create_arg { - struct drm_vmw_surface_arg rep; - struct drm_vmw_surface_create_req req; -}; - -/*************************************************************************/ -/** - * DRM_VMW_REF_SURFACE - Reference a host surface. - * - * Puts a reference on a host surface with a give sid, as previously - * returned by the DRM_VMW_CREATE_SURFACE ioctl. - * A reference will make sure the surface isn't destroyed while we hold - * it and will allow the calling client to use the surface ID in the command - * stream. - * - * On successful return, the Ioctl returns the surface information given - * in the DRM_VMW_CREATE_SURFACE ioctl. - */ - -/** - * union drm_vmw_surface_reference_arg - * - * @rep: Output data as described above. - * @req: Input data as described above. - * - * Argument to the DRM_VMW_REF_SURFACE Ioctl. - */ - -union drm_vmw_surface_reference_arg { - struct drm_vmw_surface_create_req rep; - struct drm_vmw_surface_arg req; -}; - -/*************************************************************************/ -/** - * DRM_VMW_UNREF_SURFACE - Unreference a host surface. - * - * Clear a reference previously put on a host surface. - * When all references are gone, including the one implicitly placed - * on creation, - * a destroy surface command will be queued for the host. - * Does not wait for completion. - */ - -/*************************************************************************/ -/** - * DRM_VMW_EXECBUF - * - * Submit a command buffer for execution on the host, and return a - * fence seqno that when signaled, indicates that the command buffer has - * executed. - */ - -/** - * struct drm_vmw_execbuf_arg - * - * @commands: User-space address of a command buffer cast to an uint64_t. - * @command-size: Size in bytes of the command buffer. - * @throttle-us: Sleep until software is less than @throttle_us - * microseconds ahead of hardware. The driver may round this value - * to the nearest kernel tick. - * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an - * uint64_t. - * @version: Allows expanding the execbuf ioctl parameters without breaking - * backwards compatibility, since user-space will always tell the kernel - * which version it uses. - * @flags: Execbuf flags. None currently. - * - * Argument to the DRM_VMW_EXECBUF Ioctl. - */ - -#define DRM_VMW_EXECBUF_VERSION 1 - -struct drm_vmw_execbuf_arg { - uint64_t commands; - uint32_t command_size; - uint32_t throttle_us; - uint64_t fence_rep; - uint32_t version; - uint32_t flags; -}; - -/** - * struct drm_vmw_fence_rep - * - * @handle: Fence object handle for fence associated with a command submission. - * @mask: Fence flags relevant for this fence object. - * @seqno: Fence sequence number in fifo. A fence object with a lower - * seqno will signal the EXEC flag before a fence object with a higher - * seqno. This can be used by user-space to avoid kernel calls to determine - * whether a fence has signaled the EXEC flag. Note that @seqno will - * wrap at 32-bit. - * @passed_seqno: The highest seqno number processed by the hardware - * so far. This can be used to mark user-space fence objects as signaled, and - * to determine whether a fence seqno might be stale. - * @error: This member should've been set to -EFAULT on submission. - * The following actions should be take on completion: - * error == -EFAULT: Fence communication failed. The host is synchronized. - * Use the last fence id read from the FIFO fence register. - * error != 0 && error != -EFAULT: - * Fence submission failed. The host is synchronized. Use the fence_seq member. - * error == 0: All is OK, The host may not be synchronized. - * Use the fence_seq member. - * - * Input / Output data to the DRM_VMW_EXECBUF Ioctl. - */ - -struct drm_vmw_fence_rep { - uint32_t handle; - uint32_t mask; - uint32_t seqno; - uint32_t passed_seqno; - uint32_t pad64; - int32_t error; -}; - -/*************************************************************************/ -/** - * DRM_VMW_ALLOC_DMABUF - * - * Allocate a DMA buffer that is visible also to the host. - * NOTE: The buffer is - * identified by a handle and an offset, which are private to the guest, but - * useable in the command stream. The guest kernel may translate these - * and patch up the command stream accordingly. In the future, the offset may - * be zero at all times, or it may disappear from the interface before it is - * fixed. - * - * The DMA buffer may stay user-space mapped in the guest at all times, - * and is thus suitable for sub-allocation. - * - * DMA buffers are mapped using the mmap() syscall on the drm device. - */ - -/** - * struct drm_vmw_alloc_dmabuf_req - * - * @size: Required minimum size of the buffer. - * - * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. - */ - -struct drm_vmw_alloc_dmabuf_req { - uint32_t size; - uint32_t pad64; -}; - -/** - * struct drm_vmw_dmabuf_rep - * - * @map_handle: Offset to use in the mmap() call used to map the buffer. - * @handle: Handle unique to this buffer. Used for unreferencing. - * @cur_gmr_id: GMR id to use in the command stream when this buffer is - * referenced. See not above. - * @cur_gmr_offset: Offset to use in the command stream when this buffer is - * referenced. See note above. - * - * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. - */ - -struct drm_vmw_dmabuf_rep { - uint64_t map_handle; - uint32_t handle; - uint32_t cur_gmr_id; - uint32_t cur_gmr_offset; - uint32_t pad64; -}; - -/** - * union drm_vmw_dmabuf_arg - * - * @req: Input data as described above. - * @rep: Output data as described above. - * - * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. - */ - -union drm_vmw_alloc_dmabuf_arg { - struct drm_vmw_alloc_dmabuf_req req; - struct drm_vmw_dmabuf_rep rep; -}; - -/*************************************************************************/ -/** - * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. - * - */ - -/** - * struct drm_vmw_unref_dmabuf_arg - * - * @handle: Handle indicating what buffer to free. Obtained from the - * DRM_VMW_ALLOC_DMABUF Ioctl. - * - * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. - */ - -struct drm_vmw_unref_dmabuf_arg { - uint32_t handle; - uint32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. - * - * This IOCTL controls the overlay units of the svga device. - * The SVGA overlay units does not work like regular hardware units in - * that they do not automaticaly read back the contents of the given dma - * buffer. But instead only read back for each call to this ioctl, and - * at any point between this call being made and a following call that - * either changes the buffer or disables the stream. - */ - -/** - * struct drm_vmw_rect - * - * Defines a rectangle. Used in the overlay ioctl to define - * source and destination rectangle. - */ - -struct drm_vmw_rect { - int32_t x; - int32_t y; - uint32_t w; - uint32_t h; -}; - -/** - * struct drm_vmw_control_stream_arg - * - * @stream_id: Stearm to control - * @enabled: If false all following arguments are ignored. - * @handle: Handle to buffer for getting data from. - * @format: Format of the overlay as understood by the host. - * @width: Width of the overlay. - * @height: Height of the overlay. - * @size: Size of the overlay in bytes. - * @pitch: Array of pitches, the two last are only used for YUV12 formats. - * @offset: Offset from start of dma buffer to overlay. - * @src: Source rect, must be within the defined area above. - * @dst: Destination rect, x and y may be negative. - * - * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. - */ - -struct drm_vmw_control_stream_arg { - uint32_t stream_id; - uint32_t enabled; - - uint32_t flags; - uint32_t color_key; - - uint32_t handle; - uint32_t offset; - int32_t format; - uint32_t size; - uint32_t width; - uint32_t height; - uint32_t pitch[3]; - - uint32_t pad64; - struct drm_vmw_rect src; - struct drm_vmw_rect dst; -}; - -/*************************************************************************/ -/** - * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. - * - */ - -#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) -#define DRM_VMW_CURSOR_BYPASS_FLAGS (1) - -/** - * struct drm_vmw_cursor_bypass_arg - * - * @flags: Flags. - * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. - * @xpos: X position of cursor. - * @ypos: Y position of cursor. - * @xhot: X hotspot. - * @yhot: Y hotspot. - * - * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. - */ - -struct drm_vmw_cursor_bypass_arg { - uint32_t flags; - uint32_t crtc_id; - int32_t xpos; - int32_t ypos; - int32_t xhot; - int32_t yhot; -}; - -/*************************************************************************/ -/** - * DRM_VMW_CLAIM_STREAM - Claim a single stream. - */ - -/** - * struct drm_vmw_context_arg - * - * @stream_id: Device unique context ID. - * - * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. - * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. - */ - -struct drm_vmw_stream_arg { - uint32_t stream_id; - uint32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_UNREF_STREAM - Unclaim a stream. - * - * Return a single stream that was claimed by this process. Also makes - * sure that the stream has been stopped. - */ - -/*************************************************************************/ -/** - * DRM_VMW_GET_3D_CAP - * - * Read 3D capabilities from the FIFO - * - */ - -/** - * struct drm_vmw_get_3d_cap_arg - * - * @buffer: Pointer to a buffer for capability data, cast to an uint64_t - * @size: Max size to copy - * - * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL - * ioctls. - */ - -struct drm_vmw_get_3d_cap_arg { - uint64_t buffer; - uint32_t max_size; - uint32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_FENCE_WAIT - * - * Waits for a fence object to signal. The wait is interruptible, so that - * signals may be delivered during the interrupt. The wait may timeout, - * in which case the calls returns -EBUSY. If the wait is restarted, - * that is restarting without resetting @cookie_valid to zero, - * the timeout is computed from the first call. - * - * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait - * on: - * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command - * stream - * have executed. - * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish - * commands - * in the buffer given to the EXECBUF ioctl returning the fence object handle - * are available to user-space. - * - * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the - * fenc wait ioctl returns 0, the fence object has been unreferenced after - * the wait. - */ - -#define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) -#define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) - -#define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) - -/** - * struct drm_vmw_fence_wait_arg - * - * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. - * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. - * @kernel_cookie: Set to 0 on first call. Left alone on restart. - * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. - * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick - * before returning. - * @flags: Fence flags to wait on. - * @wait_options: Options that control the behaviour of the wait ioctl. - * - * Input argument to the DRM_VMW_FENCE_WAIT ioctl. - */ - -struct drm_vmw_fence_wait_arg { - uint32_t handle; - int32_t cookie_valid; - uint64_t kernel_cookie; - uint64_t timeout_us; - int32_t lazy; - int32_t flags; - int32_t wait_options; - int32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_FENCE_SIGNALED - * - * Checks if a fence object is signaled.. - */ - -/** - * struct drm_vmw_fence_signaled_arg - * - * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. - * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl - * @signaled: Out: Flags signaled. - * @sequence: Out: Highest sequence passed so far. Can be used to signal the - * EXEC flag of user-space fence objects. - * - * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF - * ioctls. - */ - -struct drm_vmw_fence_signaled_arg { - uint32_t handle; - uint32_t flags; - int32_t signaled; - uint32_t passed_seqno; - uint32_t signaled_flags; - uint32_t pad64; -}; - -/*************************************************************************/ -/** - * DRM_VMW_FENCE_UNREF - * - * Unreferences a fence object, and causes it to be destroyed if there are no - * other references to it. - * - */ - -/** - * struct drm_vmw_fence_arg - * - * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. - * - * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. - */ - -struct drm_vmw_fence_arg { - uint32_t handle; - uint32_t pad64; -}; - - -/*************************************************************************/ -/** - * DRM_VMW_FENCE_EVENT - * - * Queues an event on a fence to be delivered on the drm character device - * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. - * Optionally the approximate time when the fence signaled is - * given by the event. - */ - -/* - * The event type - */ -#define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 - -struct drm_vmw_event_fence { - struct drm_event base; - uint64_t user_data; - uint32_t tv_sec; - uint32_t tv_usec; -}; - -/* - * Flags that may be given to the command. - */ -/* Request fence signaled time on the event. */ -#define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) - -/** - * struct drm_vmw_fence_event_arg - * - * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if - * the fence is not supposed to be referenced by user-space. - * @user_info: Info to be delivered with the event. - * @handle: Attach the event to this fence only. - * @flags: A set of flags as defined above. - */ -struct drm_vmw_fence_event_arg { - uint64_t fence_rep; - uint64_t user_data; - uint32_t handle; - uint32_t flags; -}; - - -/*************************************************************************/ -/** - * DRM_VMW_PRESENT - * - * Executes an SVGA present on a given fb for a given surface. The surface - * is placed on the framebuffer. Cliprects are given relative to the given - * point (the point disignated by dest_{x|y}). - * - */ - -/** - * struct drm_vmw_present_arg - * @fb_id: framebuffer id to present / read back from. - * @sid: Surface id to present from. - * @dest_x: X placement coordinate for surface. - * @dest_y: Y placement coordinate for surface. - * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. - * @num_clips: Number of cliprects given relative to the framebuffer origin, - * in the same coordinate space as the frame buffer. - * @pad64: Unused 64-bit padding. - * - * Input argument to the DRM_VMW_PRESENT ioctl. - */ - -struct drm_vmw_present_arg { - uint32_t fb_id; - uint32_t sid; - int32_t dest_x; - int32_t dest_y; - uint64_t clips_ptr; - uint32_t num_clips; - uint32_t pad64; -}; - - -/*************************************************************************/ -/** - * DRM_VMW_PRESENT_READBACK - * - * Executes an SVGA present readback from a given fb to the dma buffer - * currently bound as the fb. If there is no dma buffer bound to the fb, - * an error will be returned. - * - */ - -/** - * struct drm_vmw_present_arg - * @fb_id: fb_id to present / read back from. - * @num_clips: Number of cliprects. - * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. - * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t. - * If this member is NULL, then the ioctl should not return a fence. - */ - -struct drm_vmw_present_readback_arg { - uint32_t fb_id; - uint32_t num_clips; - uint64_t clips_ptr; - uint64_t fence_rep; -}; - -/*************************************************************************/ -/** - * DRM_VMW_UPDATE_LAYOUT - Update layout - * - * Updates the preferred modes and connection status for connectors. The - * command consists of one drm_vmw_update_layout_arg pointing to an array - * of num_outputs drm_vmw_rect's. - */ - -/** - * struct drm_vmw_update_layout_arg - * - * @num_outputs: number of active connectors - * @rects: pointer to array of drm_vmw_rect cast to an uint64_t - * - * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. - */ -struct drm_vmw_update_layout_arg { - uint32_t num_outputs; - uint32_t pad64; - uint64_t rects; -}; - -#endif |