diff options
Diffstat (limited to 'ANDROID_3.4.5/arch/powerpc/platforms/8xx')
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/Kconfig | 184 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/Makefile | 9 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/adder875.c | 118 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/ep88xc.c | 175 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/m8xx_setup.c | 255 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads.h | 47 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads_setup.c | 149 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads.h | 49 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads_setup.c | 287 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc8xx.h | 21 | ||||
| -rw-r--r-- | ANDROID_3.4.5/arch/powerpc/platforms/8xx/tqm8xx_setup.c | 154 |
11 files changed, 0 insertions, 1448 deletions
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/Kconfig b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/Kconfig deleted file mode 100644 index 1fb0b3cd..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/Kconfig +++ /dev/null @@ -1,184 +0,0 @@ -config FADS - bool - -config CPM1 - bool - select CPM - -choice - prompt "8xx Machine Type" - depends on PPC_8xx - depends on 8xx - default MPC885ADS - -config MPC8XXFADS - bool "FADS" - select FADS - -config MPC86XADS - bool "MPC86XADS" - select CPM1 - help - MPC86x Application Development System by Freescale Semiconductor. - The MPC86xADS is meant to serve as a platform for s/w and h/w - development around the MPC86X processor families. - -config MPC885ADS - bool "MPC885ADS" - select CPM1 - select OF_DYNAMIC - help - Freescale Semiconductor MPC885 Application Development System (ADS). - Also known as DUET. - The MPC885ADS is meant to serve as a platform for s/w and h/w - development around the MPC885 processor family. - -config PPC_EP88XC - bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)" - select CPM1 - help - This enables support for the Embedded Planet EP88xC board. - - This board is also resold by Freescale as the QUICCStart - MPC885 Evaluation System and/or the CWH-PPC-885XN-VE. - -config PPC_ADDER875 - bool "Analogue & Micro Adder 875" - select CPM1 - select REDBOOT - help - This enables support for the Analogue & Micro Adder 875 - board. - -config TQM8XX - bool "TQM8XX" - select CPM1 - help - support for the mpc8xx based boards from TQM. - -endchoice - -menu "Freescale Ethernet driver platform-specific options" - depends on (FS_ENET && MPC885ADS) - - config MPC8xx_SECOND_ETH - bool "Second Ethernet channel" - depends on MPC885ADS - default y - help - This enables support for second Ethernet on MPC885ADS and MPC86xADS boards. - The latter will use SCC1, for 885ADS you can select it below. - - choice - prompt "Second Ethernet channel" - depends on MPC8xx_SECOND_ETH - default MPC8xx_SECOND_ETH_FEC2 - - config MPC8xx_SECOND_ETH_FEC2 - bool "FEC2" - depends on MPC885ADS - help - Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2 - (often 2-nd UART) will not work if this is enabled. - - config MPC8xx_SECOND_ETH_SCC3 - bool "SCC3" - depends on MPC885ADS - help - Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1 - (often 1-nd UART) will not work if this is enabled. - - endchoice - -endmenu - -# -# MPC8xx Communication options -# - -menu "MPC8xx CPM Options" - depends on 8xx - -# This doesn't really belong here, but it is convenient to ask -# 8xx specific questions. -comment "Generic MPC8xx Options" - -config 8xx_COPYBACK - bool "Copy-Back Data Cache (else Writethrough)" - help - Saying Y here will cause the cache on an MPC8xx processor to be used - in Copy-Back mode. If you say N here, it is used in Writethrough - mode. - - If in doubt, say Y here. - -config 8xx_GPIO - bool "GPIO API Support" - select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB - help - Saying Y here will cause the ports on an MPC8xx processor to be used - with the GPIO API. If you say N here, the kernel needs less memory. - - If in doubt, say Y here. - -config 8xx_CPU6 - bool "CPU6 Silicon Errata (860 Pre Rev. C)" - help - MPC860 CPUs, prior to Rev C have some bugs in the silicon, which - require workarounds for Linux (and most other OSes to work). If you - get a BUG() very early in boot, this might fix the problem. For - more details read the document entitled "MPC860 Family Device Errata - Reference" on Freescale's website. This option also incurs a - performance hit. - - If in doubt, say N here. - -config 8xx_CPU15 - bool "CPU15 Silicon Errata" - default y - help - This enables a workaround for erratum CPU15 on MPC8xx chips. - This bug can cause incorrect code execution under certain - circumstances. This workaround adds some overhead (a TLB miss - every time execution crosses a page boundary), and you may wish - to disable it if you have worked around the bug in the compiler - (by not placing conditional branches or branches to LR or CTR - in the last word of a page, with a target of the last cache - line in the next page), or if you have used some other - workaround. - - If in doubt, say Y here. - -choice - prompt "Microcode patch selection" - default NO_UCODE_PATCH - help - Help not implemented yet, coming soon. - -config NO_UCODE_PATCH - bool "None" - -config USB_SOF_UCODE_PATCH - bool "USB SOF patch" - help - Help not implemented yet, coming soon. - -config I2C_SPI_UCODE_PATCH - bool "I2C/SPI relocation patch" - help - Help not implemented yet, coming soon. - -config I2C_SPI_SMC1_UCODE_PATCH - bool "I2C/SPI/SMC1 relocation patch" - help - Help not implemented yet, coming soon. - -endchoice - -config UCODE_PATCH - bool - default y - depends on !NO_UCODE_PATCH - -endmenu diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/Makefile b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/Makefile deleted file mode 100644 index 76a81c33..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# -# Makefile for the PowerPC 8xx linux kernel. -# -obj-$(CONFIG_PPC_8xx) += m8xx_setup.o -obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o -obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o -obj-$(CONFIG_PPC_EP88XC) += ep88xc.o -obj-$(CONFIG_PPC_ADDER875) += adder875.o -obj-$(CONFIG_TQM8XX) += tqm8xx_setup.o diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/adder875.c b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/adder875.c deleted file mode 100644 index 82363e98..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/adder875.c +++ /dev/null @@ -1,118 +0,0 @@ -/* Analogue & Micro Adder MPC875 board support - * - * Author: Scott Wood <scottwood@freescale.com> - * - * Copyright (c) 2007 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/fs_enet_pd.h> -#include <linux/of_platform.h> - -#include <asm/time.h> -#include <asm/machdep.h> -#include <asm/cpm1.h> -#include <asm/fs_pd.h> -#include <asm/udbg.h> -#include <asm/prom.h> - -#include "mpc8xx.h" - -struct cpm_pin { - int port, pin, flags; -}; - -static __initdata struct cpm_pin adder875_pins[] = { - /* SMC1 */ - {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ - - /* MII1 */ - {CPM_PORTA, 0, CPM_PIN_INPUT}, - {CPM_PORTA, 1, CPM_PIN_INPUT}, - {CPM_PORTA, 2, CPM_PIN_INPUT}, - {CPM_PORTA, 3, CPM_PIN_INPUT}, - {CPM_PORTA, 4, CPM_PIN_OUTPUT}, - {CPM_PORTA, 10, CPM_PIN_OUTPUT}, - {CPM_PORTA, 11, CPM_PIN_OUTPUT}, - {CPM_PORTB, 19, CPM_PIN_INPUT}, - {CPM_PORTB, 31, CPM_PIN_INPUT}, - {CPM_PORTC, 12, CPM_PIN_INPUT}, - {CPM_PORTC, 13, CPM_PIN_INPUT}, - {CPM_PORTE, 30, CPM_PIN_OUTPUT}, - {CPM_PORTE, 31, CPM_PIN_OUTPUT}, - - /* MII2 */ - {CPM_PORTE, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 16, CPM_PIN_OUTPUT}, - {CPM_PORTE, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 21, CPM_PIN_OUTPUT}, - {CPM_PORTE, 22, CPM_PIN_OUTPUT}, - {CPM_PORTE, 23, CPM_PIN_OUTPUT}, - {CPM_PORTE, 24, CPM_PIN_OUTPUT}, - {CPM_PORTE, 25, CPM_PIN_OUTPUT}, - {CPM_PORTE, 26, CPM_PIN_OUTPUT}, - {CPM_PORTE, 27, CPM_PIN_OUTPUT}, - {CPM_PORTE, 28, CPM_PIN_OUTPUT}, - {CPM_PORTE, 29, CPM_PIN_OUTPUT}, -}; - -static void __init init_ioports(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(adder875_pins); i++) { - const struct cpm_pin *pin = &adder875_pins[i]; - cpm1_set_pin(pin->port, pin->pin, pin->flags); - } - - cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); - - /* Set FEC1 and FEC2 to MII mode */ - clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); -} - -static void __init adder875_setup(void) -{ - cpm_reset(); - init_ioports(); -} - -static int __init adder875_probe(void) -{ - unsigned long root = of_get_flat_dt_root(); - return of_flat_dt_is_compatible(root, "analogue-and-micro,adder875"); -} - -static __initdata struct of_device_id of_bus_ids[] = { - { .compatible = "simple-bus", }, - {}, -}; - -static int __init declare_of_platform_devices(void) -{ - of_platform_bus_probe(NULL, of_bus_ids, NULL); - return 0; -} -machine_device_initcall(adder875, declare_of_platform_devices); - -define_machine(adder875) { - .name = "Adder MPC875", - .probe = adder875_probe, - .setup_arch = adder875_setup, - .init_IRQ = mpc8xx_pics_init, - .get_irq = mpc8xx_get_irq, - .restart = mpc8xx_restart, - .calibrate_decr = generic_calibrate_decr, - .set_rtc_time = mpc8xx_set_rtc_time, - .get_rtc_time = mpc8xx_get_rtc_time, - .progress = udbg_progress, -}; diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/ep88xc.c b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/ep88xc.c deleted file mode 100644 index 7d9ac604..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/ep88xc.c +++ /dev/null @@ -1,175 +0,0 @@ -/* - * Platform setup for the Embedded Planet EP88xC board - * - * Author: Scott Wood <scottwood@freescale.com> - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include <linux/init.h> -#include <linux/of_platform.h> - -#include <asm/machdep.h> -#include <asm/io.h> -#include <asm/udbg.h> -#include <asm/cpm1.h> - -#include "mpc8xx.h" - -struct cpm_pin { - int port, pin, flags; -}; - -static struct cpm_pin ep88xc_pins[] = { - /* SMC1 */ - {1, 24, CPM_PIN_INPUT}, /* RX */ - {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ - - /* SCC2 */ - {0, 12, CPM_PIN_INPUT}, /* TX */ - {0, 13, CPM_PIN_INPUT}, /* RX */ - {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */ - {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */ - {2, 14, CPM_PIN_INPUT}, /* RTS */ - - /* MII1 */ - {0, 0, CPM_PIN_INPUT}, - {0, 1, CPM_PIN_INPUT}, - {0, 2, CPM_PIN_INPUT}, - {0, 3, CPM_PIN_INPUT}, - {0, 4, CPM_PIN_OUTPUT}, - {0, 10, CPM_PIN_OUTPUT}, - {0, 11, CPM_PIN_OUTPUT}, - {1, 19, CPM_PIN_INPUT}, - {1, 31, CPM_PIN_INPUT}, - {2, 12, CPM_PIN_INPUT}, - {2, 13, CPM_PIN_INPUT}, - {3, 8, CPM_PIN_INPUT}, - {4, 30, CPM_PIN_OUTPUT}, - {4, 31, CPM_PIN_OUTPUT}, - - /* MII2 */ - {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {4, 16, CPM_PIN_OUTPUT}, - {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {4, 21, CPM_PIN_OUTPUT}, - {4, 22, CPM_PIN_OUTPUT}, - {4, 23, CPM_PIN_OUTPUT}, - {4, 24, CPM_PIN_OUTPUT}, - {4, 25, CPM_PIN_OUTPUT}, - {4, 26, CPM_PIN_OUTPUT}, - {4, 27, CPM_PIN_OUTPUT}, - {4, 28, CPM_PIN_OUTPUT}, - {4, 29, CPM_PIN_OUTPUT}, - - /* USB */ - {0, 6, CPM_PIN_INPUT}, /* CLK2 */ - {0, 14, CPM_PIN_INPUT}, /* USBOE */ - {0, 15, CPM_PIN_INPUT}, /* USBRXD */ - {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */ - {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */ - {2, 10, CPM_PIN_INPUT}, /* USBRXN */ - {2, 11, CPM_PIN_INPUT}, /* USBRXP */ - - /* Misc */ - {1, 26, CPM_PIN_INPUT}, /* BRGO2 */ - {1, 27, CPM_PIN_INPUT}, /* BRGO1 */ -}; - -static void __init init_ioports(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) { - struct cpm_pin *pin = &ep88xc_pins[i]; - cpm1_set_pin(pin->port, pin->pin, pin->flags); - } - - cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); - cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */ - cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX); - cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX); - cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX); -} - -static u8 __iomem *ep88xc_bcsr; - -#define BCSR7_SCC2_ENABLE 0x10 - -#define BCSR8_PHY1_ENABLE 0x80 -#define BCSR8_PHY1_POWER 0x40 -#define BCSR8_PHY2_ENABLE 0x20 -#define BCSR8_PHY2_POWER 0x10 - -#define BCSR9_USB_ENABLE 0x80 -#define BCSR9_USB_POWER 0x40 -#define BCSR9_USB_HOST 0x20 -#define BCSR9_USB_FULL_SPEED_TARGET 0x10 - -static void __init ep88xc_setup_arch(void) -{ - struct device_node *np; - - cpm_reset(); - init_ioports(); - - np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr"); - if (!np) { - printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n"); - return; - } - - ep88xc_bcsr = of_iomap(np, 0); - of_node_put(np); - - if (!ep88xc_bcsr) { - printk(KERN_CRIT "Could not remap BCSR\n"); - return; - } - - setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE); - setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER | - BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER); -} - -static int __init ep88xc_probe(void) -{ - unsigned long root = of_get_flat_dt_root(); - return of_flat_dt_is_compatible(root, "fsl,ep88xc"); -} - -static struct of_device_id __initdata of_bus_ids[] = { - { .name = "soc", }, - { .name = "cpm", }, - { .name = "localbus", }, - {}, -}; - -static int __init declare_of_platform_devices(void) -{ - /* Publish the QE devices */ - of_platform_bus_probe(NULL, of_bus_ids, NULL); - - return 0; -} -machine_device_initcall(ep88xc, declare_of_platform_devices); - -define_machine(ep88xc) { - .name = "Embedded Planet EP88xC", - .probe = ep88xc_probe, - .setup_arch = ep88xc_setup_arch, - .init_IRQ = mpc8xx_pics_init, - .get_irq = mpc8xx_get_irq, - .restart = mpc8xx_restart, - .calibrate_decr = mpc8xx_calibrate_decr, - .set_rtc_time = mpc8xx_set_rtc_time, - .get_rtc_time = mpc8xx_get_rtc_time, - .progress = udbg_progress, -}; diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/m8xx_setup.c b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/m8xx_setup.c deleted file mode 100644 index 1e121088..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/m8xx_setup.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Copyright (C) 1995 Linus Torvalds - * Adapted from 'alpha' version by Gary Thomas - * Modified by Cort Dougan (cort@cs.nmt.edu) - * Modified for MBX using prep/chrp/pmac functions by Dan (dmalek@jlc.net) - * Further modified for generic 8xx by Dan. - */ - -/* - * bootup setup stuff.. - */ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/init.h> -#include <linux/time.h> -#include <linux/rtc.h> -#include <linux/fsl_devices.h> - -#include <asm/io.h> -#include <asm/mpc8xx.h> -#include <asm/8xx_immap.h> -#include <asm/prom.h> -#include <asm/fs_pd.h> -#include <mm/mmu_decl.h> - -#include <sysdev/mpc8xx_pic.h> - -#include "mpc8xx.h" - -struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; - -extern int cpm_pic_init(void); -extern int cpm_get_irq(void); - -/* A place holder for time base interrupts, if they are ever enabled. */ -static irqreturn_t timebase_interrupt(int irq, void *dev) -{ - printk ("timebase_interrupt()\n"); - - return IRQ_HANDLED; -} - -static struct irqaction tbint_irqaction = { - .handler = timebase_interrupt, - .name = "tbint", -}; - -/* per-board overridable init_internal_rtc() function. */ -void __init __attribute__ ((weak)) -init_internal_rtc(void) -{ - sit8xx_t __iomem *sys_tmr = immr_map(im_sit); - - /* Disable the RTC one second and alarm interrupts. */ - clrbits16(&sys_tmr->sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); - - /* Enable the RTC */ - setbits16(&sys_tmr->sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); - immr_unmap(sys_tmr); -} - -static int __init get_freq(char *name, unsigned long *val) -{ - struct device_node *cpu; - const unsigned int *fp; - int found = 0; - - /* The cpu node should have timebase and clock frequency properties */ - cpu = of_find_node_by_type(NULL, "cpu"); - - if (cpu) { - fp = of_get_property(cpu, name, NULL); - if (fp) { - found = 1; - *val = *fp; - } - - of_node_put(cpu); - } - - return found; -} - -/* The decrementer counts at the system (internal) clock frequency divided by - * sixteen, or external oscillator divided by four. We force the processor - * to use system clock divided by sixteen. - */ -void __init mpc8xx_calibrate_decr(void) -{ - struct device_node *cpu; - cark8xx_t __iomem *clk_r1; - car8xx_t __iomem *clk_r2; - sitk8xx_t __iomem *sys_tmr1; - sit8xx_t __iomem *sys_tmr2; - int irq, virq; - - clk_r1 = immr_map(im_clkrstk); - - /* Unlock the SCCR. */ - out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY); - out_be32(&clk_r1->cark_sccrk, KAPWR_KEY); - immr_unmap(clk_r1); - - /* Force all 8xx processors to use divide by 16 processor clock. */ - clk_r2 = immr_map(im_clkrst); - setbits32(&clk_r2->car_sccr, 0x02000000); - immr_unmap(clk_r2); - - /* Processor frequency is MHz. - */ - ppc_proc_freq = 50000000; - if (!get_freq("clock-frequency", &ppc_proc_freq)) - printk(KERN_ERR "WARNING: Estimating processor frequency " - "(not found)\n"); - - ppc_tb_freq = ppc_proc_freq / 16; - printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq); - - /* Perform some more timer/timebase initialization. This used - * to be done elsewhere, but other changes caused it to get - * called more than once....that is a bad thing. - * - * First, unlock all of the registers we are going to modify. - * To protect them from corruption during power down, registers - * that are maintained by keep alive power are "locked". To - * modify these registers we have to write the key value to - * the key location associated with the register. - * Some boards power up with these unlocked, while others - * are locked. Writing anything (including the unlock code?) - * to the unlocked registers will lock them again. So, here - * we guarantee the registers are locked, then we unlock them - * for our use. - */ - sys_tmr1 = immr_map(im_sitk); - out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY); - out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY); - out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY); - out_be32(&sys_tmr1->sitk_tbscrk, KAPWR_KEY); - out_be32(&sys_tmr1->sitk_rtcsck, KAPWR_KEY); - out_be32(&sys_tmr1->sitk_tbk, KAPWR_KEY); - immr_unmap(sys_tmr1); - - init_internal_rtc(); - - /* Enabling the decrementer also enables the timebase interrupts - * (or from the other point of view, to get decrementer interrupts - * we have to enable the timebase). The decrementer interrupt - * is wired into the vector table, nothing to do here for that. - */ - cpu = of_find_node_by_type(NULL, "cpu"); - virq= irq_of_parse_and_map(cpu, 0); - irq = virq_to_hw(virq); - - sys_tmr2 = immr_map(im_sit); - out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | - (TBSCR_TBF | TBSCR_TBE)); - immr_unmap(sys_tmr2); - - if (setup_irq(virq, &tbint_irqaction)) - panic("Could not allocate timer IRQ!"); -} - -/* The RTC on the MPC8xx is an internal register. - * We want to protect this during power down, so we need to unlock, - * modify, and re-lock. - */ - -int mpc8xx_set_rtc_time(struct rtc_time *tm) -{ - sitk8xx_t __iomem *sys_tmr1; - sit8xx_t __iomem *sys_tmr2; - int time; - - sys_tmr1 = immr_map(im_sitk); - sys_tmr2 = immr_map(im_sit); - time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday, - tm->tm_hour, tm->tm_min, tm->tm_sec); - - out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY); - out_be32(&sys_tmr2->sit_rtc, time); - out_be32(&sys_tmr1->sitk_rtck, ~KAPWR_KEY); - - immr_unmap(sys_tmr2); - immr_unmap(sys_tmr1); - return 0; -} - -void mpc8xx_get_rtc_time(struct rtc_time *tm) -{ - unsigned long data; - sit8xx_t __iomem *sys_tmr = immr_map(im_sit); - - /* Get time from the RTC. */ - data = in_be32(&sys_tmr->sit_rtc); - to_tm(data, tm); - tm->tm_year -= 1900; - tm->tm_mon -= 1; - immr_unmap(sys_tmr); - return; -} - -void mpc8xx_restart(char *cmd) -{ - car8xx_t __iomem *clk_r = immr_map(im_clkrst); - - - local_irq_disable(); - - setbits32(&clk_r->car_plprcr, 0x00000080); - /* Clear the ME bit in MSR to cause checkstop on machine check - */ - mtmsr(mfmsr() & ~0x1000); - - in_8(&clk_r->res[0]); - panic("Restart failed\n"); -} - -static void cpm_cascade(unsigned int irq, struct irq_desc *desc) -{ - struct irq_chip *chip; - int cascade_irq; - - if ((cascade_irq = cpm_get_irq()) >= 0) { - struct irq_desc *cdesc = irq_to_desc(cascade_irq); - - generic_handle_irq(cascade_irq); - - chip = irq_desc_get_chip(cdesc); - chip->irq_eoi(&cdesc->irq_data); - } - - chip = irq_desc_get_chip(desc); - chip->irq_eoi(&desc->irq_data); -} - -/* Initialize the internal interrupt controllers. The number of - * interrupts supported can vary with the processor type, and the - * 82xx family can have up to 64. - * External interrupts can be either edge or level triggered, and - * need to be initialized by the appropriate driver. - */ -void __init mpc8xx_pics_init(void) -{ - int irq; - - if (mpc8xx_pic_init()) { - printk(KERN_ERR "Failed interrupt 8xx controller initialization\n"); - return; - } - - irq = cpm_pic_init(); - if (irq != NO_IRQ) - irq_set_chained_handler(irq, cpm_cascade); -} diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads.h b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads.h deleted file mode 100644 index 17b1fe75..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the Freescale MPC86xADS board. - * Copied from the FADS stuff. - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_MPC86XADS_H__ -#define __ASM_MPC86XADS_H__ - -/* Bits of interest in the BCSRs. - */ -#define BCSR1_ETHEN ((uint)0x20000000) -#define BCSR1_IRDAEN ((uint)0x10000000) -#define BCSR1_RS232EN_1 ((uint)0x01000000) -#define BCSR1_PCCEN ((uint)0x00800000) -#define BCSR1_PCCVCC0 ((uint)0x00400000) -#define BCSR1_PCCVPP0 ((uint)0x00200000) -#define BCSR1_PCCVPP1 ((uint)0x00100000) -#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1) -#define BCSR1_RS232EN_2 ((uint)0x00040000) -#define BCSR1_PCCVCC1 ((uint)0x00010000) -#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1) - -#define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/ -#define BCSR4_USB_LO_SPD ((uint)0x04000000) -#define BCSR4_USB_VCC ((uint)0x02000000) -#define BCSR4_USB_FULL_SPD ((uint)0x00040000) -#define BCSR4_USB_EN ((uint)0x00020000) - -#define BCSR5_MII2_EN 0x40 -#define BCSR5_MII2_RST 0x20 -#define BCSR5_T1_RST 0x10 -#define BCSR5_ATM155_RST 0x08 -#define BCSR5_ATM25_RST 0x04 -#define BCSR5_MII1_EN 0x02 -#define BCSR5_MII1_RST 0x01 - -#endif /* __ASM_MPC86XADS_H__ */ -#endif /* __KERNEL__ */ diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads_setup.c deleted file mode 100644 index 866feff8..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc86xads_setup.c +++ /dev/null @@ -1,149 +0,0 @@ -/*arch/powerpc/platforms/8xx/mpc86xads_setup.c - * - * Platform setup for the Freescale mpc86xads board - * - * Vitaly Bordug <vbordug@ru.mvista.com> - * - * Copyright 2005 MontaVista Software Inc. - * - * Heavily modified by Scott Wood <scottwood@freescale.com> - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include <linux/init.h> -#include <linux/of_platform.h> - -#include <asm/io.h> -#include <asm/machdep.h> -#include <asm/time.h> -#include <asm/8xx_immap.h> -#include <asm/cpm1.h> -#include <asm/fs_pd.h> -#include <asm/udbg.h> - -#include "mpc86xads.h" -#include "mpc8xx.h" - -struct cpm_pin { - int port, pin, flags; -}; - -static struct cpm_pin mpc866ads_pins[] = { - /* SMC1 */ - {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ - - /* SMC2 */ - {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ - - /* SCC1 */ - {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */ - {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */ - {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */ - {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */ - {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */ - {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */ - - /* MII */ - {CPM_PORTD, 3, CPM_PIN_OUTPUT}, - {CPM_PORTD, 4, CPM_PIN_OUTPUT}, - {CPM_PORTD, 5, CPM_PIN_OUTPUT}, - {CPM_PORTD, 6, CPM_PIN_OUTPUT}, - {CPM_PORTD, 7, CPM_PIN_OUTPUT}, - {CPM_PORTD, 8, CPM_PIN_OUTPUT}, - {CPM_PORTD, 9, CPM_PIN_OUTPUT}, - {CPM_PORTD, 10, CPM_PIN_OUTPUT}, - {CPM_PORTD, 11, CPM_PIN_OUTPUT}, - {CPM_PORTD, 12, CPM_PIN_OUTPUT}, - {CPM_PORTD, 13, CPM_PIN_OUTPUT}, - {CPM_PORTD, 14, CPM_PIN_OUTPUT}, - {CPM_PORTD, 15, CPM_PIN_OUTPUT}, - - /* I2C */ - {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, - {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, -}; - -static void __init init_ioports(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) { - struct cpm_pin *pin = &mpc866ads_pins[i]; - cpm1_set_pin(pin->port, pin->pin, pin->flags); - } - - cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); - cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX); - cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX); - cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX); - - /* Set FEC1 and FEC2 to MII mode */ - clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); -} - -static void __init mpc86xads_setup_arch(void) -{ - struct device_node *np; - u32 __iomem *bcsr_io; - - cpm_reset(); - init_ioports(); - - np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr"); - if (!np) { - printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n"); - return; - } - - bcsr_io = of_iomap(np, 0); - of_node_put(np); - - if (bcsr_io == NULL) { - printk(KERN_CRIT "Could not remap BCSR\n"); - return; - } - - clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN); - iounmap(bcsr_io); -} - -static int __init mpc86xads_probe(void) -{ - unsigned long root = of_get_flat_dt_root(); - return of_flat_dt_is_compatible(root, "fsl,mpc866ads"); -} - -static struct of_device_id __initdata of_bus_ids[] = { - { .name = "soc", }, - { .name = "cpm", }, - { .name = "localbus", }, - {}, -}; - -static int __init declare_of_platform_devices(void) -{ - of_platform_bus_probe(NULL, of_bus_ids, NULL); - - return 0; -} -machine_device_initcall(mpc86x_ads, declare_of_platform_devices); - -define_machine(mpc86x_ads) { - .name = "MPC86x ADS", - .probe = mpc86xads_probe, - .setup_arch = mpc86xads_setup_arch, - .init_IRQ = mpc8xx_pics_init, - .get_irq = mpc8xx_get_irq, - .restart = mpc8xx_restart, - .calibrate_decr = mpc8xx_calibrate_decr, - .set_rtc_time = mpc8xx_set_rtc_time, - .get_rtc_time = mpc8xx_get_rtc_time, - .progress = udbg_progress, -}; diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads.h b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads.h deleted file mode 100644 index 19412f76..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * A collection of structures, addresses, and values associated with - * the Freescale MPC885ADS board. - * Copied from the FADS stuff. - * - * Author: MontaVista Software, Inc. - * source@mvista.com - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is licensed - * "as is" without any warranty of any kind, whether express or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_MPC885ADS_H__ -#define __ASM_MPC885ADS_H__ - -#include <sysdev/fsl_soc.h> - -/* Bits of interest in the BCSRs. - */ -#define BCSR1_ETHEN ((uint)0x20000000) -#define BCSR1_IRDAEN ((uint)0x10000000) -#define BCSR1_RS232EN_1 ((uint)0x01000000) -#define BCSR1_PCCEN ((uint)0x00800000) -#define BCSR1_PCCVCC0 ((uint)0x00400000) -#define BCSR1_PCCVPP0 ((uint)0x00200000) -#define BCSR1_PCCVPP1 ((uint)0x00100000) -#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1) -#define BCSR1_RS232EN_2 ((uint)0x00040000) -#define BCSR1_PCCVCC1 ((uint)0x00010000) -#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1) - -#define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/ -#define BCSR4_USB_LO_SPD ((uint)0x04000000) -#define BCSR4_USB_VCC ((uint)0x02000000) -#define BCSR4_USB_FULL_SPD ((uint)0x00040000) -#define BCSR4_USB_EN ((uint)0x00020000) - -#define BCSR5_MII2_EN 0x40 -#define BCSR5_MII2_RST 0x20 -#define BCSR5_T1_RST 0x10 -#define BCSR5_ATM155_RST 0x08 -#define BCSR5_ATM25_RST 0x04 -#define BCSR5_MII1_EN 0x02 -#define BCSR5_MII1_RST 0x01 - -#endif /* __ASM_MPC885ADS_H__ */ -#endif /* __KERNEL__ */ diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads_setup.c deleted file mode 100644 index 5d98398c..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc885ads_setup.c +++ /dev/null @@ -1,287 +0,0 @@ -/* - * Platform setup for the Freescale mpc885ads board - * - * Vitaly Bordug <vbordug@ru.mvista.com> - * - * Copyright 2005 MontaVista Software Inc. - * - * Heavily modified by Scott Wood <scottwood@freescale.com> - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/ioport.h> -#include <linux/device.h> -#include <linux/delay.h> - -#include <linux/fs_enet_pd.h> -#include <linux/fs_uart_pd.h> -#include <linux/fsl_devices.h> -#include <linux/mii.h> -#include <linux/of_platform.h> - -#include <asm/delay.h> -#include <asm/io.h> -#include <asm/machdep.h> -#include <asm/page.h> -#include <asm/processor.h> -#include <asm/time.h> -#include <asm/mpc8xx.h> -#include <asm/8xx_immap.h> -#include <asm/cpm1.h> -#include <asm/fs_pd.h> -#include <asm/udbg.h> - -#include "mpc885ads.h" -#include "mpc8xx.h" - -static u32 __iomem *bcsr, *bcsr5; - -#ifdef CONFIG_PCMCIA_M8XX -static void pcmcia_hw_setup(int slot, int enable) -{ - if (enable) - clrbits32(&bcsr[1], BCSR1_PCCEN); - else - setbits32(&bcsr[1], BCSR1_PCCEN); -} - -static int pcmcia_set_voltage(int slot, int vcc, int vpp) -{ - u32 reg = 0; - - switch (vcc) { - case 0: - break; - case 33: - reg |= BCSR1_PCCVCC0; - break; - case 50: - reg |= BCSR1_PCCVCC1; - break; - default: - return 1; - } - - switch (vpp) { - case 0: - break; - case 33: - case 50: - if (vcc == vpp) - reg |= BCSR1_PCCVPP1; - else - return 1; - break; - case 120: - if ((vcc == 33) || (vcc == 50)) - reg |= BCSR1_PCCVPP0; - else - return 1; - default: - return 1; - } - - /* first, turn off all power */ - clrbits32(&bcsr[1], 0x00610000); - - /* enable new powersettings */ - setbits32(&bcsr[1], reg); - - return 0; -} -#endif - -struct cpm_pin { - int port, pin, flags; -}; - -static struct cpm_pin mpc885ads_pins[] = { - /* SMC1 */ - {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ - - /* SMC2 */ -#ifndef CONFIG_MPC8xx_SECOND_ETH_FEC2 - {CPM_PORTE, 21, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTE, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ -#endif - - /* SCC3 */ - {CPM_PORTA, 9, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTA, 8, CPM_PIN_INPUT}, /* TX */ - {CPM_PORTC, 4, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */ - {CPM_PORTC, 5, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */ - {CPM_PORTE, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */ - {CPM_PORTE, 17, CPM_PIN_INPUT}, /* CLK5 */ - {CPM_PORTE, 16, CPM_PIN_INPUT}, /* CLK6 */ - - /* MII1 */ - {CPM_PORTA, 0, CPM_PIN_INPUT}, - {CPM_PORTA, 1, CPM_PIN_INPUT}, - {CPM_PORTA, 2, CPM_PIN_INPUT}, - {CPM_PORTA, 3, CPM_PIN_INPUT}, - {CPM_PORTA, 4, CPM_PIN_OUTPUT}, - {CPM_PORTA, 10, CPM_PIN_OUTPUT}, - {CPM_PORTA, 11, CPM_PIN_OUTPUT}, - {CPM_PORTB, 19, CPM_PIN_INPUT}, - {CPM_PORTB, 31, CPM_PIN_INPUT}, - {CPM_PORTC, 12, CPM_PIN_INPUT}, - {CPM_PORTC, 13, CPM_PIN_INPUT}, - {CPM_PORTE, 30, CPM_PIN_OUTPUT}, - {CPM_PORTE, 31, CPM_PIN_OUTPUT}, - - /* MII2 */ -#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 - {CPM_PORTE, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 16, CPM_PIN_OUTPUT}, - {CPM_PORTE, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, - {CPM_PORTE, 21, CPM_PIN_OUTPUT}, - {CPM_PORTE, 22, CPM_PIN_OUTPUT}, - {CPM_PORTE, 23, CPM_PIN_OUTPUT}, - {CPM_PORTE, 24, CPM_PIN_OUTPUT}, - {CPM_PORTE, 25, CPM_PIN_OUTPUT}, - {CPM_PORTE, 26, CPM_PIN_OUTPUT}, - {CPM_PORTE, 27, CPM_PIN_OUTPUT}, - {CPM_PORTE, 28, CPM_PIN_OUTPUT}, - {CPM_PORTE, 29, CPM_PIN_OUTPUT}, -#endif - /* I2C */ - {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, - {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN}, -}; - -static void __init init_ioports(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(mpc885ads_pins); i++) { - struct cpm_pin *pin = &mpc885ads_pins[i]; - cpm1_set_pin(pin->port, pin->pin, pin->flags); - } - - cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); - cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX); - cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_TX); - cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK6, CPM_CLK_RX); - - /* Set FEC1 and FEC2 to MII mode */ - clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180); -} - -static void __init mpc885ads_setup_arch(void) -{ - struct device_node *np; - - cpm_reset(); - init_ioports(); - - np = of_find_compatible_node(NULL, NULL, "fsl,mpc885ads-bcsr"); - if (!np) { - printk(KERN_CRIT "Could not find fsl,mpc885ads-bcsr node\n"); - return; - } - - bcsr = of_iomap(np, 0); - bcsr5 = of_iomap(np, 1); - of_node_put(np); - - if (!bcsr || !bcsr5) { - printk(KERN_CRIT "Could not remap BCSR\n"); - return; - } - - clrbits32(&bcsr[1], BCSR1_RS232EN_1); -#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 - setbits32(&bcsr[1], BCSR1_RS232EN_2); -#else - clrbits32(&bcsr[1], BCSR1_RS232EN_2); -#endif - - clrbits32(bcsr5, BCSR5_MII1_EN); - setbits32(bcsr5, BCSR5_MII1_RST); - udelay(1000); - clrbits32(bcsr5, BCSR5_MII1_RST); - -#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 - clrbits32(bcsr5, BCSR5_MII2_EN); - setbits32(bcsr5, BCSR5_MII2_RST); - udelay(1000); - clrbits32(bcsr5, BCSR5_MII2_RST); -#else - setbits32(bcsr5, BCSR5_MII2_EN); -#endif - -#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3 - clrbits32(&bcsr[4], BCSR4_ETH10_RST); - udelay(1000); - setbits32(&bcsr[4], BCSR4_ETH10_RST); - - setbits32(&bcsr[1], BCSR1_ETHEN); - - np = of_find_node_by_path("/soc@ff000000/cpm@9c0/serial@a80"); -#else - np = of_find_node_by_path("/soc@ff000000/cpm@9c0/ethernet@a40"); -#endif - - /* The SCC3 enet registers overlap the SMC1 registers, so - * one of the two must be removed from the device tree. - */ - - if (np) { - of_detach_node(np); - of_node_put(np); - } - -#ifdef CONFIG_PCMCIA_M8XX - /* Set up board specific hook-ups.*/ - m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup; - m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage; -#endif -} - -static int __init mpc885ads_probe(void) -{ - unsigned long root = of_get_flat_dt_root(); - return of_flat_dt_is_compatible(root, "fsl,mpc885ads"); -} - -static struct of_device_id __initdata of_bus_ids[] = { - { .name = "soc", }, - { .name = "cpm", }, - { .name = "localbus", }, - {}, -}; - -static int __init declare_of_platform_devices(void) -{ - /* Publish the QE devices */ - of_platform_bus_probe(NULL, of_bus_ids, NULL); - - return 0; -} -machine_device_initcall(mpc885_ads, declare_of_platform_devices); - -define_machine(mpc885_ads) { - .name = "Freescale MPC885 ADS", - .probe = mpc885ads_probe, - .setup_arch = mpc885ads_setup_arch, - .init_IRQ = mpc8xx_pics_init, - .get_irq = mpc8xx_get_irq, - .restart = mpc8xx_restart, - .calibrate_decr = mpc8xx_calibrate_decr, - .set_rtc_time = mpc8xx_set_rtc_time, - .get_rtc_time = mpc8xx_get_rtc_time, - .progress = udbg_progress, -}; diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc8xx.h b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc8xx.h deleted file mode 100644 index 239a243a..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/mpc8xx.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Prototypes, etc. for the Freescale MPC8xx embedded cpu chips - * May need to be cleaned as the port goes on ... - * - * Copyright (C) 2008 Jochen Friedrich <jochen@scram.de> - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ -#ifndef __MPC8xx_H -#define __MPC8xx_H - -extern void mpc8xx_restart(char *cmd); -extern void mpc8xx_calibrate_decr(void); -extern int mpc8xx_set_rtc_time(struct rtc_time *tm); -extern void mpc8xx_get_rtc_time(struct rtc_time *tm); -extern void mpc8xx_pics_init(void); -extern unsigned int mpc8xx_get_irq(void); - -#endif /* __MPC8xx_H */ diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/tqm8xx_setup.c b/ANDROID_3.4.5/arch/powerpc/platforms/8xx/tqm8xx_setup.c deleted file mode 100644 index 8d21ab70..00000000 --- a/ANDROID_3.4.5/arch/powerpc/platforms/8xx/tqm8xx_setup.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Platform setup for the MPC8xx based boards from TQM. - * - * Heiko Schocher <hs@denx.de> - * Copyright 2010 DENX Software Engineering GmbH - * - * based on: - * Vitaly Bordug <vbordug@ru.mvista.com> - * - * Copyright 2005 MontaVista Software Inc. - * - * Heavily modified by Scott Wood <scottwood@freescale.com> - * Copyright 2007 Freescale Semiconductor, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include <linux/init.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/ioport.h> -#include <linux/device.h> -#include <linux/delay.h> - -#include <linux/fs_enet_pd.h> -#include <linux/fs_uart_pd.h> -#include <linux/fsl_devices.h> -#include <linux/mii.h> -#include <linux/of_platform.h> - -#include <asm/delay.h> -#include <asm/io.h> -#include <asm/machdep.h> -#include <asm/page.h> -#include <asm/processor.h> -#include <asm/time.h> -#include <asm/mpc8xx.h> -#include <asm/8xx_immap.h> -#include <asm/cpm1.h> -#include <asm/fs_pd.h> -#include <asm/udbg.h> - -#include "mpc8xx.h" - -struct cpm_pin { - int port, pin, flags; -}; - -static struct __initdata cpm_pin tqm8xx_pins[] = { - /* SMC1 */ - {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */ - - /* SCC1 */ - {CPM_PORTA, 5, CPM_PIN_INPUT}, /* CLK1 */ - {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */ - {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */ - {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */ - {CPM_PORTC, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */ - {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, - {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, -}; - -static struct __initdata cpm_pin tqm8xx_fec_pins[] = { - /* MII */ - {CPM_PORTD, 3, CPM_PIN_OUTPUT}, - {CPM_PORTD, 4, CPM_PIN_OUTPUT}, - {CPM_PORTD, 5, CPM_PIN_OUTPUT}, - {CPM_PORTD, 6, CPM_PIN_OUTPUT}, - {CPM_PORTD, 7, CPM_PIN_OUTPUT}, - {CPM_PORTD, 8, CPM_PIN_OUTPUT}, - {CPM_PORTD, 9, CPM_PIN_OUTPUT}, - {CPM_PORTD, 10, CPM_PIN_OUTPUT}, - {CPM_PORTD, 11, CPM_PIN_OUTPUT}, - {CPM_PORTD, 12, CPM_PIN_OUTPUT}, - {CPM_PORTD, 13, CPM_PIN_OUTPUT}, - {CPM_PORTD, 14, CPM_PIN_OUTPUT}, - {CPM_PORTD, 15, CPM_PIN_OUTPUT}, -}; - -static void __init init_pins(int n, struct cpm_pin *pin) -{ - int i; - - for (i = 0; i < n; i++) { - cpm1_set_pin(pin->port, pin->pin, pin->flags); - pin++; - } -} - -static void __init init_ioports(void) -{ - struct device_node *dnode; - struct property *prop; - int len; - - init_pins(ARRAY_SIZE(tqm8xx_pins), &tqm8xx_pins[0]); - - cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX); - - dnode = of_find_node_by_name(NULL, "aliases"); - if (dnode == NULL) - return; - prop = of_find_property(dnode, "ethernet1", &len); - if (prop == NULL) - return; - - /* init FEC pins */ - init_pins(ARRAY_SIZE(tqm8xx_fec_pins), &tqm8xx_fec_pins[0]); -} - -static void __init tqm8xx_setup_arch(void) -{ - cpm_reset(); - init_ioports(); -} - -static int __init tqm8xx_probe(void) -{ - unsigned long node = of_get_flat_dt_root(); - - return of_flat_dt_is_compatible(node, "tqc,tqm8xx"); -} - -static struct of_device_id __initdata of_bus_ids[] = { - { .name = "soc", }, - { .name = "cpm", }, - { .name = "localbus", }, - { .compatible = "simple-bus" }, - {}, -}; - -static int __init declare_of_platform_devices(void) -{ - of_platform_bus_probe(NULL, of_bus_ids, NULL); - - return 0; -} -machine_device_initcall(tqm8xx, declare_of_platform_devices); - -define_machine(tqm8xx) { - .name = "TQM8xx", - .probe = tqm8xx_probe, - .setup_arch = tqm8xx_setup_arch, - .init_IRQ = mpc8xx_pics_init, - .get_irq = mpc8xx_get_irq, - .restart = mpc8xx_restart, - .calibrate_decr = mpc8xx_calibrate_decr, - .set_rtc_time = mpc8xx_set_rtc_time, - .get_rtc_time = mpc8xx_get_rtc_time, - .progress = udbg_progress, -}; |