diff options
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-omap2/omap4-sar-layout.h')
| -rw-r--r-- | ANDROID_3.4.5/arch/arm/mach-omap2/omap4-sar-layout.h | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-omap2/omap4-sar-layout.h b/ANDROID_3.4.5/arch/arm/mach-omap2/omap4-sar-layout.h deleted file mode 100644 index fe5b545a..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-omap2/omap4-sar-layout.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * omap4-sar-layout.h: OMAP4 SAR RAM layout header file - * - * Copyright (C) 2011 Texas Instruments, Inc. - * Santosh Shilimkar <santosh.shilimkar@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef OMAP_ARCH_OMAP4_SAR_LAYOUT_H -#define OMAP_ARCH_OMAP4_SAR_LAYOUT_H - -/* - * SAR BANK offsets from base address OMAP44XX_SAR_RAM_BASE - */ -#define SAR_BANK1_OFFSET 0x0000 -#define SAR_BANK2_OFFSET 0x1000 -#define SAR_BANK3_OFFSET 0x2000 -#define SAR_BANK4_OFFSET 0x3000 - -/* Scratch pad memory offsets from SAR_BANK1 */ -#define SCU_OFFSET0 0xd00 -#define SCU_OFFSET1 0xd04 -#define OMAP_TYPE_OFFSET 0xd10 -#define L2X0_SAVE_OFFSET0 0xd14 -#define L2X0_SAVE_OFFSET1 0xd18 -#define L2X0_AUXCTRL_OFFSET 0xd1c -#define L2X0_PREFETCH_CTRL_OFFSET 0xd20 - -/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ -#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04 -#define CPU1_WAKEUP_NS_PA_ADDR_OFFSET 0xa08 - -#define SAR_BACKUP_STATUS_OFFSET (SAR_BANK3_OFFSET + 0x500) -#define SAR_SECURE_RAM_SIZE_OFFSET (SAR_BANK3_OFFSET + 0x504) -#define SAR_SECRAM_SAVED_AT_OFFSET (SAR_BANK3_OFFSET + 0x508) - -/* WakeUpGen save restore offset from OMAP44XX_SAR_RAM_BASE */ -#define WAKEUPGENENB_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x684) -#define WAKEUPGENENB_SECURE_OFFSET_CPU0 (SAR_BANK3_OFFSET + 0x694) -#define WAKEUPGENENB_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6a4) -#define WAKEUPGENENB_SECURE_OFFSET_CPU1 (SAR_BANK3_OFFSET + 0x6b4) -#define AUXCOREBOOT0_OFFSET (SAR_BANK3_OFFSET + 0x6c4) -#define AUXCOREBOOT1_OFFSET (SAR_BANK3_OFFSET + 0x6c8) -#define PTMSYNCREQ_MASK_OFFSET (SAR_BANK3_OFFSET + 0x6cc) -#define PTMSYNCREQ_EN_OFFSET (SAR_BANK3_OFFSET + 0x6d0) -#define SAR_BACKUP_STATUS_WAKEUPGEN 0x10 - -#endif |