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authorSrikant Patnaik2015-01-11 12:28:04 +0530
committerSrikant Patnaik2015-01-11 12:28:04 +0530
commit871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch)
tree8718f573808810c2a1e8cb8fb6ac469093ca2784 /ANDROID_3.4.5/arch/powerpc/platforms/512x
parent9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff)
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Moved, renamed, and deleted files
The original directory structure was scattered and unorganized. Changes are basically to make it look like kernel structure.
Diffstat (limited to 'ANDROID_3.4.5/arch/powerpc/platforms/512x')
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/Kconfig34
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/Makefile7
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/clock.c744
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.c74
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.h16
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c202
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_generic.c52
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x.h21
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x_shared.c461
-rw-r--r--ANDROID_3.4.5/arch/powerpc/platforms/512x/pdm360ng.c129
10 files changed, 0 insertions, 1740 deletions
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/Kconfig b/ANDROID_3.4.5/arch/powerpc/platforms/512x/Kconfig
deleted file mode 100644
index c1699980..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/Kconfig
+++ /dev/null
@@ -1,34 +0,0 @@
-config PPC_MPC512x
- bool "512x-based boards"
- depends on 6xx
- select FSL_SOC
- select IPIC
- select PPC_CLOCK
- select PPC_PCI_CHOICE
- select FSL_PCI if PCI
- select ARCH_WANT_OPTIONAL_GPIOLIB
-
-config MPC5121_ADS
- bool "Freescale MPC5121E ADS"
- depends on PPC_MPC512x
- select DEFAULT_UIMAGE
- help
- This option enables support for the MPC5121E ADS board.
-
-config MPC5121_GENERIC
- bool "Generic support for simple MPC5121 based boards"
- depends on PPC_MPC512x
- select DEFAULT_UIMAGE
- help
- This option enables support for simple MPC5121 based boards
- which do not need custom platform specific setup.
-
- Compatible boards include: Protonic LVT base boards (ZANMCU
- and VICVT2).
-
-config PDM360NG
- bool "ifm PDM360NG board"
- depends on PPC_MPC512x
- select DEFAULT_UIMAGE
- help
- This option enables support for the PDM360NG board.
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/Makefile b/ANDROID_3.4.5/arch/powerpc/platforms/512x/Makefile
deleted file mode 100644
index 4efc1c4b..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
-#
-# Makefile for the Freescale PowerPC 512x linux kernel.
-#
-obj-y += clock.o mpc512x_shared.o
-obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
-obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
-obj-$(CONFIG_PDM360NG) += pdm360ng.o
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/clock.c b/ANDROID_3.4.5/arch/powerpc/platforms/512x/clock.c
deleted file mode 100644
index 1d8700ff..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/clock.c
+++ /dev/null
@@ -1,744 +0,0 @@
-/*
- * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby <jrigby@freescale.com>
- *
- * Implements the clk api defined in include/linux/clk.h
- *
- * Original based on linux/arch/arm/mach-integrator/clock.c
- *
- * Copyright (C) 2004 ARM Limited.
- * Written by Deep Blue Solutions Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/module.h>
-#include <linux/string.h>
-#include <linux/clk.h>
-#include <linux/mutex.h>
-#include <linux/io.h>
-
-#include <linux/of_platform.h>
-#include <asm/mpc5xxx.h>
-#include <asm/clk_interface.h>
-
-#undef CLK_DEBUG
-
-static int clocks_initialized;
-
-#define CLK_HAS_RATE 0x1 /* has rate in MHz */
-#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
-
-struct clk {
- struct list_head node;
- char name[32];
- int flags;
- struct device *dev;
- unsigned long rate;
- struct module *owner;
- void (*calc) (struct clk *);
- struct clk *parent;
- int reg, bit; /* CLK_HAS_CTRL */
- int div_shift; /* only used by generic_div_clk_calc */
-};
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
-{
- struct clk *p, *clk = ERR_PTR(-ENOENT);
- int dev_match = 0;
- int id_match = 0;
-
- if (dev == NULL || id == NULL)
- return clk;
-
- mutex_lock(&clocks_mutex);
- list_for_each_entry(p, &clocks, node) {
- if (dev == p->dev)
- dev_match++;
- if (strcmp(id, p->name) == 0)
- id_match++;
- if ((dev_match || id_match) && try_module_get(p->owner)) {
- clk = p;
- break;
- }
- }
- mutex_unlock(&clocks_mutex);
-
- return clk;
-}
-
-#ifdef CLK_DEBUG
-static void dump_clocks(void)
-{
- struct clk *p;
-
- mutex_lock(&clocks_mutex);
- printk(KERN_INFO "CLOCKS:\n");
- list_for_each_entry(p, &clocks, node) {
- pr_info(" %s=%ld", p->name, p->rate);
- if (p->parent)
- pr_cont(" %s=%ld", p->parent->name,
- p->parent->rate);
- if (p->flags & CLK_HAS_CTRL)
- pr_cont(" reg/bit=%d/%d", p->reg, p->bit);
- pr_cont("\n");
- }
- mutex_unlock(&clocks_mutex);
-}
-#define DEBUG_CLK_DUMP() dump_clocks()
-#else
-#define DEBUG_CLK_DUMP()
-#endif
-
-
-static void mpc5121_clk_put(struct clk *clk)
-{
- module_put(clk->owner);
-}
-
-#define NRPSC 12
-
-struct mpc512x_clockctl {
- u32 spmr; /* System PLL Mode Reg */
- u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */
- u32 scfr1; /* System Clk Freq Reg 1 */
- u32 scfr2; /* System Clk Freq Reg 2 */
- u32 reserved;
- u32 bcr; /* Bread Crumb Reg */
- u32 pccr[NRPSC]; /* PSC Clk Ctrl Reg 0-11 */
- u32 spccr; /* SPDIF Clk Ctrl Reg */
- u32 cccr; /* CFM Clk Ctrl Reg */
- u32 dccr; /* DIU Clk Cnfg Reg */
-};
-
-struct mpc512x_clockctl __iomem *clockctl;
-
-static int mpc5121_clk_enable(struct clk *clk)
-{
- unsigned int mask;
-
- if (clk->flags & CLK_HAS_CTRL) {
- mask = in_be32(&clockctl->sccr[clk->reg]);
- mask |= 1 << clk->bit;
- out_be32(&clockctl->sccr[clk->reg], mask);
- }
- return 0;
-}
-
-static void mpc5121_clk_disable(struct clk *clk)
-{
- unsigned int mask;
-
- if (clk->flags & CLK_HAS_CTRL) {
- mask = in_be32(&clockctl->sccr[clk->reg]);
- mask &= ~(1 << clk->bit);
- out_be32(&clockctl->sccr[clk->reg], mask);
- }
-}
-
-static unsigned long mpc5121_clk_get_rate(struct clk *clk)
-{
- if (clk->flags & CLK_HAS_RATE)
- return clk->rate;
- else
- return 0;
-}
-
-static long mpc5121_clk_round_rate(struct clk *clk, unsigned long rate)
-{
- return rate;
-}
-
-static int mpc5121_clk_set_rate(struct clk *clk, unsigned long rate)
-{
- return 0;
-}
-
-static int clk_register(struct clk *clk)
-{
- mutex_lock(&clocks_mutex);
- list_add(&clk->node, &clocks);
- mutex_unlock(&clocks_mutex);
- return 0;
-}
-
-static unsigned long spmf_mult(void)
-{
- /*
- * Convert spmf to multiplier
- */
- static int spmf_to_mult[] = {
- 68, 1, 12, 16,
- 20, 24, 28, 32,
- 36, 40, 44, 48,
- 52, 56, 60, 64
- };
- int spmf = (clockctl->spmr >> 24) & 0xf;
- return spmf_to_mult[spmf];
-}
-
-static unsigned long sysdiv_div_x_2(void)
-{
- /*
- * Convert sysdiv to divisor x 2
- * Some divisors have fractional parts so
- * multiply by 2 then divide by this value
- */
- static int sysdiv_to_div_x_2[] = {
- 4, 5, 6, 7,
- 8, 9, 10, 14,
- 12, 16, 18, 22,
- 20, 24, 26, 30,
- 28, 32, 34, 38,
- 36, 40, 42, 46,
- 44, 48, 50, 54,
- 52, 56, 58, 62,
- 60, 64, 66,
- };
- int sysdiv = (clockctl->scfr2 >> 26) & 0x3f;
- return sysdiv_to_div_x_2[sysdiv];
-}
-
-static unsigned long ref_to_sys(unsigned long rate)
-{
- rate *= spmf_mult();
- rate *= 2;
- rate /= sysdiv_div_x_2();
-
- return rate;
-}
-
-static unsigned long sys_to_ref(unsigned long rate)
-{
- rate *= sysdiv_div_x_2();
- rate /= 2;
- rate /= spmf_mult();
-
- return rate;
-}
-
-static long ips_to_ref(unsigned long rate)
-{
- int ips_div = (clockctl->scfr1 >> 23) & 0x7;
-
- rate *= ips_div; /* csb_clk = ips_clk * ips_div */
- rate *= 2; /* sys_clk = csb_clk * 2 */
- return sys_to_ref(rate);
-}
-
-static unsigned long devtree_getfreq(char *clockname)
-{
- struct device_node *np;
- const unsigned int *prop;
- unsigned int val = 0;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-immr");
- if (np) {
- prop = of_get_property(np, clockname, NULL);
- if (prop)
- val = *prop;
- of_node_put(np);
- }
- return val;
-}
-
-static void ref_clk_calc(struct clk *clk)
-{
- unsigned long rate;
-
- rate = devtree_getfreq("bus-frequency");
- if (rate == 0) {
- printk(KERN_ERR "No bus-frequency in dev tree\n");
- clk->rate = 0;
- return;
- }
- clk->rate = ips_to_ref(rate);
-}
-
-static struct clk ref_clk = {
- .name = "ref_clk",
- .calc = ref_clk_calc,
-};
-
-
-static void sys_clk_calc(struct clk *clk)
-{
- clk->rate = ref_to_sys(ref_clk.rate);
-}
-
-static struct clk sys_clk = {
- .name = "sys_clk",
- .calc = sys_clk_calc,
-};
-
-static void diu_clk_calc(struct clk *clk)
-{
- int diudiv_x_2 = clockctl->scfr1 & 0xff;
- unsigned long rate;
-
- rate = sys_clk.rate;
-
- rate *= 2;
- rate /= diudiv_x_2;
-
- clk->rate = rate;
-}
-
-static void viu_clk_calc(struct clk *clk)
-{
- unsigned long rate;
-
- rate = sys_clk.rate;
- rate /= 2;
- clk->rate = rate;
-}
-
-static void half_clk_calc(struct clk *clk)
-{
- clk->rate = clk->parent->rate / 2;
-}
-
-static void generic_div_clk_calc(struct clk *clk)
-{
- int div = (clockctl->scfr1 >> clk->div_shift) & 0x7;
-
- clk->rate = clk->parent->rate / div;
-}
-
-static void unity_clk_calc(struct clk *clk)
-{
- clk->rate = clk->parent->rate;
-}
-
-static struct clk csb_clk = {
- .name = "csb_clk",
- .calc = half_clk_calc,
- .parent = &sys_clk,
-};
-
-static void e300_clk_calc(struct clk *clk)
-{
- int spmf = (clockctl->spmr >> 16) & 0xf;
- int ratex2 = clk->parent->rate * spmf;
-
- clk->rate = ratex2 / 2;
-}
-
-static struct clk e300_clk = {
- .name = "e300_clk",
- .calc = e300_clk_calc,
- .parent = &csb_clk,
-};
-
-static struct clk ips_clk = {
- .name = "ips_clk",
- .calc = generic_div_clk_calc,
- .parent = &csb_clk,
- .div_shift = 23,
-};
-
-/*
- * Clocks controlled by SCCR1 (.reg = 0)
- */
-static struct clk lpc_clk = {
- .name = "lpc_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 0,
- .bit = 30,
- .calc = generic_div_clk_calc,
- .parent = &ips_clk,
- .div_shift = 11,
-};
-
-static struct clk nfc_clk = {
- .name = "nfc_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 0,
- .bit = 29,
- .calc = generic_div_clk_calc,
- .parent = &ips_clk,
- .div_shift = 8,
-};
-
-static struct clk pata_clk = {
- .name = "pata_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 0,
- .bit = 28,
- .calc = unity_clk_calc,
- .parent = &ips_clk,
-};
-
-/*
- * PSC clocks (bits 27 - 16)
- * are setup elsewhere
- */
-
-static struct clk sata_clk = {
- .name = "sata_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 0,
- .bit = 14,
- .calc = unity_clk_calc,
- .parent = &ips_clk,
-};
-
-static struct clk fec_clk = {
- .name = "fec_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 0,
- .bit = 13,
- .calc = unity_clk_calc,
- .parent = &ips_clk,
-};
-
-static struct clk pci_clk = {
- .name = "pci_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 0,
- .bit = 11,
- .calc = generic_div_clk_calc,
- .parent = &csb_clk,
- .div_shift = 20,
-};
-
-/*
- * Clocks controlled by SCCR2 (.reg = 1)
- */
-static struct clk diu_clk = {
- .name = "diu_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 31,
- .calc = diu_clk_calc,
-};
-
-static struct clk viu_clk = {
- .name = "viu_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 18,
- .calc = viu_clk_calc,
-};
-
-static struct clk axe_clk = {
- .name = "axe_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 30,
- .calc = unity_clk_calc,
- .parent = &csb_clk,
-};
-
-static struct clk usb1_clk = {
- .name = "usb1_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 28,
- .calc = unity_clk_calc,
- .parent = &csb_clk,
-};
-
-static struct clk usb2_clk = {
- .name = "usb2_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 27,
- .calc = unity_clk_calc,
- .parent = &csb_clk,
-};
-
-static struct clk i2c_clk = {
- .name = "i2c_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 26,
- .calc = unity_clk_calc,
- .parent = &ips_clk,
-};
-
-static struct clk mscan_clk = {
- .name = "mscan_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 25,
- .calc = unity_clk_calc,
- .parent = &ips_clk,
-};
-
-static struct clk sdhc_clk = {
- .name = "sdhc_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 24,
- .calc = unity_clk_calc,
- .parent = &ips_clk,
-};
-
-static struct clk mbx_bus_clk = {
- .name = "mbx_bus_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 22,
- .calc = half_clk_calc,
- .parent = &csb_clk,
-};
-
-static struct clk mbx_clk = {
- .name = "mbx_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 21,
- .calc = unity_clk_calc,
- .parent = &csb_clk,
-};
-
-static struct clk mbx_3d_clk = {
- .name = "mbx_3d_clk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 20,
- .calc = generic_div_clk_calc,
- .parent = &mbx_bus_clk,
- .div_shift = 14,
-};
-
-static void psc_mclk_in_calc(struct clk *clk)
-{
- clk->rate = devtree_getfreq("psc_mclk_in");
- if (!clk->rate)
- clk->rate = 25000000;
-}
-
-static struct clk psc_mclk_in = {
- .name = "psc_mclk_in",
- .calc = psc_mclk_in_calc,
-};
-
-static struct clk spdif_txclk = {
- .name = "spdif_txclk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 23,
-};
-
-static struct clk spdif_rxclk = {
- .name = "spdif_rxclk",
- .flags = CLK_HAS_CTRL,
- .reg = 1,
- .bit = 23,
-};
-
-static void ac97_clk_calc(struct clk *clk)
-{
- /* ac97 bit clock is always 24.567 MHz */
- clk->rate = 24567000;
-}
-
-static struct clk ac97_clk = {
- .name = "ac97_clk_in",
- .calc = ac97_clk_calc,
-};
-
-struct clk *rate_clks[] = {
- &ref_clk,
- &sys_clk,
- &diu_clk,
- &viu_clk,
- &csb_clk,
- &e300_clk,
- &ips_clk,
- &fec_clk,
- &sata_clk,
- &pata_clk,
- &nfc_clk,
- &lpc_clk,
- &mbx_bus_clk,
- &mbx_clk,
- &mbx_3d_clk,
- &axe_clk,
- &usb1_clk,
- &usb2_clk,
- &i2c_clk,
- &mscan_clk,
- &sdhc_clk,
- &pci_clk,
- &psc_mclk_in,
- &spdif_txclk,
- &spdif_rxclk,
- &ac97_clk,
- NULL
-};
-
-static void rate_clk_init(struct clk *clk)
-{
- if (clk->calc) {
- clk->calc(clk);
- clk->flags |= CLK_HAS_RATE;
- clk_register(clk);
- } else {
- printk(KERN_WARNING
- "Could not initialize clk %s without a calc routine\n",
- clk->name);
- }
-}
-
-static void rate_clks_init(void)
-{
- struct clk **cpp, *clk;
-
- cpp = rate_clks;
- while ((clk = *cpp++))
- rate_clk_init(clk);
-}
-
-/*
- * There are two clk enable registers with 32 enable bits each
- * psc clocks and device clocks are all stored in dev_clks
- */
-struct clk dev_clks[2][32];
-
-/*
- * Given a psc number return the dev_clk
- * associated with it
- */
-static struct clk *psc_dev_clk(int pscnum)
-{
- int reg, bit;
- struct clk *clk;
-
- reg = 0;
- bit = 27 - pscnum;
-
- clk = &dev_clks[reg][bit];
- clk->reg = 0;
- clk->bit = bit;
- return clk;
-}
-
-/*
- * PSC clock rate calculation
- */
-static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
-{
- unsigned long mclk_src = sys_clk.rate;
- unsigned long mclk_div;
-
- /*
- * Can only change value of mclk divider
- * when the divider is disabled.
- *
- * Zero is not a valid divider so minimum
- * divider is 1
- *
- * disable/set divider/enable
- */
- out_be32(&clockctl->pccr[pscnum], 0);
- out_be32(&clockctl->pccr[pscnum], 0x00020000);
- out_be32(&clockctl->pccr[pscnum], 0x00030000);
-
- if (clockctl->pccr[pscnum] & 0x80) {
- clk->rate = spdif_rxclk.rate;
- return;
- }
-
- switch ((clockctl->pccr[pscnum] >> 14) & 0x3) {
- case 0:
- mclk_src = sys_clk.rate;
- break;
- case 1:
- mclk_src = ref_clk.rate;
- break;
- case 2:
- mclk_src = psc_mclk_in.rate;
- break;
- case 3:
- mclk_src = spdif_txclk.rate;
- break;
- }
-
- mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1;
- clk->rate = mclk_src / mclk_div;
-}
-
-/*
- * Find all psc nodes in device tree and assign a clock
- * with name "psc%d_mclk" and dev pointing at the device
- * returned from of_find_device_by_node
- */
-static void psc_clks_init(void)
-{
- struct device_node *np;
- const u32 *cell_index;
- struct platform_device *ofdev;
-
- for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
- cell_index = of_get_property(np, "cell-index", NULL);
- if (cell_index) {
- int pscnum = *cell_index;
- struct clk *clk = psc_dev_clk(pscnum);
-
- clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL;
- ofdev = of_find_device_by_node(np);
- clk->dev = &ofdev->dev;
- /*
- * AC97 is special rate clock does
- * not go through normal path
- */
- if (strcmp("ac97", np->name) == 0)
- clk->rate = ac97_clk.rate;
- else
- psc_calc_rate(clk, pscnum, np);
- sprintf(clk->name, "psc%d_mclk", pscnum);
- clk_register(clk);
- clk_enable(clk);
- }
- }
-}
-
-static struct clk_interface mpc5121_clk_functions = {
- .clk_get = mpc5121_clk_get,
- .clk_enable = mpc5121_clk_enable,
- .clk_disable = mpc5121_clk_disable,
- .clk_get_rate = mpc5121_clk_get_rate,
- .clk_put = mpc5121_clk_put,
- .clk_round_rate = mpc5121_clk_round_rate,
- .clk_set_rate = mpc5121_clk_set_rate,
- .clk_set_parent = NULL,
- .clk_get_parent = NULL,
-};
-
-int __init mpc5121_clk_init(void)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
- if (np) {
- clockctl = of_iomap(np, 0);
- of_node_put(np);
- }
-
- if (!clockctl) {
- printk(KERN_ERR "Could not map clock control registers\n");
- return 0;
- }
-
- rate_clks_init();
- psc_clks_init();
-
- /* leave clockctl mapped forever */
- /*iounmap(clockctl); */
- DEBUG_CLK_DUMP();
- clocks_initialized++;
- clk_functions = mpc5121_clk_functions;
- return 0;
-}
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.c b/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.c
deleted file mode 100644
index dcef6ade..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
- *
- * Description:
- * MPC5121 ADS board setup
- *
- * This is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/of_platform.h>
-
-#include <asm/machdep.h>
-#include <asm/ipic.h>
-#include <asm/prom.h>
-#include <asm/time.h>
-
-#include <sysdev/fsl_pci.h>
-
-#include "mpc512x.h"
-#include "mpc5121_ads.h"
-
-static void __init mpc5121_ads_setup_arch(void)
-{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
- printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n");
- /*
- * cpld regs are needed early
- */
- mpc5121_ads_cpld_map();
-
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc5121-pci")
- mpc83xx_add_bridge(np);
-#endif
- mpc512x_setup_diu();
-}
-
-static void __init mpc5121_ads_init_IRQ(void)
-{
- mpc512x_init_IRQ();
- mpc5121_ads_cpld_pic_init();
-}
-
-/*
- * Called very early, MMU is off, device-tree isn't unflattened
- */
-static int __init mpc5121_ads_probe(void)
-{
- unsigned long root = of_get_flat_dt_root();
-
- return of_flat_dt_is_compatible(root, "fsl,mpc5121ads");
-}
-
-define_machine(mpc5121_ads) {
- .name = "MPC5121 ADS",
- .probe = mpc5121_ads_probe,
- .setup_arch = mpc5121_ads_setup_arch,
- .init = mpc512x_init,
- .init_early = mpc512x_init_diu,
- .init_IRQ = mpc5121_ads_init_IRQ,
- .get_irq = ipic_get_irq,
- .calibrate_decr = generic_calibrate_decr,
- .restart = mpc512x_restart,
-};
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.h b/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.h
deleted file mode 100644
index 662076cf..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * Prototypes for ADS5121 specific code
- */
-
-#ifndef __MPC512ADS_H__
-#define __MPC512ADS_H__
-extern void __init mpc5121_ads_cpld_map(void);
-extern void __init mpc5121_ads_cpld_pic_init(void);
-#endif /* __MPC512ADS_H__ */
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
deleted file mode 100644
index ca3a062e..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby, <jrigby@freescale.com>
- *
- * Description:
- * MPC5121ADS CPLD irq handling
- *
- * This is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#undef DEBUG
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <asm/prom.h>
-
-static struct device_node *cpld_pic_node;
-static struct irq_domain *cpld_pic_host;
-
-/*
- * Bits to ignore in the misc_status register
- * 0x10 touch screen pendown is hard routed to irq1
- * 0x02 pci status is read from pci status register
- */
-#define MISC_IGNORE 0x12
-
-/*
- * Nothing to ignore in pci status register
- */
-#define PCI_IGNORE 0x00
-
-struct cpld_pic {
- u8 pci_mask;
- u8 pci_status;
- u8 route;
- u8 misc_mask;
- u8 misc_status;
- u8 misc_control;
-};
-
-static struct cpld_pic __iomem *cpld_regs;
-
-static void __iomem *
-irq_to_pic_mask(unsigned int irq)
-{
- return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask;
-}
-
-static unsigned int
-irq_to_pic_bit(unsigned int irq)
-{
- return 1 << (irq & 0x7);
-}
-
-static void
-cpld_mask_irq(struct irq_data *d)
-{
- unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
- void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
-
- out_8(pic_mask,
- in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
-}
-
-static void
-cpld_unmask_irq(struct irq_data *d)
-{
- unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
- void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
-
- out_8(pic_mask,
- in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
-}
-
-static struct irq_chip cpld_pic = {
- .name = "CPLD PIC",
- .irq_mask = cpld_mask_irq,
- .irq_ack = cpld_mask_irq,
- .irq_unmask = cpld_unmask_irq,
-};
-
-static int
-cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
- u8 __iomem *maskp)
-{
- int cpld_irq;
- u8 status = in_8(statusp);
- u8 mask = in_8(maskp);
-
- /* ignore don't cares and masked irqs */
- status |= (ignore | mask);
-
- if (status == 0xff)
- return NO_IRQ;
-
- cpld_irq = ffz(status) + offset;
-
- return irq_linear_revmap(cpld_pic_host, cpld_irq);
-}
-
-static void
-cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
-{
- irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
- &cpld_regs->pci_mask);
- if (irq != NO_IRQ) {
- generic_handle_irq(irq);
- return;
- }
-
- irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
- &cpld_regs->misc_mask);
- if (irq != NO_IRQ) {
- generic_handle_irq(irq);
- return;
- }
-}
-
-static int
-cpld_pic_host_match(struct irq_domain *h, struct device_node *node)
-{
- return cpld_pic_node == node;
-}
-
-static int
-cpld_pic_host_map(struct irq_domain *h, unsigned int virq,
- irq_hw_number_t hw)
-{
- irq_set_status_flags(virq, IRQ_LEVEL);
- irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq);
- return 0;
-}
-
-static const struct irq_domain_ops cpld_pic_host_ops = {
- .match = cpld_pic_host_match,
- .map = cpld_pic_host_map,
-};
-
-void __init
-mpc5121_ads_cpld_map(void)
-{
- struct device_node *np = NULL;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
- if (!np) {
- printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
- return;
- }
-
- cpld_regs = of_iomap(np, 0);
- of_node_put(np);
-}
-
-void __init
-mpc5121_ads_cpld_pic_init(void)
-{
- unsigned int cascade_irq;
- struct device_node *np = NULL;
-
- pr_debug("cpld_ic_init\n");
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
- if (!np) {
- printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
- return;
- }
-
- if (!cpld_regs)
- goto end;
-
- cascade_irq = irq_of_parse_and_map(np, 0);
- if (cascade_irq == NO_IRQ)
- goto end;
-
- /*
- * statically route touch screen pendown through 1
- * and ignore it here
- * route all others through our cascade irq
- */
- out_8(&cpld_regs->route, 0xfd);
- out_8(&cpld_regs->pci_mask, 0xff);
- /* unmask pci ints in misc mask */
- out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE));
-
- cpld_pic_node = of_node_get(np);
-
- cpld_pic_host = irq_domain_add_linear(np, 16, &cpld_pic_host_ops, NULL);
- if (!cpld_pic_host) {
- printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
- goto end;
- }
-
- irq_set_chained_handler(cascade_irq, cpld_pic_cascade);
-end:
- of_node_put(np);
-}
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_generic.c b/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_generic.c
deleted file mode 100644
index 926731f1..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc5121_generic.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby, <jrigby@freescale.com>
- *
- * Description:
- * MPC5121 SoC setup
- *
- * This is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/of_platform.h>
-
-#include <asm/machdep.h>
-#include <asm/ipic.h>
-#include <asm/prom.h>
-#include <asm/time.h>
-
-#include "mpc512x.h"
-
-/*
- * list of supported boards
- */
-static const char *board[] __initdata = {
- "prt,prtlvt",
- NULL
-};
-
-/*
- * Called very early, MMU is off, device-tree isn't unflattened
- */
-static int __init mpc5121_generic_probe(void)
-{
- return of_flat_dt_match(of_get_flat_dt_root(), board);
-}
-
-define_machine(mpc5121_generic) {
- .name = "MPC5121 generic",
- .probe = mpc5121_generic_probe,
- .init = mpc512x_init,
- .init_early = mpc512x_init_diu,
- .setup_arch = mpc512x_setup_diu,
- .init_IRQ = mpc512x_init_IRQ,
- .get_irq = ipic_get_irq,
- .calibrate_decr = generic_calibrate_decr,
- .restart = mpc512x_restart,
-};
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x.h b/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x.h
deleted file mode 100644
index 1ab6d11d..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- * Prototypes for MPC512x shared code
- */
-
-#ifndef __MPC512X_H__
-#define __MPC512X_H__
-extern void __init mpc512x_init_IRQ(void);
-extern void __init mpc512x_init(void);
-extern int __init mpc5121_clk_init(void);
-void __init mpc512x_declare_of_platform_devices(void);
-extern void mpc512x_restart(char *cmd);
-extern void mpc512x_init_diu(void);
-extern void mpc512x_setup_diu(void);
-#endif /* __MPC512X_H__ */
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x_shared.c b/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x_shared.c
deleted file mode 100644
index cfe958e9..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/*
- * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby <jrigby@freescale.com>
- *
- * Description:
- * MPC512x Shared code
- *
- * This is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/of_platform.h>
-#include <linux/fsl-diu-fb.h>
-#include <linux/bootmem.h>
-#include <sysdev/fsl_soc.h>
-
-#include <asm/cacheflush.h>
-#include <asm/machdep.h>
-#include <asm/ipic.h>
-#include <asm/prom.h>
-#include <asm/time.h>
-#include <asm/mpc5121.h>
-#include <asm/mpc52xx_psc.h>
-
-#include "mpc512x.h"
-
-static struct mpc512x_reset_module __iomem *reset_module_base;
-
-static void __init mpc512x_restart_init(void)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
- if (!np)
- return;
-
- reset_module_base = of_iomap(np, 0);
- of_node_put(np);
-}
-
-void mpc512x_restart(char *cmd)
-{
- if (reset_module_base) {
- /* Enable software reset "RSTE" */
- out_be32(&reset_module_base->rpr, 0x52535445);
- /* Set software hard reset */
- out_be32(&reset_module_base->rcr, 0x2);
- } else {
- pr_err("Restart module not mapped.\n");
- }
- for (;;)
- ;
-}
-
-struct fsl_diu_shared_fb {
- u8 gamma[0x300]; /* 32-bit aligned! */
- struct diu_ad ad0; /* 32-bit aligned! */
- phys_addr_t fb_phys;
- size_t fb_len;
- bool in_use;
-};
-
-u32 mpc512x_get_pixel_format(enum fsl_diu_monitor_port port,
- unsigned int bits_per_pixel)
-{
- switch (bits_per_pixel) {
- case 32:
- return 0x88883316;
- case 24:
- return 0x88082219;
- case 16:
- return 0x65053118;
- }
- return 0x00000400;
-}
-
-void mpc512x_set_gamma_table(enum fsl_diu_monitor_port port,
- char *gamma_table_base)
-{
-}
-
-void mpc512x_set_monitor_port(enum fsl_diu_monitor_port port)
-{
-}
-
-#define DIU_DIV_MASK 0x000000ff
-void mpc512x_set_pixel_clock(unsigned int pixclock)
-{
- unsigned long bestval, bestfreq, speed, busfreq;
- unsigned long minpixclock, maxpixclock, pixval;
- struct mpc512x_ccm __iomem *ccm;
- struct device_node *np;
- u32 temp;
- long err;
- int i;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
- if (!np) {
- pr_err("Can't find clock control module.\n");
- return;
- }
-
- ccm = of_iomap(np, 0);
- of_node_put(np);
- if (!ccm) {
- pr_err("Can't map clock control module reg.\n");
- return;
- }
-
- np = of_find_node_by_type(NULL, "cpu");
- if (np) {
- const unsigned int *prop =
- of_get_property(np, "bus-frequency", NULL);
-
- of_node_put(np);
- if (prop) {
- busfreq = *prop;
- } else {
- pr_err("Can't get bus-frequency property\n");
- return;
- }
- } else {
- pr_err("Can't find 'cpu' node.\n");
- return;
- }
-
- /* Pixel Clock configuration */
- pr_debug("DIU: Bus Frequency = %lu\n", busfreq);
- speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */
-
- /* Calculate the pixel clock with the smallest error */
- /* calculate the following in steps to avoid overflow */
- pr_debug("DIU pixclock in ps - %d\n", pixclock);
- temp = (1000000000 / pixclock) * 1000;
- pixclock = temp;
- pr_debug("DIU pixclock freq - %u\n", pixclock);
-
- temp = temp / 20; /* pixclock * 0.05 */
- pr_debug("deviation = %d\n", temp);
- minpixclock = pixclock - temp;
- maxpixclock = pixclock + temp;
- pr_debug("DIU minpixclock - %lu\n", minpixclock);
- pr_debug("DIU maxpixclock - %lu\n", maxpixclock);
- pixval = speed/pixclock;
- pr_debug("DIU pixval = %lu\n", pixval);
-
- err = LONG_MAX;
- bestval = pixval;
- pr_debug("DIU bestval = %lu\n", bestval);
-
- bestfreq = 0;
- for (i = -1; i <= 1; i++) {
- temp = speed / (pixval+i);
- pr_debug("DIU test pixval i=%d, pixval=%lu, temp freq. = %u\n",
- i, pixval, temp);
- if ((temp < minpixclock) || (temp > maxpixclock))
- pr_debug("DIU exceeds monitor range (%lu to %lu)\n",
- minpixclock, maxpixclock);
- else if (abs(temp - pixclock) < err) {
- pr_debug("Entered the else if block %d\n", i);
- err = abs(temp - pixclock);
- bestval = pixval + i;
- bestfreq = temp;
- }
- }
-
- pr_debug("DIU chose = %lx\n", bestval);
- pr_debug("DIU error = %ld\n NomPixClk ", err);
- pr_debug("DIU: Best Freq = %lx\n", bestfreq);
- /* Modify DIU_DIV in CCM SCFR1 */
- temp = in_be32(&ccm->scfr1);
- pr_debug("DIU: Current value of SCFR1: 0x%08x\n", temp);
- temp &= ~DIU_DIV_MASK;
- temp |= (bestval & DIU_DIV_MASK);
- out_be32(&ccm->scfr1, temp);
- pr_debug("DIU: Modified value of SCFR1: 0x%08x\n", temp);
- iounmap(ccm);
-}
-
-enum fsl_diu_monitor_port
-mpc512x_valid_monitor_port(enum fsl_diu_monitor_port port)
-{
- return FSL_DIU_PORT_DVI;
-}
-
-static struct fsl_diu_shared_fb __attribute__ ((__aligned__(8))) diu_shared_fb;
-
-#if defined(CONFIG_FB_FSL_DIU) || \
- defined(CONFIG_FB_FSL_DIU_MODULE)
-static inline void mpc512x_free_bootmem(struct page *page)
-{
- __ClearPageReserved(page);
- BUG_ON(PageTail(page));
- BUG_ON(atomic_read(&page->_count) > 1);
- atomic_set(&page->_count, 1);
- __free_page(page);
- totalram_pages++;
-}
-
-void mpc512x_release_bootmem(void)
-{
- unsigned long addr = diu_shared_fb.fb_phys & PAGE_MASK;
- unsigned long size = diu_shared_fb.fb_len;
- unsigned long start, end;
-
- if (diu_shared_fb.in_use) {
- start = PFN_UP(addr);
- end = PFN_DOWN(addr + size);
-
- for (; start < end; start++)
- mpc512x_free_bootmem(pfn_to_page(start));
-
- diu_shared_fb.in_use = false;
- }
- diu_ops.release_bootmem = NULL;
-}
-#endif
-
-/*
- * Check if DIU was pre-initialized. If so, perform steps
- * needed to continue displaying through the whole boot process.
- * Move area descriptor and gamma table elsewhere, they are
- * destroyed by bootmem allocator otherwise. The frame buffer
- * address range will be reserved in setup_arch() after bootmem
- * allocator is up.
- */
-void __init mpc512x_init_diu(void)
-{
- struct device_node *np;
- struct diu __iomem *diu_reg;
- phys_addr_t desc;
- void __iomem *vaddr;
- unsigned long mode, pix_fmt, res, bpp;
- unsigned long dst;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-diu");
- if (!np) {
- pr_err("No DIU node\n");
- return;
- }
-
- diu_reg = of_iomap(np, 0);
- of_node_put(np);
- if (!diu_reg) {
- pr_err("Can't map DIU\n");
- return;
- }
-
- mode = in_be32(&diu_reg->diu_mode);
- if (mode == MFB_MODE0) {
- pr_info("%s: DIU OFF\n", __func__);
- goto out;
- }
-
- desc = in_be32(&diu_reg->desc[0]);
- vaddr = ioremap(desc, sizeof(struct diu_ad));
- if (!vaddr) {
- pr_err("Can't map DIU area desc.\n");
- goto out;
- }
- memcpy(&diu_shared_fb.ad0, vaddr, sizeof(struct diu_ad));
- /* flush fb area descriptor */
- dst = (unsigned long)&diu_shared_fb.ad0;
- flush_dcache_range(dst, dst + sizeof(struct diu_ad) - 1);
-
- res = in_be32(&diu_reg->disp_size);
- pix_fmt = in_le32(vaddr);
- bpp = ((pix_fmt >> 16) & 0x3) + 1;
- diu_shared_fb.fb_phys = in_le32(vaddr + 4);
- diu_shared_fb.fb_len = ((res & 0xfff0000) >> 16) * (res & 0xfff) * bpp;
- diu_shared_fb.in_use = true;
- iounmap(vaddr);
-
- desc = in_be32(&diu_reg->gamma);
- vaddr = ioremap(desc, sizeof(diu_shared_fb.gamma));
- if (!vaddr) {
- pr_err("Can't map DIU area desc.\n");
- diu_shared_fb.in_use = false;
- goto out;
- }
- memcpy(&diu_shared_fb.gamma, vaddr, sizeof(diu_shared_fb.gamma));
- /* flush gamma table */
- dst = (unsigned long)&diu_shared_fb.gamma;
- flush_dcache_range(dst, dst + sizeof(diu_shared_fb.gamma) - 1);
-
- iounmap(vaddr);
- out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma));
- out_be32(&diu_reg->desc[1], 0);
- out_be32(&diu_reg->desc[2], 0);
- out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0));
-
-out:
- iounmap(diu_reg);
-}
-
-void __init mpc512x_setup_diu(void)
-{
- int ret;
-
- /*
- * We do not allocate and configure new area for bitmap buffer
- * because it would requere copying bitmap data (splash image)
- * and so negatively affect boot time. Instead we reserve the
- * already configured frame buffer area so that it won't be
- * destroyed. The starting address of the area to reserve and
- * also it's length is passed to reserve_bootmem(). It will be
- * freed later on first open of fbdev, when splash image is not
- * needed any more.
- */
- if (diu_shared_fb.in_use) {
- ret = reserve_bootmem(diu_shared_fb.fb_phys,
- diu_shared_fb.fb_len,
- BOOTMEM_EXCLUSIVE);
- if (ret) {
- pr_err("%s: reserve bootmem failed\n", __func__);
- diu_shared_fb.in_use = false;
- }
- }
-
-#if defined(CONFIG_FB_FSL_DIU) || \
- defined(CONFIG_FB_FSL_DIU_MODULE)
- diu_ops.get_pixel_format = mpc512x_get_pixel_format;
- diu_ops.set_gamma_table = mpc512x_set_gamma_table;
- diu_ops.set_monitor_port = mpc512x_set_monitor_port;
- diu_ops.set_pixel_clock = mpc512x_set_pixel_clock;
- diu_ops.valid_monitor_port = mpc512x_valid_monitor_port;
- diu_ops.release_bootmem = mpc512x_release_bootmem;
-#endif
-}
-
-void __init mpc512x_init_IRQ(void)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic");
- if (!np)
- return;
-
- ipic_init(np, 0);
- of_node_put(np);
-
- /*
- * Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- ipic_set_default_priority();
-}
-
-/*
- * Nodes to do bus probe on, soc and localbus
- */
-static struct of_device_id __initdata of_bus_ids[] = {
- { .compatible = "fsl,mpc5121-immr", },
- { .compatible = "fsl,mpc5121-localbus", },
- {},
-};
-
-void __init mpc512x_declare_of_platform_devices(void)
-{
- struct device_node *np;
-
- if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
- printk(KERN_ERR __FILE__ ": "
- "Error while probing of_platform bus\n");
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc");
- if (np) {
- of_platform_device_create(np, NULL, NULL);
- of_node_put(np);
- }
-}
-
-#define DEFAULT_FIFO_SIZE 16
-
-static unsigned int __init get_fifo_size(struct device_node *np,
- char *prop_name)
-{
- const unsigned int *fp;
-
- fp = of_get_property(np, prop_name, NULL);
- if (fp)
- return *fp;
-
- pr_warning("no %s property in %s node, defaulting to %d\n",
- prop_name, np->full_name, DEFAULT_FIFO_SIZE);
-
- return DEFAULT_FIFO_SIZE;
-}
-
-#define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \
- ((u32)(_base) + sizeof(struct mpc52xx_psc)))
-
-/* Init PSC FIFO space for TX and RX slices */
-void __init mpc512x_psc_fifo_init(void)
-{
- struct device_node *np;
- void __iomem *psc;
- unsigned int tx_fifo_size;
- unsigned int rx_fifo_size;
- int fifobase = 0; /* current fifo address in 32 bit words */
-
- for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
- tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
- rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
-
- /* size in register is in 4 byte units */
- tx_fifo_size /= 4;
- rx_fifo_size /= 4;
- if (!tx_fifo_size)
- tx_fifo_size = 1;
- if (!rx_fifo_size)
- rx_fifo_size = 1;
-
- psc = of_iomap(np, 0);
- if (!psc) {
- pr_err("%s: Can't map %s device\n",
- __func__, np->full_name);
- continue;
- }
-
- /* FIFO space is 4KiB, check if requested size is available */
- if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) {
- pr_err("%s: no fifo space available for %s\n",
- __func__, np->full_name);
- iounmap(psc);
- /*
- * chances are that another device requests less
- * fifo space, so we continue.
- */
- continue;
- }
-
- /* set tx and rx fifo size registers */
- out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size);
- fifobase += tx_fifo_size;
- out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size);
- fifobase += rx_fifo_size;
-
- /* reset and enable the slices */
- out_be32(&FIFOC(psc)->txcmd, 0x80);
- out_be32(&FIFOC(psc)->txcmd, 0x01);
- out_be32(&FIFOC(psc)->rxcmd, 0x80);
- out_be32(&FIFOC(psc)->rxcmd, 0x01);
-
- iounmap(psc);
- }
-}
-
-void __init mpc512x_init(void)
-{
- mpc512x_declare_of_platform_devices();
- mpc5121_clk_init();
- mpc512x_restart_init();
- mpc512x_psc_fifo_init();
-}
diff --git a/ANDROID_3.4.5/arch/powerpc/platforms/512x/pdm360ng.c b/ANDROID_3.4.5/arch/powerpc/platforms/512x/pdm360ng.c
deleted file mode 100644
index 0575e858..00000000
--- a/ANDROID_3.4.5/arch/powerpc/platforms/512x/pdm360ng.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * Copyright (C) 2010 DENX Software Engineering
- *
- * Anatolij Gustschin, <agust@denx.de>
- *
- * PDM360NG board setup
- *
- * This is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/of_platform.h>
-
-#include <asm/machdep.h>
-#include <asm/ipic.h>
-
-#include "mpc512x.h"
-
-#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
- defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
-#include <linux/interrupt.h>
-#include <linux/spi/ads7846.h>
-#include <linux/spi/spi.h>
-#include <linux/notifier.h>
-
-static void *pdm360ng_gpio_base;
-
-static int pdm360ng_get_pendown_state(void)
-{
- u32 reg;
-
- reg = in_be32(pdm360ng_gpio_base + 0xc);
- if (reg & 0x40)
- setbits32(pdm360ng_gpio_base + 0xc, 0x40);
-
- reg = in_be32(pdm360ng_gpio_base + 0x8);
-
- /* return 1 if pen is down */
- return (reg & 0x40) == 0;
-}
-
-static struct ads7846_platform_data pdm360ng_ads7846_pdata = {
- .model = 7845,
- .get_pendown_state = pdm360ng_get_pendown_state,
- .irq_flags = IRQF_TRIGGER_LOW,
-};
-
-static int __init pdm360ng_penirq_init(void)
-{
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-gpio");
- if (!np) {
- pr_err("%s: Can't find 'mpc5121-gpio' node\n", __func__);
- return -ENODEV;
- }
-
- pdm360ng_gpio_base = of_iomap(np, 0);
- of_node_put(np);
- if (!pdm360ng_gpio_base) {
- pr_err("%s: Can't map gpio regs.\n", __func__);
- return -ENODEV;
- }
- out_be32(pdm360ng_gpio_base + 0xc, 0xffffffff);
- setbits32(pdm360ng_gpio_base + 0x18, 0x2000);
- setbits32(pdm360ng_gpio_base + 0x10, 0x40);
-
- return 0;
-}
-
-static int pdm360ng_touchscreen_notifier_call(struct notifier_block *nb,
- unsigned long event, void *__dev)
-{
- struct device *dev = __dev;
-
- if ((event == BUS_NOTIFY_ADD_DEVICE) &&
- of_device_is_compatible(dev->of_node, "ti,ads7846")) {
- dev->platform_data = &pdm360ng_ads7846_pdata;
- return NOTIFY_OK;
- }
- return NOTIFY_DONE;
-}
-
-static struct notifier_block pdm360ng_touchscreen_nb = {
- .notifier_call = pdm360ng_touchscreen_notifier_call,
-};
-
-static void __init pdm360ng_touchscreen_init(void)
-{
- if (pdm360ng_penirq_init())
- return;
-
- bus_register_notifier(&spi_bus_type, &pdm360ng_touchscreen_nb);
-}
-#else
-static inline void __init pdm360ng_touchscreen_init(void)
-{
-}
-#endif /* CONFIG_TOUCHSCREEN_ADS7846 */
-
-void __init pdm360ng_init(void)
-{
- mpc512x_init();
- pdm360ng_touchscreen_init();
-}
-
-static int __init pdm360ng_probe(void)
-{
- unsigned long root = of_get_flat_dt_root();
-
- return of_flat_dt_is_compatible(root, "ifm,pdm360ng");
-}
-
-define_machine(pdm360ng) {
- .name = "PDM360NG",
- .probe = pdm360ng_probe,
- .setup_arch = mpc512x_setup_diu,
- .init = pdm360ng_init,
- .init_early = mpc512x_init_diu,
- .init_IRQ = mpc512x_init_IRQ,
- .get_irq = ipic_get_irq,
- .calibrate_decr = generic_calibrate_decr,
- .restart = mpc512x_restart,
-};