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author | Kevin | 2014-11-15 09:58:27 +0800 |
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committer | Kevin | 2014-11-15 09:58:27 +0800 |
commit | 392e8802486cb573b916e746010e141a75f507e6 (patch) | |
tree | 50029aca02c81f087b90336e670b44e510782330 /ANDROID_3.4.5/arch/arm/plat-s3c24xx/clock.c | |
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init android origin source code
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/plat-s3c24xx/clock.c')
-rw-r--r-- | ANDROID_3.4.5/arch/arm/plat-s3c24xx/clock.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/ANDROID_3.4.5/arch/arm/plat-s3c24xx/clock.c b/ANDROID_3.4.5/arch/arm/plat-s3c24xx/clock.c new file mode 100644 index 00000000..931d26d1 --- /dev/null +++ b/ANDROID_3.4.5/arch/arm/plat-s3c24xx/clock.c @@ -0,0 +1,59 @@ +/* linux/arch/arm/plat-s3c24xx/clock.c + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C24XX Core clock control support + * + * Based on, and code from linux/arch/arm/mach-versatile/clock.c + ** + ** Copyright (C) 2004 ARM Limited. + ** Written by Deep Blue Solutions Limited. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA +*/ + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/clk.h> +#include <linux/io.h> + +#include <mach/hardware.h> +#include <asm/irq.h> + +#include <mach/regs-clock.h> +#include <mach/regs-gpio.h> + +#include <plat/cpu-freq.h> + +#include <plat/clock.h> +#include <plat/cpu.h> +#include <plat/pll.h> + +/* initialise all the clocks */ + +void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk, + unsigned long hclk, + unsigned long pclk) +{ + clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), + clk_xtal.rate); + + clk_mpll.rate = fclk; + clk_h.rate = hclk; + clk_p.rate = pclk; + clk_f.rate = fclk; +} |