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author | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
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committer | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
commit | 871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch) | |
tree | 8718f573808810c2a1e8cb8fb6ac469093ca2784 /ANDROID_3.4.5/arch/arm/mach-s5pv210 | |
parent | 9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff) | |
download | FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.tar.gz FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.tar.bz2 FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.zip |
Moved, renamed, and deleted files
The original directory structure was scattered and unorganized.
Changes are basically to make it look like kernel structure.
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-s5pv210')
41 files changed, 0 insertions, 6330 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/Kconfig b/ANDROID_3.4.5/arch/arm/mach-s5pv210/Kconfig deleted file mode 100644 index 29594fc4..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/Kconfig +++ /dev/null @@ -1,195 +0,0 @@ -# arch/arm/mach-s5pv210/Kconfig -# -# Copyright (c) 2010 Samsung Electronics Co., Ltd. -# http://www.samsung.com/ -# -# Licensed under GPLv2 - -# Configuration options for the S5PV210/S5PC110 - -if ARCH_S5PV210 - -config CPU_S5PV210 - bool - select SAMSUNG_DMADEV - select S5P_EXT_INT - select S5P_HRT - select S5P_PM if PM - select S5P_SLEEP if PM - help - Enable S5PV210 CPU support - -config S5PV210_SETUP_I2C1 - bool - help - Common setup code for i2c bus 1. - -config S5PV210_SETUP_I2C2 - bool - help - Common setup code for i2c bus 2. - -config S5PV210_SETUP_IDE - bool - help - Common setup code for S5PV210 IDE GPIO configurations - -config S5PV210_SETUP_FB_24BPP - bool - help - Common setup code for S5PV210 with an 24bpp RGB display helper. - -config S5PV210_SETUP_KEYPAD - bool - help - Common setup code for keypad. - -config S5PV210_SETUP_SDHCI - bool - select S5PV210_SETUP_SDHCI_GPIO - help - Internal helper functions for S5PV210 based SDHCI systems - -config S5PV210_SETUP_SDHCI_GPIO - bool - help - Common setup code for SDHCI gpio. - -config S5PV210_SETUP_FIMC - bool - help - Common setup code for the camera interfaces. - -config S5PV210_SETUP_SPI - bool - help - Common setup code for SPI GPIO configurations. - -config S5PV210_SETUP_USB_PHY - bool - help - Common setup code for USB PHY controller - -menu "S5PC110 Machines" - -config MACH_AQUILA - bool "Aquila" - select CPU_S5PV210 - select S3C_DEV_FB - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S5P_DEV_ONENAND - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_SDHCI - help - Machine support for the Samsung Aquila target based on S5PC110 SoC - -config MACH_GONI - bool "GONI" - select CPU_S5PV210 - select S5P_GPIO_INT - select S3C_DEV_FB - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S5P_DEV_MFC - select S3C_DEV_USB_HSOTG - select S5P_DEV_ONENAND - select SAMSUNG_DEV_KEYPAD - select S5P_DEV_TV - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_KEYPAD - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_FIMC - select S5PV210_SETUP_USB_PHY - help - Machine support for Samsung GONI board - S5PC110(MCP) is one of package option of S5PV210 - -config MACH_SMDKC110 - bool "SMDKC110" - select CPU_S5PV210 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_MFC - select SAMSUNG_DEV_IDE - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_IDE - help - Machine support for Samsung SMDKC110 - S5PC110(MCP) is one of package option of S5PV210 - -endmenu - -menu "S5PV210 Machines" - -config MACH_SMDKV210 - bool "SMDKV210" - select CPU_S5PV210 - select S3C_DEV_FB - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_JPEG - select S5P_DEV_MFC - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_IDE - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_IDE - select S5PV210_SETUP_KEYPAD - select S5PV210_SETUP_SDHCI - help - Machine support for Samsung SMDKV210 - -config MACH_TORBRECK - bool "Torbreck" - select CPU_S5PV210 - select ARCH_SPARSEMEM_ENABLE - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_I2C1 - select S3C_DEV_I2C2 - select S3C_DEV_RTC - select S3C_DEV_WDT - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_SDHCI - help - Machine support for aESOP Torbreck - -endmenu - -endif diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/Makefile b/ANDROID_3.4.5/arch/arm/mach-s5pv210/Makefile deleted file mode 100644 index 1c4e4199..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/Makefile +++ /dev/null @@ -1,42 +0,0 @@ -# arch/arm/mach-s5pv210/Makefile -# -# Copyright (c) 2010 Samsung Electronics Co., Ltd. -# http://www.samsung.com/ -# -# Licensed under GPLv2 - -obj-y := -obj-m := -obj-n := -obj- := - -# Core - -obj-y += common.o clock.o - -obj-$(CONFIG_PM) += pm.o - -obj-y += dma.o - -# machine support - -obj-$(CONFIG_MACH_AQUILA) += mach-aquila.o -obj-$(CONFIG_MACH_GONI) += mach-goni.o -obj-$(CONFIG_MACH_SMDKC110) += mach-smdkc110.o -obj-$(CONFIG_MACH_SMDKV210) += mach-smdkv210.o -obj-$(CONFIG_MACH_TORBRECK) += mach-torbreck.o - -# device support - -obj-y += dev-audio.o - -obj-y += setup-i2c0.o -obj-$(CONFIG_S5PV210_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S5PV210_SETUP_FIMC) += setup-fimc.o -obj-$(CONFIG_S5PV210_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S5PV210_SETUP_I2C2) += setup-i2c2.o -obj-$(CONFIG_S5PV210_SETUP_IDE) += setup-ide.o -obj-$(CONFIG_S5PV210_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_S5PV210_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S5PV210_SETUP_SPI) += setup-spi.o -obj-$(CONFIG_S5PV210_SETUP_USB_PHY) += setup-usb-phy.o diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/Makefile.boot b/ANDROID_3.4.5/arch/arm/mach-s5pv210/Makefile.boot deleted file mode 100644 index 79ece405..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/Makefile.boot +++ /dev/null @@ -1,2 +0,0 @@ - zreladdr-y += 0x20008000 -params_phys-y := 0x20000100 diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/clock.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/clock.c deleted file mode 100644 index 09609d50..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/clock.c +++ /dev/null @@ -1,1366 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/clock.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/errno.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/device.h> -#include <linux/io.h> - -#include <mach/map.h> - -#include <plat/cpu-freq.h> -#include <mach/regs-clock.h> -#include <plat/clock.h> -#include <plat/cpu.h> -#include <plat/pll.h> -#include <plat/s5p-clock.h> -#include <plat/clock-clksrc.h> - -#include "common.h" - -static unsigned long xtal; - -static struct clksrc_clk clk_mout_apll = { - .clk = { - .name = "mout_apll", - }, - .sources = &clk_src_apll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_epll = { - .clk = { - .name = "mout_epll", - }, - .sources = &clk_src_epll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_mout_mpll = { - .clk = { - .name = "mout_mpll", - }, - .sources = &clk_src_mpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 4, .size = 1 }, -}; - -static struct clk *clkset_armclk_list[] = { - [0] = &clk_mout_apll.clk, - [1] = &clk_mout_mpll.clk, -}; - -static struct clksrc_sources clkset_armclk = { - .sources = clkset_armclk_list, - .nr_sources = ARRAY_SIZE(clkset_armclk_list), -}; - -static struct clksrc_clk clk_armclk = { - .clk = { - .name = "armclk", - }, - .sources = &clkset_armclk, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 3 }, -}; - -static struct clksrc_clk clk_hclk_msys = { - .clk = { - .name = "hclk_msys", - .parent = &clk_armclk.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 3 }, -}; - -static struct clksrc_clk clk_pclk_msys = { - .clk = { - .name = "pclk_msys", - .parent = &clk_hclk_msys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 3 }, -}; - -static struct clksrc_clk clk_sclk_a2m = { - .clk = { - .name = "sclk_a2m", - .parent = &clk_mout_apll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 3 }, -}; - -static struct clk *clkset_hclk_sys_list[] = { - [0] = &clk_mout_mpll.clk, - [1] = &clk_sclk_a2m.clk, -}; - -static struct clksrc_sources clkset_hclk_sys = { - .sources = clkset_hclk_sys_list, - .nr_sources = ARRAY_SIZE(clkset_hclk_sys_list), -}; - -static struct clksrc_clk clk_hclk_dsys = { - .clk = { - .name = "hclk_dsys", - }, - .sources = &clkset_hclk_sys, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_dsys = { - .clk = { - .name = "pclk_dsys", - .parent = &clk_hclk_dsys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 20, .size = 3 }, -}; - -static struct clksrc_clk clk_hclk_psys = { - .clk = { - .name = "hclk_psys", - }, - .sources = &clkset_hclk_sys, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 24, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_pclk_psys = { - .clk = { - .name = "pclk_psys", - .parent = &clk_hclk_psys.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV0, .shift = 28, .size = 3 }, -}; - -static int s5pv210_clk_ip0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable); -} - -static int s5pv210_clk_ip1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP1, clk, enable); -} - -static int s5pv210_clk_ip2_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP2, clk, enable); -} - -static int s5pv210_clk_ip3_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable); -} - -static int s5pv210_clk_mask0_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLK_SRC_MASK0, clk, enable); -} - -static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); -} - -static int s5pv210_clk_hdmiphy_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); -} - -static int exynos4_clk_dac_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_DAC_PHY_CONTROL, clk, enable); -} - -static struct clk clk_sclk_hdmi27m = { - .name = "sclk_hdmi27m", - .rate = 27000000, -}; - -static struct clk clk_sclk_hdmiphy = { - .name = "sclk_hdmiphy", -}; - -static struct clk clk_sclk_usbphy0 = { - .name = "sclk_usbphy0", -}; - -static struct clk clk_sclk_usbphy1 = { - .name = "sclk_usbphy1", -}; - -static struct clk clk_pcmcdclk0 = { - .name = "pcmcdclk", -}; - -static struct clk clk_pcmcdclk1 = { - .name = "pcmcdclk", -}; - -static struct clk clk_pcmcdclk2 = { - .name = "pcmcdclk", -}; - -static struct clk dummy_apb_pclk = { - .name = "apb_pclk", - .id = -1, -}; - -static struct clk *clkset_vpllsrc_list[] = { - [0] = &clk_fin_vpll, - [1] = &clk_sclk_hdmi27m, -}; - -static struct clksrc_sources clkset_vpllsrc = { - .sources = clkset_vpllsrc_list, - .nr_sources = ARRAY_SIZE(clkset_vpllsrc_list), -}; - -static struct clksrc_clk clk_vpllsrc = { - .clk = { - .name = "vpll_src", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 7), - }, - .sources = &clkset_vpllsrc, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 28, .size = 1 }, -}; - -static struct clk *clkset_sclk_vpll_list[] = { - [0] = &clk_vpllsrc.clk, - [1] = &clk_fout_vpll, -}; - -static struct clksrc_sources clkset_sclk_vpll = { - .sources = clkset_sclk_vpll_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_vpll_list), -}; - -static struct clksrc_clk clk_sclk_vpll = { - .clk = { - .name = "sclk_vpll", - }, - .sources = &clkset_sclk_vpll, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 12, .size = 1 }, -}; - -static struct clk *clkset_moutdmc0src_list[] = { - [0] = &clk_sclk_a2m.clk, - [1] = &clk_mout_mpll.clk, - [2] = NULL, - [3] = NULL, -}; - -static struct clksrc_sources clkset_moutdmc0src = { - .sources = clkset_moutdmc0src_list, - .nr_sources = ARRAY_SIZE(clkset_moutdmc0src_list), -}; - -static struct clksrc_clk clk_mout_dmc0 = { - .clk = { - .name = "mout_dmc0", - }, - .sources = &clkset_moutdmc0src, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 }, -}; - -static struct clksrc_clk clk_sclk_dmc0 = { - .clk = { - .name = "sclk_dmc0", - .parent = &clk_mout_dmc0.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 }, -}; - -static unsigned long s5pv210_clk_imem_get_rate(struct clk *clk) -{ - return clk_get_rate(clk->parent) / 2; -} - -static struct clk_ops clk_hclk_imem_ops = { - .get_rate = s5pv210_clk_imem_get_rate, -}; - -static unsigned long s5pv210_clk_fout_apll_get_rate(struct clk *clk) -{ - return s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); -} - -static struct clk_ops clk_fout_apll_ops = { - .get_rate = s5pv210_clk_fout_apll_get_rate, -}; - -static struct clk init_clocks_off[] = { - { - .name = "dma", - .devname = "dma-pl330.0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 3), - }, { - .name = "dma", - .devname = "dma-pl330.1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 4), - }, { - .name = "rot", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1<<29), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.0", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 24), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.1", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 25), - }, { - .name = "fimc", - .devname = "s5pv210-fimc.2", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 26), - }, { - .name = "jpeg", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 28), - }, { - .name = "mfc", - .devname = "s5p-mfc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 16), - }, { - .name = "dac", - .devname = "s5p-sdo", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "mixer", - .devname = "s5p-mixer", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 9), - }, { - .name = "vp", - .devname = "s5p-mixer", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 8), - }, { - .name = "hdmi", - .devname = "s5pv210-hdmi", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "hdmiphy", - .devname = "s5pv210-hdmi", - .enable = s5pv210_clk_hdmiphy_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "dacphy", - .devname = "s5p-sdo", - .enable = exynos4_clk_dac_ctrl, - .ctrlbit = (1 << 0), - }, { - .name = "otg", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<16), - }, { - .name = "usb-host", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<17), - }, { - .name = "lcd", - .parent = &clk_hclk_dsys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<0), - }, { - .name = "cfcon", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1<<25), - }, { - .name = "systimer", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<16), - }, { - .name = "watchdog", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<22), - }, { - .name = "rtc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<15), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<7), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 10), - }, { - .name = "i2c", - .devname = "s3c2440-i2c.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<9), - }, { - .name = "i2c", - .devname = "s3c2440-hdmiphy-i2c", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 11), - }, { - .name = "spi", - .devname = "s3c64xx-spi.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<12), - }, { - .name = "spi", - .devname = "s3c64xx-spi.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<13), - }, { - .name = "spi", - .devname = "s3c64xx-spi.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<14), - }, { - .name = "timers", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<23), - }, { - .name = "adc", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<24), - }, { - .name = "keypad", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<21), - }, { - .name = "iis", - .devname = "samsung-i2s.0", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1<<4), - }, { - .name = "iis", - .devname = "samsung-i2s.1", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 5), - }, { - .name = "iis", - .devname = "samsung-i2s.2", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 6), - }, { - .name = "spdif", - .parent = &clk_p, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 0), - }, -}; - -static struct clk init_clocks[] = { - { - .name = "hclk_imem", - .parent = &clk_hclk_msys.clk, - .ctrlbit = (1 << 5), - .enable = s5pv210_clk_ip0_ctrl, - .ops = &clk_hclk_imem_ops, - }, { - .name = "uart", - .devname = "s5pv210-uart.0", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 17), - }, { - .name = "uart", - .devname = "s5pv210-uart.1", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 18), - }, { - .name = "uart", - .devname = "s5pv210-uart.2", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 19), - }, { - .name = "uart", - .devname = "s5pv210-uart.3", - .parent = &clk_pclk_psys.clk, - .enable = s5pv210_clk_ip3_ctrl, - .ctrlbit = (1 << 20), - }, { - .name = "sromc", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip1_ctrl, - .ctrlbit = (1 << 26), - }, -}; - -static struct clk clk_hsmmc0 = { - .name = "hsmmc", - .devname = "s3c-sdhci.0", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<16), -}; - -static struct clk clk_hsmmc1 = { - .name = "hsmmc", - .devname = "s3c-sdhci.1", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<17), -}; - -static struct clk clk_hsmmc2 = { - .name = "hsmmc", - .devname = "s3c-sdhci.2", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<18), -}; - -static struct clk clk_hsmmc3 = { - .name = "hsmmc", - .devname = "s3c-sdhci.3", - .parent = &clk_hclk_psys.clk, - .enable = s5pv210_clk_ip2_ctrl, - .ctrlbit = (1<<19), -}; - -static struct clk *clkset_uart_list[] = { - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, -}; - -static struct clksrc_sources clkset_uart = { - .sources = clkset_uart_list, - .nr_sources = ARRAY_SIZE(clkset_uart_list), -}; - -static struct clk *clkset_group1_list[] = { - [0] = &clk_sclk_a2m.clk, - [1] = &clk_mout_mpll.clk, - [2] = &clk_mout_epll.clk, - [3] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_group1 = { - .sources = clkset_group1_list, - .nr_sources = ARRAY_SIZE(clkset_group1_list), -}; - -static struct clk *clkset_sclk_onenand_list[] = { - [0] = &clk_hclk_psys.clk, - [1] = &clk_hclk_dsys.clk, -}; - -static struct clksrc_sources clkset_sclk_onenand = { - .sources = clkset_sclk_onenand_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_onenand_list), -}; - -static struct clk *clkset_sclk_dac_list[] = { - [0] = &clk_sclk_vpll.clk, - [1] = &clk_sclk_hdmiphy, -}; - -static struct clksrc_sources clkset_sclk_dac = { - .sources = clkset_sclk_dac_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_dac_list), -}; - -static struct clksrc_clk clk_sclk_dac = { - .clk = { - .name = "sclk_dac", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 2), - }, - .sources = &clkset_sclk_dac, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 }, -}; - -static struct clksrc_clk clk_sclk_pixel = { - .clk = { - .name = "sclk_pixel", - .parent = &clk_sclk_vpll.clk, - }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4}, -}; - -static struct clk *clkset_sclk_hdmi_list[] = { - [0] = &clk_sclk_pixel.clk, - [1] = &clk_sclk_hdmiphy, -}; - -static struct clksrc_sources clkset_sclk_hdmi = { - .sources = clkset_sclk_hdmi_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list), -}; - -static struct clksrc_clk clk_sclk_hdmi = { - .clk = { - .name = "sclk_hdmi", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 0), - }, - .sources = &clkset_sclk_hdmi, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 }, -}; - -static struct clk *clkset_sclk_mixer_list[] = { - [0] = &clk_sclk_dac.clk, - [1] = &clk_sclk_hdmi.clk, -}; - -static struct clksrc_sources clkset_sclk_mixer = { - .sources = clkset_sclk_mixer_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list), -}; - -static struct clksrc_clk clk_sclk_mixer = { - .clk = { - .name = "sclk_mixer", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 1), - }, - .sources = &clkset_sclk_mixer, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 }, -}; - -static struct clksrc_clk *sclk_tv[] = { - &clk_sclk_dac, - &clk_sclk_pixel, - &clk_sclk_hdmi, - &clk_sclk_mixer, -}; - -static struct clk *clkset_sclk_audio0_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk0, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio0 = { - .sources = clkset_sclk_audio0_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list), -}; - -static struct clksrc_clk clk_sclk_audio0 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 24), - }, - .sources = &clkset_sclk_audio0, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 0, .size = 4 }, -}; - -static struct clk *clkset_sclk_audio1_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk1, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio1 = { - .sources = clkset_sclk_audio1_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio1_list), -}; - -static struct clksrc_clk clk_sclk_audio1 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 25), - }, - .sources = &clkset_sclk_audio1, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 4, .size = 4 }, -}; - -static struct clk *clkset_sclk_audio2_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_pcmcdclk0, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_sclk_audio2 = { - .sources = clkset_sclk_audio2_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_audio2_list), -}; - -static struct clksrc_clk clk_sclk_audio2 = { - .clk = { - .name = "sclk_audio", - .devname = "soc-audio.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 26), - }, - .sources = &clkset_sclk_audio2, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 8, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 8, .size = 4 }, -}; - -static struct clk *clkset_sclk_spdif_list[] = { - [0] = &clk_sclk_audio0.clk, - [1] = &clk_sclk_audio1.clk, - [2] = &clk_sclk_audio2.clk, -}; - -static struct clksrc_sources clkset_sclk_spdif = { - .sources = clkset_sclk_spdif_list, - .nr_sources = ARRAY_SIZE(clkset_sclk_spdif_list), -}; - -static struct clksrc_clk clk_sclk_spdif = { - .clk = { - .name = "sclk_spdif", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 27), - .ops = &s5p_sclk_spdif_ops, - }, - .sources = &clkset_sclk_spdif, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 12, .size = 2 }, -}; - -static struct clk *clkset_group2_list[] = { - [0] = &clk_ext_xtal_mux, - [1] = &clk_xusbxti, - [2] = &clk_sclk_hdmi27m, - [3] = &clk_sclk_usbphy0, - [4] = &clk_sclk_usbphy1, - [5] = &clk_sclk_hdmiphy, - [6] = &clk_mout_mpll.clk, - [7] = &clk_mout_epll.clk, - [8] = &clk_sclk_vpll.clk, -}; - -static struct clksrc_sources clkset_group2 = { - .sources = clkset_group2_list, - .nr_sources = ARRAY_SIZE(clkset_group2_list), -}; - -static struct clksrc_clk clksrcs[] = { - { - .clk = { - .name = "sclk_dmc", - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 24, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 28, .size = 4 }, - }, { - .clk = { - .name = "sclk_onenand", - }, - .sources = &clkset_sclk_onenand, - .reg_src = { .reg = S5P_CLK_SRC0, .shift = 28, .size = 1 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 12, .size = 3 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.0", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 2), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.1", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 3), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimc", - .devname = "s5pv210-fimc.2", - .enable = s5pv210_clk_mask1_ctrl, - .ctrlbit = (1 << 4), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC3, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV3, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_cam0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 3), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 }, - }, { - .clk = { - .name = "sclk_cam1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 4), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 16, .size = 4 }, - }, { - .clk = { - .name = "sclk_fimd", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 5), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 20, .size = 4 }, - }, { - .clk = { - .name = "sclk_mfc", - .devname = "s5p-mfc", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 16), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 4, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 }, - }, { - .clk = { - .name = "sclk_g2d", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 12), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 8, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 }, - }, { - .clk = { - .name = "sclk_g3d", - .enable = s5pv210_clk_ip0_ctrl, - .ctrlbit = (1 << 8), - }, - .sources = &clkset_group1, - .reg_src = { .reg = S5P_CLK_SRC2, .shift = 0, .size = 2 }, - .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 }, - }, { - .clk = { - .name = "sclk_csis", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 6), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC1, .shift = 24, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwi", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 29), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC6, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV6, .shift = 24, .size = 4 }, - }, { - .clk = { - .name = "sclk_pwm", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 19), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 12, .size = 4 }, - }, -}; - -static struct clksrc_clk clk_sclk_uart0 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 12), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart1 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 13), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 20, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 20, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart2 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 14), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 24, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 24, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_uart3 = { - .clk = { - .name = "uclk1", - .devname = "s5pv210-uart.3", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 15), - }, - .sources = &clkset_uart, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 28, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 28, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc0 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 8), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 0, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc1 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 9), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 4, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc2 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.2", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 10), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 8, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 8, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_mmc3 = { - .clk = { - .name = "sclk_mmc", - .devname = "s3c-sdhci.3", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 11), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC4, .shift = 12, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV4, .shift = 12, .size = 4 }, -}; - -static struct clksrc_clk clk_sclk_spi0 = { - .clk = { - .name = "sclk_spi", - .devname = "s3c64xx-spi.0", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 16), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 }, - }; - -static struct clksrc_clk clk_sclk_spi1 = { - .clk = { - .name = "sclk_spi", - .devname = "s3c64xx-spi.1", - .enable = s5pv210_clk_mask0_ctrl, - .ctrlbit = (1 << 17), - }, - .sources = &clkset_group2, - .reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 }, - .reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 }, - }; - - -static struct clksrc_clk *clksrc_cdev[] = { - &clk_sclk_uart0, - &clk_sclk_uart1, - &clk_sclk_uart2, - &clk_sclk_uart3, - &clk_sclk_mmc0, - &clk_sclk_mmc1, - &clk_sclk_mmc2, - &clk_sclk_mmc3, - &clk_sclk_spi0, - &clk_sclk_spi1, -}; - -static struct clk *clk_cdev[] = { - &clk_hsmmc0, - &clk_hsmmc1, - &clk_hsmmc2, - &clk_hsmmc3, -}; - -/* Clock initialisation code */ -static struct clksrc_clk *sysclks[] = { - &clk_mout_apll, - &clk_mout_epll, - &clk_mout_mpll, - &clk_armclk, - &clk_hclk_msys, - &clk_sclk_a2m, - &clk_hclk_dsys, - &clk_hclk_psys, - &clk_pclk_msys, - &clk_pclk_dsys, - &clk_pclk_psys, - &clk_vpllsrc, - &clk_sclk_vpll, - &clk_mout_dmc0, - &clk_sclk_dmc0, - &clk_sclk_audio0, - &clk_sclk_audio1, - &clk_sclk_audio2, - &clk_sclk_spdif, -}; - -static u32 epll_div[][6] = { - { 48000000, 0, 48, 3, 3, 0 }, - { 96000000, 0, 48, 3, 2, 0 }, - { 144000000, 1, 72, 3, 2, 0 }, - { 192000000, 0, 48, 3, 1, 0 }, - { 288000000, 1, 72, 3, 1, 0 }, - { 32750000, 1, 65, 3, 4, 35127 }, - { 32768000, 1, 65, 3, 4, 35127 }, - { 45158400, 0, 45, 3, 3, 10355 }, - { 45000000, 0, 45, 3, 3, 10355 }, - { 45158000, 0, 45, 3, 3, 10355 }, - { 49125000, 0, 49, 3, 3, 9961 }, - { 49152000, 0, 49, 3, 3, 9961 }, - { 67737600, 1, 67, 3, 3, 48366 }, - { 67738000, 1, 67, 3, 3, 48366 }, - { 73800000, 1, 73, 3, 3, 47710 }, - { 73728000, 1, 73, 3, 3, 47710 }, - { 36000000, 1, 32, 3, 4, 0 }, - { 60000000, 1, 60, 3, 3, 0 }, - { 72000000, 1, 72, 3, 3, 0 }, - { 80000000, 1, 80, 3, 3, 0 }, - { 84000000, 0, 42, 3, 2, 0 }, - { 50000000, 0, 50, 3, 3, 0 }, -}; - -static int s5pv210_epll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int epll_con, epll_con_k; - unsigned int i; - - /* Return if nothing changed */ - if (clk->rate == rate) - return 0; - - epll_con = __raw_readl(S5P_EPLL_CON); - epll_con_k = __raw_readl(S5P_EPLL_CON1); - - epll_con_k &= ~PLL46XX_KDIV_MASK; - epll_con &= ~(1 << 27 | - PLL46XX_MDIV_MASK << PLL46XX_MDIV_SHIFT | - PLL46XX_PDIV_MASK << PLL46XX_PDIV_SHIFT | - PLL46XX_SDIV_MASK << PLL46XX_SDIV_SHIFT); - - for (i = 0; i < ARRAY_SIZE(epll_div); i++) { - if (epll_div[i][0] == rate) { - epll_con_k |= epll_div[i][5] << 0; - epll_con |= (epll_div[i][1] << 27 | - epll_div[i][2] << PLL46XX_MDIV_SHIFT | - epll_div[i][3] << PLL46XX_PDIV_SHIFT | - epll_div[i][4] << PLL46XX_SDIV_SHIFT); - break; - } - } - - if (i == ARRAY_SIZE(epll_div)) { - printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", - __func__); - return -EINVAL; - } - - __raw_writel(epll_con, S5P_EPLL_CON); - __raw_writel(epll_con_k, S5P_EPLL_CON1); - - printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n", - clk->rate, rate); - - clk->rate = rate; - - return 0; -} - -static struct clk_ops s5pv210_epll_ops = { - .set_rate = s5pv210_epll_set_rate, - .get_rate = s5p_epll_get_rate, -}; - -static u32 vpll_div[][5] = { - { 54000000, 3, 53, 3, 0 }, - { 108000000, 3, 53, 2, 0 }, -}; - -static unsigned long s5pv210_vpll_get_rate(struct clk *clk) -{ - return clk->rate; -} - -static int s5pv210_vpll_set_rate(struct clk *clk, unsigned long rate) -{ - unsigned int vpll_con; - unsigned int i; - - /* Return if nothing changed */ - if (clk->rate == rate) - return 0; - - vpll_con = __raw_readl(S5P_VPLL_CON); - vpll_con &= ~(0x1 << 27 | \ - PLL90XX_MDIV_MASK << PLL90XX_MDIV_SHIFT | \ - PLL90XX_PDIV_MASK << PLL90XX_PDIV_SHIFT | \ - PLL90XX_SDIV_MASK << PLL90XX_SDIV_SHIFT); - - for (i = 0; i < ARRAY_SIZE(vpll_div); i++) { - if (vpll_div[i][0] == rate) { - vpll_con |= vpll_div[i][1] << PLL90XX_PDIV_SHIFT; - vpll_con |= vpll_div[i][2] << PLL90XX_MDIV_SHIFT; - vpll_con |= vpll_div[i][3] << PLL90XX_SDIV_SHIFT; - vpll_con |= vpll_div[i][4] << 27; - break; - } - } - - if (i == ARRAY_SIZE(vpll_div)) { - printk(KERN_ERR "%s: Invalid Clock VPLL Frequency\n", - __func__); - return -EINVAL; - } - - __raw_writel(vpll_con, S5P_VPLL_CON); - - /* Wait for VPLL lock */ - while (!(__raw_readl(S5P_VPLL_CON) & (1 << PLL90XX_LOCKED_SHIFT))) - continue; - - clk->rate = rate; - return 0; -} -static struct clk_ops s5pv210_vpll_ops = { - .get_rate = s5pv210_vpll_get_rate, - .set_rate = s5pv210_vpll_set_rate, -}; - -void __init_or_cpufreq s5pv210_setup_clocks(void) -{ - struct clk *xtal_clk; - unsigned long vpllsrc; - unsigned long armclk; - unsigned long hclk_msys; - unsigned long hclk_dsys; - unsigned long hclk_psys; - unsigned long pclk_msys; - unsigned long pclk_dsys; - unsigned long pclk_psys; - unsigned long apll; - unsigned long mpll; - unsigned long epll; - unsigned long vpll; - unsigned int ptr; - u32 clkdiv0, clkdiv1; - - /* Set functions for clk_fout_epll */ - clk_fout_epll.enable = s5p_epll_enable; - clk_fout_epll.ops = &s5pv210_epll_ops; - - printk(KERN_DEBUG "%s: registering clocks\n", __func__); - - clkdiv0 = __raw_readl(S5P_CLK_DIV0); - clkdiv1 = __raw_readl(S5P_CLK_DIV1); - - printk(KERN_DEBUG "%s: clkdiv0 = %08x, clkdiv1 = %08x\n", - __func__, clkdiv0, clkdiv1); - - xtal_clk = clk_get(NULL, "xtal"); - BUG_ON(IS_ERR(xtal_clk)); - - xtal = clk_get_rate(xtal_clk); - clk_put(xtal_clk); - - printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal); - - apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4508); - mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); - epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON), - __raw_readl(S5P_EPLL_CON1), pll_4600); - vpllsrc = clk_get_rate(&clk_vpllsrc.clk); - vpll = s5p_get_pll45xx(vpllsrc, __raw_readl(S5P_VPLL_CON), pll_4502); - - clk_fout_apll.ops = &clk_fout_apll_ops; - clk_fout_mpll.rate = mpll; - clk_fout_epll.rate = epll; - clk_fout_vpll.ops = &s5pv210_vpll_ops; - clk_fout_vpll.rate = vpll; - - printk(KERN_INFO "S5PV210: PLL settings, A=%ld, M=%ld, E=%ld V=%ld", - apll, mpll, epll, vpll); - - armclk = clk_get_rate(&clk_armclk.clk); - hclk_msys = clk_get_rate(&clk_hclk_msys.clk); - hclk_dsys = clk_get_rate(&clk_hclk_dsys.clk); - hclk_psys = clk_get_rate(&clk_hclk_psys.clk); - pclk_msys = clk_get_rate(&clk_pclk_msys.clk); - pclk_dsys = clk_get_rate(&clk_pclk_dsys.clk); - pclk_psys = clk_get_rate(&clk_pclk_psys.clk); - - printk(KERN_INFO "S5PV210: ARMCLK=%ld, HCLKM=%ld, HCLKD=%ld\n" - "HCLKP=%ld, PCLKM=%ld, PCLKD=%ld, PCLKP=%ld\n", - armclk, hclk_msys, hclk_dsys, hclk_psys, - pclk_msys, pclk_dsys, pclk_psys); - - clk_f.rate = armclk; - clk_h.rate = hclk_psys; - clk_p.rate = pclk_psys; - - for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) - s3c_set_clksrc(&clksrcs[ptr], true); -} - -static struct clk *clks[] __initdata = { - &clk_sclk_hdmi27m, - &clk_sclk_hdmiphy, - &clk_sclk_usbphy0, - &clk_sclk_usbphy1, - &clk_pcmcdclk0, - &clk_pcmcdclk1, - &clk_pcmcdclk2, -}; - -static struct clk_lookup s5pv210_clk_lookup[] = { - CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p), - CLKDEV_INIT("s5pv210-uart.0", "clk_uart_baud1", &clk_sclk_uart0.clk), - CLKDEV_INIT("s5pv210-uart.1", "clk_uart_baud1", &clk_sclk_uart1.clk), - CLKDEV_INIT("s5pv210-uart.2", "clk_uart_baud1", &clk_sclk_uart2.clk), - CLKDEV_INIT("s5pv210-uart.3", "clk_uart_baud1", &clk_sclk_uart3.clk), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &clk_hsmmc0), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &clk_hsmmc1), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.0", &clk_hsmmc2), - CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.0", &clk_hsmmc3), - CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), - CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), - CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), - CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), - CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), - CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), - CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), -}; - -void __init s5pv210_register_clocks(void) -{ - int ptr; - - s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - - for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) - s3c_register_clksrc(sysclks[ptr], 1); - - for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++) - s3c_register_clksrc(sclk_tv[ptr], 1); - - for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) - s3c_register_clksrc(clksrc_cdev[ptr], 1); - - s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); - s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - - s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); - clkdev_add_table(s5pv210_clk_lookup, ARRAY_SIZE(s5pv210_clk_lookup)); - - s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev)); - for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) - s3c_disable_clocks(clk_cdev[ptr], 1); - - s3c24xx_register_clock(&dummy_apb_pclk); - s3c_pwmclk_init(); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/common.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/common.c deleted file mode 100644 index 4c9e9027..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/common.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Codes for S5PV210 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/clk.h> -#include <linux/io.h> -#include <linux/device.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/dma-mapping.h> -#include <linux/serial_core.h> - -#include <asm/proc-fns.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/cpu.h> -#include <plat/clock.h> -#include <plat/devs.h> -#include <plat/sdhci.h> -#include <plat/adc-core.h> -#include <plat/ata-core.h> -#include <plat/fb-core.h> -#include <plat/fimc-core.h> -#include <plat/iic-core.h> -#include <plat/keypad-core.h> -#include <plat/tv-core.h> -#include <plat/regs-serial.h> - -#include "common.h" - -static const char name_s5pv210[] = "S5PV210/S5PC110"; - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = S5PV210_CPU_ID, - .idmask = S5PV210_CPU_MASK, - .map_io = s5pv210_map_io, - .init_clocks = s5pv210_init_clocks, - .init_uarts = s5pv210_init_uarts, - .init = s5pv210_init, - .name = name_s5pv210, - }, -}; - -/* Initial IO mappings */ - -static struct map_desc s5pv210_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_CHIPID, - .pfn = __phys_to_pfn(S5PV210_PA_CHIPID), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(S5PV210_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(S5PV210_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(S5PV210_PA_WATCHDOG), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(S5PV210_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SYSTIMER, - .pfn = __phys_to_pfn(S5PV210_PA_SYSTIMER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GPIO, - .pfn = __phys_to_pfn(S5PV210_PA_GPIO), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC0, - .pfn = __phys_to_pfn(S5PV210_PA_VIC0), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC1, - .pfn = __phys_to_pfn(S5PV210_PA_VIC1), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC2, - .pfn = __phys_to_pfn(S5PV210_PA_VIC2), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)VA_VIC3, - .pfn = __phys_to_pfn(S5PV210_PA_VIC3), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(S3C_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC0, - .pfn = __phys_to_pfn(S5PV210_PA_DMC0), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC1, - .pfn = __phys_to_pfn(S5PV210_PA_DMC1), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_USB_HSPHY, - .pfn =__phys_to_pfn(S5PV210_PA_HSPHY), - .length = SZ_4K, - .type = MT_DEVICE, - } -}; - -void s5pv210_restart(char mode, const char *cmd) -{ - __raw_writel(0x1, S5P_SWRESET); -} - -/* - * s5pv210_map_io - * - * register the standard cpu IO areas - */ - -void __init s5pv210_init_io(struct map_desc *mach_desc, int size) -{ - /* initialize the io descriptors we need for initialization */ - iotable_init(s5pv210_iodesc, ARRAY_SIZE(s5pv210_iodesc)); - if (mach_desc) - iotable_init(mach_desc, size); - - /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); - - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); -} - -void __init s5pv210_map_io(void) -{ - init_consistent_dma_size(14 << 20); - - /* initialise device information early */ - s5pv210_default_sdhci0(); - s5pv210_default_sdhci1(); - s5pv210_default_sdhci2(); - s5pv210_default_sdhci3(); - - s3c_adc_setname("samsung-adc-v3"); - - s3c_cfcon_setname("s5pv210-pata"); - - s3c_fimc_setname(0, "s5pv210-fimc"); - s3c_fimc_setname(1, "s5pv210-fimc"); - s3c_fimc_setname(2, "s5pv210-fimc"); - - /* the i2c devices are directly compatible with s3c2440 */ - s3c_i2c0_setname("s3c2440-i2c"); - s3c_i2c1_setname("s3c2440-i2c"); - s3c_i2c2_setname("s3c2440-i2c"); - - s3c_fb_setname("s5pv210-fb"); - - /* Use s5pv210-keypad instead of samsung-keypad */ - samsung_keypad_setname("s5pv210-keypad"); - - /* setup TV devices */ - s5p_hdmi_setname("s5pv210-hdmi"); -} - -void __init s5pv210_init_clocks(int xtal) -{ - printk(KERN_DEBUG "%s: initializing clocks\n", __func__); - - s3c24xx_register_baseclocks(xtal); - s5p_register_clocks(xtal); - s5pv210_register_clocks(); - s5pv210_setup_clocks(); -} - -void __init s5pv210_init_irq(void) -{ - u32 vic[4]; /* S5PV210 supports 4 VIC */ - - /* All the VICs are fully populated. */ - vic[0] = ~0; - vic[1] = ~0; - vic[2] = ~0; - vic[3] = ~0; - - s5p_init_irq(vic, ARRAY_SIZE(vic)); -} - -struct bus_type s5pv210_subsys = { - .name = "s5pv210-core", - .dev_name = "s5pv210-core", -}; - -static struct device s5pv210_dev = { - .bus = &s5pv210_subsys, -}; - -static int __init s5pv210_core_init(void) -{ - return subsys_system_register(&s5pv210_subsys, NULL); -} -core_initcall(s5pv210_core_init); - -int __init s5pv210_init(void) -{ - printk(KERN_INFO "S5PV210: Initializing architecture\n"); - return device_register(&s5pv210_dev); -} - -/* uart registration process */ - -void __init s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/common.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/common.h deleted file mode 100644 index 6ed2af5c..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/common.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Header for S5PV210 machines - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_MACH_S5PV210_COMMON_H -#define __ARCH_ARM_MACH_S5PV210_COMMON_H - -void s5pv210_init_io(struct map_desc *mach_desc, int size); -void s5pv210_init_irq(void); - -void s5pv210_register_clocks(void); -void s5pv210_setup_clocks(void); - -void s5pv210_restart(char mode, const char *cmd); - -#ifdef CONFIG_CPU_S5PV210 - -extern int s5pv210_init(void); -extern void s5pv210_map_io(void); -extern void s5pv210_init_clocks(int xtal); -extern void s5pv210_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -#else -#define s5pv210_init_clocks NULL -#define s5pv210_init_uarts NULL -#define s5pv210_map_io NULL -#define s5pv210_init NULL -#endif - -#endif /* __ARCH_ARM_MACH_S5PV210_COMMON_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/dev-audio.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/dev-audio.c deleted file mode 100644 index 63f5d820..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/dev-audio.c +++ /dev/null @@ -1,365 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/dev-audio.c - * - * Copyright (c) 2010 Samsung Electronics Co. Ltd - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/dma-mapping.h> -#include <linux/gpio.h> - -#include <plat/gpio-cfg.h> -#include <plat/audio.h> - -#include <mach/map.h> -#include <mach/dma.h> -#include <mach/irqs.h> -#include <mach/regs-audss.h> - -static const char *rclksrc[] = { - [0] = "busclk", - [1] = "i2sclk", -}; - -static int s5pv210_cfg_i2s(struct platform_device *pdev) -{ - /* configure GPIO for i2s port */ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5PV210_GPI(0), 7, S3C_GPIO_SFN(2)); - break; - case 1: - s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(2)); - break; - case 2: - s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(4)); - break; - default: - printk(KERN_ERR "Invalid Device %d\n", pdev->id); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata i2sv5_pdata = { - .cfg_gpio = s5pv210_cfg_i2s, - .type = { - .i2s = { - .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI - | QUIRK_NEED_RSTCLR, - .src_clk = rclksrc, - .idma_addr = S5PV210_AUDSS_INT_MEM, - }, - }, -}; - -static struct resource s5pv210_iis0_resource[] = { - [0] = { - .start = S5PV210_PA_IIS0, - .end = S5PV210_PA_IIS0 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_I2S0_TX, - .end = DMACH_I2S0_TX, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_I2S0_RX, - .end = DMACH_I2S0_RX, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = DMACH_I2S0S_TX, - .end = DMACH_I2S0S_TX, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device s5pv210_device_iis0 = { - .name = "samsung-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(s5pv210_iis0_resource), - .resource = s5pv210_iis0_resource, - .dev = { - .platform_data = &i2sv5_pdata, - }, -}; - -static const char *rclksrc_v3[] = { - [0] = "iis", - [1] = "audio-bus", -}; - -static struct s3c_audio_pdata i2sv3_pdata = { - .cfg_gpio = s5pv210_cfg_i2s, - .type = { - .i2s = { - .src_clk = rclksrc_v3, - }, - }, -}; - -static struct resource s5pv210_iis1_resource[] = { - [0] = { - .start = S5PV210_PA_IIS1, - .end = S5PV210_PA_IIS1 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_I2S1_TX, - .end = DMACH_I2S1_TX, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_I2S1_RX, - .end = DMACH_I2S1_RX, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device s5pv210_device_iis1 = { - .name = "samsung-i2s", - .id = 1, - .num_resources = ARRAY_SIZE(s5pv210_iis1_resource), - .resource = s5pv210_iis1_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -static struct resource s5pv210_iis2_resource[] = { - [0] = { - .start = S5PV210_PA_IIS2, - .end = S5PV210_PA_IIS2 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_I2S2_TX, - .end = DMACH_I2S2_TX, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_I2S2_RX, - .end = DMACH_I2S2_RX, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device s5pv210_device_iis2 = { - .name = "samsung-i2s", - .id = 2, - .num_resources = ARRAY_SIZE(s5pv210_iis2_resource), - .resource = s5pv210_iis2_resource, - .dev = { - .platform_data = &i2sv3_pdata, - }, -}; - -/* PCM Controller platform_devices */ - -static int s5pv210_pcm_cfg_gpio(struct platform_device *pdev) -{ - switch (pdev->id) { - case 0: - s3c_gpio_cfgpin_range(S5PV210_GPI(0), 5, S3C_GPIO_SFN(3)); - break; - case 1: - s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(3)); - break; - case 2: - s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 5, S3C_GPIO_SFN(2)); - break; - default: - printk(KERN_DEBUG "Invalid PCM Controller number!"); - return -EINVAL; - } - - return 0; -} - -static struct s3c_audio_pdata s3c_pcm_pdata = { - .cfg_gpio = s5pv210_pcm_cfg_gpio, -}; - -static struct resource s5pv210_pcm0_resource[] = { - [0] = { - .start = S5PV210_PA_PCM0, - .end = S5PV210_PA_PCM0 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_PCM0_TX, - .end = DMACH_PCM0_TX, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_PCM0_RX, - .end = DMACH_PCM0_RX, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device s5pv210_device_pcm0 = { - .name = "samsung-pcm", - .id = 0, - .num_resources = ARRAY_SIZE(s5pv210_pcm0_resource), - .resource = s5pv210_pcm0_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource s5pv210_pcm1_resource[] = { - [0] = { - .start = S5PV210_PA_PCM1, - .end = S5PV210_PA_PCM1 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_PCM1_TX, - .end = DMACH_PCM1_TX, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_PCM1_RX, - .end = DMACH_PCM1_RX, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device s5pv210_device_pcm1 = { - .name = "samsung-pcm", - .id = 1, - .num_resources = ARRAY_SIZE(s5pv210_pcm1_resource), - .resource = s5pv210_pcm1_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -static struct resource s5pv210_pcm2_resource[] = { - [0] = { - .start = S5PV210_PA_PCM2, - .end = S5PV210_PA_PCM2 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_PCM2_TX, - .end = DMACH_PCM2_TX, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_PCM2_RX, - .end = DMACH_PCM2_RX, - .flags = IORESOURCE_DMA, - }, -}; - -struct platform_device s5pv210_device_pcm2 = { - .name = "samsung-pcm", - .id = 2, - .num_resources = ARRAY_SIZE(s5pv210_pcm2_resource), - .resource = s5pv210_pcm2_resource, - .dev = { - .platform_data = &s3c_pcm_pdata, - }, -}; - -/* AC97 Controller platform devices */ - -static int s5pv210_ac97_cfg_gpio(struct platform_device *pdev) -{ - return s3c_gpio_cfgpin_range(S5PV210_GPC0(0), 5, S3C_GPIO_SFN(4)); -} - -static struct resource s5pv210_ac97_resource[] = { - [0] = { - .start = S5PV210_PA_AC97, - .end = S5PV210_PA_AC97 + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_AC97_PCMOUT, - .end = DMACH_AC97_PCMOUT, - .flags = IORESOURCE_DMA, - }, - [2] = { - .start = DMACH_AC97_PCMIN, - .end = DMACH_AC97_PCMIN, - .flags = IORESOURCE_DMA, - }, - [3] = { - .start = DMACH_AC97_MICIN, - .end = DMACH_AC97_MICIN, - .flags = IORESOURCE_DMA, - }, - [4] = { - .start = IRQ_AC97, - .end = IRQ_AC97, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct s3c_audio_pdata s3c_ac97_pdata = { - .cfg_gpio = s5pv210_ac97_cfg_gpio, -}; - -static u64 s5pv210_ac97_dmamask = DMA_BIT_MASK(32); - -struct platform_device s5pv210_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(s5pv210_ac97_resource), - .resource = s5pv210_ac97_resource, - .dev = { - .platform_data = &s3c_ac97_pdata, - .dma_mask = &s5pv210_ac97_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -/* S/PDIF Controller platform_device */ - -static int s5pv210_spdif_cfg_gpio(struct platform_device *pdev) -{ - s3c_gpio_cfgpin_range(S5PV210_GPC1(0), 2, S3C_GPIO_SFN(3)); - - return 0; -} - -static struct resource s5pv210_spdif_resource[] = { - [0] = { - .start = S5PV210_PA_SPDIF, - .end = S5PV210_PA_SPDIF + 0x100 - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = DMACH_SPDIF, - .end = DMACH_SPDIF, - .flags = IORESOURCE_DMA, - }, -}; - -static struct s3c_audio_pdata samsung_spdif_pdata = { - .cfg_gpio = s5pv210_spdif_cfg_gpio, -}; - -static u64 s5pv210_spdif_dmamask = DMA_BIT_MASK(32); - -struct platform_device s5pv210_device_spdif = { - .name = "samsung-spdif", - .id = -1, - .num_resources = ARRAY_SIZE(s5pv210_spdif_resource), - .resource = s5pv210_spdif_resource, - .dev = { - .platform_data = &samsung_spdif_pdata, - .dma_mask = &s5pv210_spdif_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/dma.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/dma.c deleted file mode 100644 index b8337e24..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/dma.c +++ /dev/null @@ -1,130 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/dma.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <linux/dma-mapping.h> -#include <linux/amba/bus.h> -#include <linux/amba/pl330.h> - -#include <asm/irq.h> -#include <plat/devs.h> -#include <plat/irqs.h> - -#include <mach/map.h> -#include <mach/irqs.h> -#include <mach/dma.h> - -static u8 pdma0_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_MAX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, - DMACH_MAX, - DMACH_PWM, - DMACH_SPDIF, -}; - -static struct dma_pl330_platdata s5pv210_pdma0_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma0_peri), - .peri_id = pdma0_peri, -}; - -static AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, - S5PV210_PA_PDMA0, {IRQ_PDMA0}, &s5pv210_pdma0_pdata); - -static u8 pdma1_peri[] = { - DMACH_UART0_RX, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_MAX, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_MAX, - DMACH_MAX, - DMACH_PCM0_RX, - DMACH_PCM0_TX, - DMACH_PCM1_RX, - DMACH_PCM1_TX, - DMACH_MSM_REQ0, - DMACH_MSM_REQ1, - DMACH_MSM_REQ2, - DMACH_MSM_REQ3, - DMACH_PCM2_RX, - DMACH_PCM2_TX, -}; - -static struct dma_pl330_platdata s5pv210_pdma1_pdata = { - .nr_valid_peri = ARRAY_SIZE(pdma1_peri), - .peri_id = pdma1_peri, -}; - -static AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, - S5PV210_PA_PDMA1, {IRQ_PDMA1}, &s5pv210_pdma1_pdata); - -static int __init s5pv210_dma_init(void) -{ - dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); - amba_device_register(&s5pv210_pdma0_device, &iomem_resource); - - dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); - dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); - amba_device_register(&s5pv210_pdma1_device, &iomem_resource); - - return 0; -} -arch_initcall(s5pv210_dma_init); diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/debug-macro.S deleted file mode 100644 index 79e55597..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/debug-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/debug-macro.S - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s3c6400/include/mach/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* pull in the relevant register and map files. */ - -#include <mach/map.h> -#include <plat/regs-serial.h> - - /* note, for the boot process to work we have to keep the UART - * virtual address aligned to an 1MiB boundary for the L1 - * mapping the head code makes. We keep the UART virtual address - * aligned and add in the offset when we load the value here. - */ - - .macro addruart, rp, rv, tmp - ldr \rp, = S3C_PA_UART - ldr \rv, = S3C_VA_UART -#if CONFIG_DEBUG_S3C_UART != 0 - add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) - add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) -#endif - .endm - -#define fifo_full fifo_full_s5pv210 -#define fifo_level fifo_level_s5pv210 - -/* include the reset of the code which will do the work, we're only - * compiling for a single cpu processor type so the default of s3c2440 - * will be fine with us. - */ - -#include <plat/debug-macro.S> diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/dma.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/dma.h deleted file mode 100644 index 201842a3..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/dma.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __MACH_DMA_H -#define __MACH_DMA_H - -/* This platform uses the common DMA API driver for PL330 */ -#include <plat/dma-pl330.h> - -#endif /* __MACH_DMA_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/gpio.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/gpio.h deleted file mode 100644 index 6c8b903c..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/gpio.h +++ /dev/null @@ -1,140 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/gpio.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - GPIO lib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H __FILE__ - -/* Practically, GPIO banks up to MP03 are the configurable gpio banks */ - -/* GPIO bank sizes */ -#define S5PV210_GPIO_A0_NR (8) -#define S5PV210_GPIO_A1_NR (4) -#define S5PV210_GPIO_B_NR (8) -#define S5PV210_GPIO_C0_NR (5) -#define S5PV210_GPIO_C1_NR (5) -#define S5PV210_GPIO_D0_NR (4) -#define S5PV210_GPIO_D1_NR (6) -#define S5PV210_GPIO_E0_NR (8) -#define S5PV210_GPIO_E1_NR (5) -#define S5PV210_GPIO_F0_NR (8) -#define S5PV210_GPIO_F1_NR (8) -#define S5PV210_GPIO_F2_NR (8) -#define S5PV210_GPIO_F3_NR (6) -#define S5PV210_GPIO_G0_NR (7) -#define S5PV210_GPIO_G1_NR (7) -#define S5PV210_GPIO_G2_NR (7) -#define S5PV210_GPIO_G3_NR (7) -#define S5PV210_GPIO_H0_NR (8) -#define S5PV210_GPIO_H1_NR (8) -#define S5PV210_GPIO_H2_NR (8) -#define S5PV210_GPIO_H3_NR (8) -#define S5PV210_GPIO_I_NR (7) -#define S5PV210_GPIO_J0_NR (8) -#define S5PV210_GPIO_J1_NR (6) -#define S5PV210_GPIO_J2_NR (8) -#define S5PV210_GPIO_J3_NR (8) -#define S5PV210_GPIO_J4_NR (5) - -#define S5PV210_GPIO_MP01_NR (8) -#define S5PV210_GPIO_MP02_NR (4) -#define S5PV210_GPIO_MP03_NR (8) -#define S5PV210_GPIO_MP04_NR (8) -#define S5PV210_GPIO_MP05_NR (8) - -/* GPIO bank numbers */ - -/* CONFIG_S3C_GPIO_SPACE allows the user to select extra - * space for debugging purposes so that any accidental - * change from one gpio bank to another can be caught. -*/ - -#define S5PV210_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) - -enum s5p_gpio_number { - S5PV210_GPIO_A0_START = 0, - S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0), - S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1), - S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B), - S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0), - S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1), - S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0), - S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1), - S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0), - S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1), - S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0), - S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1), - S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2), - S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3), - S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0), - S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1), - S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2), - S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3), - S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0), - S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1), - S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2), - S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3), - S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I), - S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0), - S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), - S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), - S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), - S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), - S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), - S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), - S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03), - S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04), -}; - -/* S5PV210 GPIO number definitions */ -#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr)) -#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr)) -#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr)) -#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr)) -#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr)) -#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr)) -#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr)) -#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr)) -#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr)) -#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr)) -#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr)) -#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr)) -#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr)) -#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr)) -#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr)) -#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr)) -#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr)) -#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr)) -#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr)) -#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr)) -#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr)) -#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr)) -#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr)) -#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr)) -#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) -#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) -#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) -#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) -#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) -#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) -#define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr)) -#define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr)) - -/* the end of the S5PV210 specific gpios */ -#define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1) -#define S3C_GPIO_END S5PV210_GPIO_END - -/* define the number of gpios we need to the one after the MP05() range */ -#define ARCH_NR_GPIOS (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + \ - CONFIG_SAMSUNG_GPIO_EXTRA + 1) - -#endif /* __ASM_ARCH_GPIO_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/hardware.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/hardware.h deleted file mode 100644 index fada7a39..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/hardware.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Hardware support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H __FILE__ - -/* currently nothing here, placeholder */ - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/irqs.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/irqs.h deleted file mode 100644 index e777e010..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/irqs.h +++ /dev/null @@ -1,139 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/irqs.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - IRQ definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -#include <plat/irqs.h> - -/* VIC0: System, DMA, Timer */ - -#define IRQ_EINT16_31 S5P_IRQ_VIC0(16) -#define IRQ_BATF S5P_IRQ_VIC0(17) -#define IRQ_MDMA S5P_IRQ_VIC0(18) -#define IRQ_PDMA0 S5P_IRQ_VIC0(19) -#define IRQ_PDMA1 S5P_IRQ_VIC0(20) -#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(21) -#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(22) -#define IRQ_TIMER2_VIC S5P_IRQ_VIC0(23) -#define IRQ_TIMER3_VIC S5P_IRQ_VIC0(24) -#define IRQ_TIMER4_VIC S5P_IRQ_VIC0(25) -#define IRQ_SYSTIMER S5P_IRQ_VIC0(26) -#define IRQ_WDT S5P_IRQ_VIC0(27) -#define IRQ_RTC_ALARM S5P_IRQ_VIC0(28) -#define IRQ_RTC_TIC S5P_IRQ_VIC0(29) -#define IRQ_GPIOINT S5P_IRQ_VIC0(30) -#define IRQ_FIMC3 S5P_IRQ_VIC0(31) - -/* VIC1: ARM, Power, Memory, Connectivity, Storage */ - -#define IRQ_PMU S5P_IRQ_VIC1(0) -#define IRQ_CORTEX1 S5P_IRQ_VIC1(1) -#define IRQ_CORTEX2 S5P_IRQ_VIC1(2) -#define IRQ_CORTEX3 S5P_IRQ_VIC1(3) -#define IRQ_CORTEX4 S5P_IRQ_VIC1(4) -#define IRQ_IEMAPC S5P_IRQ_VIC1(5) -#define IRQ_IEMIEC S5P_IRQ_VIC1(6) -#define IRQ_ONENAND S5P_IRQ_VIC1(7) -#define IRQ_NFC S5P_IRQ_VIC1(8) -#define IRQ_CFCON S5P_IRQ_VIC1(9) -#define IRQ_UART0 S5P_IRQ_VIC1(10) -#define IRQ_UART1 S5P_IRQ_VIC1(11) -#define IRQ_UART2 S5P_IRQ_VIC1(12) -#define IRQ_UART3 S5P_IRQ_VIC1(13) -#define IRQ_IIC S5P_IRQ_VIC1(14) -#define IRQ_SPI0 S5P_IRQ_VIC1(15) -#define IRQ_SPI1 S5P_IRQ_VIC1(16) -#define IRQ_SPI2 S5P_IRQ_VIC1(17) -#define IRQ_IRDA S5P_IRQ_VIC1(18) -#define IRQ_IIC2 S5P_IRQ_VIC1(19) -#define IRQ_IIC_HDMIPHY S5P_IRQ_VIC1(20) -#define IRQ_HSIRX S5P_IRQ_VIC1(21) -#define IRQ_HSITX S5P_IRQ_VIC1(22) -#define IRQ_UHOST S5P_IRQ_VIC1(23) -#define IRQ_OTG S5P_IRQ_VIC1(24) -#define IRQ_MSM S5P_IRQ_VIC1(25) -#define IRQ_HSMMC0 S5P_IRQ_VIC1(26) -#define IRQ_HSMMC1 S5P_IRQ_VIC1(27) -#define IRQ_HSMMC2 S5P_IRQ_VIC1(28) -#define IRQ_MIPI_CSIS S5P_IRQ_VIC1(29) -#define IRQ_MIPIDSI S5P_IRQ_VIC1(30) -#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) - -/* VIC2: Multimedia, Audio, Security */ - -#define IRQ_LCD0 S5P_IRQ_VIC2(0) -#define IRQ_LCD1 S5P_IRQ_VIC2(1) -#define IRQ_LCD2 S5P_IRQ_VIC2(2) -#define IRQ_LCD3 S5P_IRQ_VIC2(3) -#define IRQ_ROTATOR S5P_IRQ_VIC2(4) -#define IRQ_FIMC0 S5P_IRQ_VIC2(5) -#define IRQ_FIMC1 S5P_IRQ_VIC2(6) -#define IRQ_FIMC2 S5P_IRQ_VIC2(7) -#define IRQ_JPEG S5P_IRQ_VIC2(8) -#define IRQ_2D S5P_IRQ_VIC2(9) -#define IRQ_3D S5P_IRQ_VIC2(10) -#define IRQ_MIXER S5P_IRQ_VIC2(11) -#define IRQ_HDMI S5P_IRQ_VIC2(12) -#define IRQ_IIC1 S5P_IRQ_VIC2(13) -#define IRQ_MFC S5P_IRQ_VIC2(14) -#define IRQ_SDO S5P_IRQ_VIC2(15) -#define IRQ_I2S0 S5P_IRQ_VIC2(16) -#define IRQ_I2S1 S5P_IRQ_VIC2(17) -#define IRQ_I2S2 S5P_IRQ_VIC2(18) -#define IRQ_AC97 S5P_IRQ_VIC2(19) -#define IRQ_PCM0 S5P_IRQ_VIC2(20) -#define IRQ_PCM1 S5P_IRQ_VIC2(21) -#define IRQ_SPDIF S5P_IRQ_VIC2(22) -#define IRQ_ADC S5P_IRQ_VIC2(23) -#define IRQ_PENDN S5P_IRQ_VIC2(24) -#define IRQ_TC IRQ_PENDN -#define IRQ_KEYPAD S5P_IRQ_VIC2(25) -#define IRQ_CG S5P_IRQ_VIC2(26) -#define IRQ_SSS_INT S5P_IRQ_VIC2(27) -#define IRQ_SSS_HASH S5P_IRQ_VIC2(28) -#define IRQ_PCM2 S5P_IRQ_VIC2(29) -#define IRQ_SDMIRQ S5P_IRQ_VIC2(30) -#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) - -/* VIC3: Etc */ - -#define IRQ_IPC S5P_IRQ_VIC3(0) -#define IRQ_HOSTIF S5P_IRQ_VIC3(1) -#define IRQ_HSMMC3 S5P_IRQ_VIC3(2) -#define IRQ_CEC S5P_IRQ_VIC3(3) -#define IRQ_TSI S5P_IRQ_VIC3(4) -#define IRQ_MDNIE0 S5P_IRQ_VIC3(5) -#define IRQ_MDNIE1 S5P_IRQ_VIC3(6) -#define IRQ_MDNIE2 S5P_IRQ_VIC3(7) -#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) -#define IRQ_VIC_END S5P_IRQ_VIC3(31) - -#define IRQ_TIMER_BASE (11) - -#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) -#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) - -/* GPIO interrupt */ -#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1) -#define S5P_GPIOINT_GROUP_MAXNR 22 - -/* Set the default NR_IRQS */ -#define NR_IRQS (IRQ_EINT(31) + S5P_GPIOINT_COUNT + 1) - -/* Compatibility */ -#define IRQ_LCD_FIFO IRQ_LCD0 -#define IRQ_LCD_VSYNC IRQ_LCD1 -#define IRQ_LCD_SYSTEM IRQ_LCD2 -#define IRQ_MIPI_CSIS0 IRQ_MIPI_CSIS - -#endif /* ASM_ARCH_IRQS_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/map.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/map.h deleted file mode 100644 index b7c8a191..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/map.h +++ /dev/null @@ -1,157 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/map.h - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H __FILE__ - -#include <plat/map-base.h> -#include <plat/map-s5p.h> - -#define S5PV210_PA_SDRAM 0x20000000 - -#define S5PV210_PA_SROM_BANK5 0xA8000000 - -#define S5PC110_PA_ONENAND 0xB0000000 -#define S5PC110_PA_ONENAND_DMA 0xB0600000 - -#define S5PV210_PA_CHIPID 0xE0000000 - -#define S5PV210_PA_SYSCON 0xE0100000 - -#define S5PV210_PA_GPIO 0xE0200000 - -#define S5PV210_PA_SPDIF 0xE1100000 - -#define S5PV210_PA_SPI0 0xE1300000 -#define S5PV210_PA_SPI1 0xE1400000 - -#define S5PV210_PA_KEYPAD 0xE1600000 - -#define S5PV210_PA_ADC 0xE1700000 - -#define S5PV210_PA_IIC0 0xE1800000 -#define S5PV210_PA_IIC1 0xFAB00000 -#define S5PV210_PA_IIC2 0xE1A00000 - -#define S5PV210_PA_AC97 0xE2200000 - -#define S5PV210_PA_PCM0 0xE2300000 -#define S5PV210_PA_PCM1 0xE1200000 -#define S5PV210_PA_PCM2 0xE2B00000 - -#define S5PV210_PA_TIMER 0xE2500000 -#define S5PV210_PA_SYSTIMER 0xE2600000 -#define S5PV210_PA_WATCHDOG 0xE2700000 -#define S5PV210_PA_RTC 0xE2800000 - -#define S5PV210_PA_UART 0xE2900000 - -#define S5PV210_PA_SROMC 0xE8000000 - -#define S5PV210_PA_CFCON 0xE8200000 - -#define S5PV210_PA_MFC 0xF1700000 - -#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000)) - -#define S5PV210_PA_HSOTG 0xEC000000 -#define S5PV210_PA_HSPHY 0xEC100000 - -#define S5PV210_PA_IIS0 0xEEE30000 -#define S5PV210_PA_IIS1 0xE2100000 -#define S5PV210_PA_IIS2 0xE2A00000 - -#define S5PV210_PA_DMC0 0xF0000000 -#define S5PV210_PA_DMC1 0xF1400000 - -#define S5PV210_PA_VIC0 0xF2000000 -#define S5PV210_PA_VIC1 0xF2100000 -#define S5PV210_PA_VIC2 0xF2200000 -#define S5PV210_PA_VIC3 0xF2300000 - -#define S5PV210_PA_FB 0xF8000000 - -#define S5PV210_PA_MDMA 0xFA200000 -#define S5PV210_PA_PDMA0 0xE0900000 -#define S5PV210_PA_PDMA1 0xE0A00000 - -#define S5PV210_PA_MIPI_CSIS 0xFA600000 - -#define S5PV210_PA_FIMC0 0xFB200000 -#define S5PV210_PA_FIMC1 0xFB300000 -#define S5PV210_PA_FIMC2 0xFB400000 - -#define S5PV210_PA_JPEG 0xFB600000 - -#define S5PV210_PA_SDO 0xF9000000 -#define S5PV210_PA_VP 0xF9100000 -#define S5PV210_PA_MIXER 0xF9200000 -#define S5PV210_PA_HDMI 0xFA100000 -#define S5PV210_PA_IIC_HDMIPHY 0xFA900000 - -/* Compatibiltiy Defines */ - -#define S3C_PA_FB S5PV210_PA_FB -#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) -#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1) -#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2) -#define S3C_PA_HSMMC3 S5PV210_PA_HSMMC(3) -#define S3C_PA_IIC S5PV210_PA_IIC0 -#define S3C_PA_IIC1 S5PV210_PA_IIC1 -#define S3C_PA_IIC2 S5PV210_PA_IIC2 -#define S3C_PA_RTC S5PV210_PA_RTC -#define S3C_PA_USB_HSOTG S5PV210_PA_HSOTG -#define S3C_PA_WDT S5PV210_PA_WATCHDOG -#define S3C_PA_SPI0 S5PV210_PA_SPI0 -#define S3C_PA_SPI1 S5PV210_PA_SPI1 - -#define S5P_PA_CHIPID S5PV210_PA_CHIPID -#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 -#define S5P_PA_FIMC1 S5PV210_PA_FIMC1 -#define S5P_PA_FIMC2 S5PV210_PA_FIMC2 -#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS -#define S5P_PA_MFC S5PV210_PA_MFC -#define S5P_PA_IIC_HDMIPHY S5PV210_PA_IIC_HDMIPHY - -#define S5P_PA_SDO S5PV210_PA_SDO -#define S5P_PA_VP S5PV210_PA_VP -#define S5P_PA_MIXER S5PV210_PA_MIXER -#define S5P_PA_HDMI S5PV210_PA_HDMI - -#define S5P_PA_ONENAND S5PC110_PA_ONENAND -#define S5P_PA_ONENAND_DMA S5PC110_PA_ONENAND_DMA -#define S5P_PA_SDRAM S5PV210_PA_SDRAM -#define S5P_PA_SROMC S5PV210_PA_SROMC -#define S5P_PA_SYSCON S5PV210_PA_SYSCON -#define S5P_PA_TIMER S5PV210_PA_TIMER - -#define S5P_PA_JPEG S5PV210_PA_JPEG - -#define SAMSUNG_PA_ADC S5PV210_PA_ADC -#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON -#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD - -/* UART */ - -#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) - -#define S3C_PA_UART S5PV210_PA_UART - -#define S5P_PA_UART(x) (S3C_PA_UART + ((x) * S3C_UART_OFFSET)) -#define S5P_PA_UART0 S5P_PA_UART(0) -#define S5P_PA_UART1 S5P_PA_UART(1) -#define S5P_PA_UART2 S5P_PA_UART(2) -#define S5P_PA_UART3 S5P_PA_UART(3) - -#define S5P_SZ_UART SZ_256 - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/memory.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/memory.h deleted file mode 100644 index 2d3cfa22..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/memory.h +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/memory.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Memory definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PLAT_PHYS_OFFSET UL(0x20000000) - -/* - * Sparsemem support - * Physical memory can be located from 0x20000000 to 0x7fffffff, - * so MAX_PHYSMEM_BITS is 31. - */ - -#define MAX_PHYSMEM_BITS 31 -#define SECTION_SIZE_BITS 28 - -#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/pm-core.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/pm-core.h deleted file mode 100644 index eba8aea6..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/pm-core.h +++ /dev/null @@ -1,46 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/pm-core.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Based on arch/arm/mach-s3c2410/include/mach/pm-core.h, - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S5PV210 - PM core support for arch/arm/plat-s5p/pm.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -static inline void s3c_pm_debug_init_uart(void) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_arch_prepare_irqs(void) -{ - __raw_writel(s3c_irqwake_intmask, S5P_WAKEUP_MASK); - __raw_writel(s3c_irqwake_eintmask, S5P_EINT_WAKEUP_MASK); -} - -static inline void s3c_pm_arch_stop_clocks(void) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_arch_show_resume_irqs(void) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) -{ - /* nothing here yet */ -} - -static inline void s3c_pm_restored_gpios(void) { } -static inline void samsung_pm_saved_gpios(void) { } diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-audss.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-audss.h deleted file mode 100644 index eacc1f79..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-audss.h +++ /dev/null @@ -1,18 +0,0 @@ -/* arch/arm/mach-s5pv210/include/mach/regs-audss.h - * - * Copyright (c) 2011 Samsung Electronics - * http://www.samsung.com - * - * S5PV210 Audio SubSystem clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_REGS_AUDSS_H -#define __PLAT_REGS_AUDSS_H __FILE__ - -#define S5PV210_AUDSS_INT_MEM (0xC0000000) - -#endif /* _PLAT_REGS_AUDSS_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-clock.h deleted file mode 100644 index 032de66f..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-clock.h +++ /dev/null @@ -1,206 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/regs-clock.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Clock register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_CLOCK_H -#define __ASM_ARCH_REGS_CLOCK_H __FILE__ - -#include <mach/map.h> - -#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) - -#define S5P_APLL_LOCK S5P_CLKREG(0x00) -#define S5P_MPLL_LOCK S5P_CLKREG(0x08) -#define S5P_EPLL_LOCK S5P_CLKREG(0x10) -#define S5P_VPLL_LOCK S5P_CLKREG(0x20) - -#define S5P_APLL_CON S5P_CLKREG(0x100) -#define S5P_MPLL_CON S5P_CLKREG(0x108) -#define S5P_EPLL_CON S5P_CLKREG(0x110) -#define S5P_EPLL_CON1 S5P_CLKREG(0x114) -#define S5P_VPLL_CON S5P_CLKREG(0x120) - -#define S5P_CLK_SRC0 S5P_CLKREG(0x200) -#define S5P_CLK_SRC1 S5P_CLKREG(0x204) -#define S5P_CLK_SRC2 S5P_CLKREG(0x208) -#define S5P_CLK_SRC3 S5P_CLKREG(0x20C) -#define S5P_CLK_SRC4 S5P_CLKREG(0x210) -#define S5P_CLK_SRC5 S5P_CLKREG(0x214) -#define S5P_CLK_SRC6 S5P_CLKREG(0x218) - -#define S5P_CLK_SRC_MASK0 S5P_CLKREG(0x280) -#define S5P_CLK_SRC_MASK1 S5P_CLKREG(0x284) - -#define S5P_CLK_DIV0 S5P_CLKREG(0x300) -#define S5P_CLK_DIV1 S5P_CLKREG(0x304) -#define S5P_CLK_DIV2 S5P_CLKREG(0x308) -#define S5P_CLK_DIV3 S5P_CLKREG(0x30C) -#define S5P_CLK_DIV4 S5P_CLKREG(0x310) -#define S5P_CLK_DIV5 S5P_CLKREG(0x314) -#define S5P_CLK_DIV6 S5P_CLKREG(0x318) -#define S5P_CLK_DIV7 S5P_CLKREG(0x31C) - -#define S5P_CLKGATE_MAIN0 S5P_CLKREG(0x400) -#define S5P_CLKGATE_MAIN1 S5P_CLKREG(0x404) -#define S5P_CLKGATE_MAIN2 S5P_CLKREG(0x408) - -#define S5P_CLKGATE_PERI0 S5P_CLKREG(0x420) -#define S5P_CLKGATE_PERI1 S5P_CLKREG(0x424) - -#define S5P_CLKGATE_SCLK0 S5P_CLKREG(0x440) -#define S5P_CLKGATE_SCLK1 S5P_CLKREG(0x444) -#define S5P_CLKGATE_IP0 S5P_CLKREG(0x460) -#define S5P_CLKGATE_IP1 S5P_CLKREG(0x464) -#define S5P_CLKGATE_IP2 S5P_CLKREG(0x468) -#define S5P_CLKGATE_IP3 S5P_CLKREG(0x46C) -#define S5P_CLKGATE_IP4 S5P_CLKREG(0x470) - -#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x480) -#define S5P_CLKGATE_BUS0 S5P_CLKREG(0x484) -#define S5P_CLKGATE_BUS1 S5P_CLKREG(0x488) -#define S5P_CLK_OUT S5P_CLKREG(0x500) - -/* DIV/MUX STATUS */ -#define S5P_CLKDIV_STAT0 S5P_CLKREG(0x1000) -#define S5P_CLKDIV_STAT1 S5P_CLKREG(0x1004) -#define S5P_CLKMUX_STAT0 S5P_CLKREG(0x1100) -#define S5P_CLKMUX_STAT1 S5P_CLKREG(0x1104) - -/* CLKSRC0 */ -#define S5P_CLKSRC0_MUX200_SHIFT (16) -#define S5P_CLKSRC0_MUX200_MASK (0x1 << S5P_CLKSRC0_MUX200_SHIFT) -#define S5P_CLKSRC0_MUX166_MASK (0x1<<20) -#define S5P_CLKSRC0_MUX133_MASK (0x1<<24) - -/* CLKSRC2 */ -#define S5P_CLKSRC2_G3D_SHIFT (0) -#define S5P_CLKSRC2_G3D_MASK (0x3 << S5P_CLKSRC2_G3D_SHIFT) -#define S5P_CLKSRC2_MFC_SHIFT (4) -#define S5P_CLKSRC2_MFC_MASK (0x3 << S5P_CLKSRC2_MFC_SHIFT) - -/* CLKSRC6*/ -#define S5P_CLKSRC6_ONEDRAM_SHIFT (24) -#define S5P_CLKSRC6_ONEDRAM_MASK (0x3 << S5P_CLKSRC6_ONEDRAM_SHIFT) - -/* CLKDIV0 */ -#define S5P_CLKDIV0_APLL_SHIFT (0) -#define S5P_CLKDIV0_APLL_MASK (0x7 << S5P_CLKDIV0_APLL_SHIFT) -#define S5P_CLKDIV0_A2M_SHIFT (4) -#define S5P_CLKDIV0_A2M_MASK (0x7 << S5P_CLKDIV0_A2M_SHIFT) -#define S5P_CLKDIV0_HCLK200_SHIFT (8) -#define S5P_CLKDIV0_HCLK200_MASK (0x7 << S5P_CLKDIV0_HCLK200_SHIFT) -#define S5P_CLKDIV0_PCLK100_SHIFT (12) -#define S5P_CLKDIV0_PCLK100_MASK (0x7 << S5P_CLKDIV0_PCLK100_SHIFT) -#define S5P_CLKDIV0_HCLK166_SHIFT (16) -#define S5P_CLKDIV0_HCLK166_MASK (0xF << S5P_CLKDIV0_HCLK166_SHIFT) -#define S5P_CLKDIV0_PCLK83_SHIFT (20) -#define S5P_CLKDIV0_PCLK83_MASK (0x7 << S5P_CLKDIV0_PCLK83_SHIFT) -#define S5P_CLKDIV0_HCLK133_SHIFT (24) -#define S5P_CLKDIV0_HCLK133_MASK (0xF << S5P_CLKDIV0_HCLK133_SHIFT) -#define S5P_CLKDIV0_PCLK66_SHIFT (28) -#define S5P_CLKDIV0_PCLK66_MASK (0x7 << S5P_CLKDIV0_PCLK66_SHIFT) - -/* CLKDIV2 */ -#define S5P_CLKDIV2_G3D_SHIFT (0) -#define S5P_CLKDIV2_G3D_MASK (0xF << S5P_CLKDIV2_G3D_SHIFT) -#define S5P_CLKDIV2_MFC_SHIFT (4) -#define S5P_CLKDIV2_MFC_MASK (0xF << S5P_CLKDIV2_MFC_SHIFT) - -/* CLKDIV6 */ -#define S5P_CLKDIV6_ONEDRAM_SHIFT (28) -#define S5P_CLKDIV6_ONEDRAM_MASK (0xF << S5P_CLKDIV6_ONEDRAM_SHIFT) - -#define S5P_SWRESET S5P_CLKREG(0x2000) - -#define S5P_ARM_MCS_CON S5P_CLKREG(0x6100) - -/* Registers related to power management */ -#define S5P_PWR_CFG S5P_CLKREG(0xC000) -#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0xC004) -#define S5P_WAKEUP_MASK S5P_CLKREG(0xC008) -#define S5P_PWR_MODE S5P_CLKREG(0xC00C) -#define S5P_NORMAL_CFG S5P_CLKREG(0xC010) -#define S5P_IDLE_CFG S5P_CLKREG(0xC020) -#define S5P_STOP_CFG S5P_CLKREG(0xC030) -#define S5P_STOP_MEM_CFG S5P_CLKREG(0xC034) -#define S5P_SLEEP_CFG S5P_CLKREG(0xC040) - -#define S5P_OSC_FREQ S5P_CLKREG(0xC100) -#define S5P_OSC_STABLE S5P_CLKREG(0xC104) -#define S5P_PWR_STABLE S5P_CLKREG(0xC108) -#define S5P_MTC_STABLE S5P_CLKREG(0xC110) -#define S5P_CLAMP_STABLE S5P_CLKREG(0xC114) - -#define S5P_WAKEUP_STAT S5P_CLKREG(0xC200) -#define S5P_BLK_PWR_STAT S5P_CLKREG(0xC204) - -#define S5P_OTHERS S5P_CLKREG(0xE000) -#define S5P_OM_STAT S5P_CLKREG(0xE100) -#define S5P_HDMI_PHY_CONTROL S5P_CLKREG(0xE804) -#define S5P_USB_PHY_CONTROL S5P_CLKREG(0xE80C) -#define S5P_DAC_PHY_CONTROL S5P_CLKREG(0xE810) -#define S5P_MIPI_DPHY_CONTROL(x) S5P_CLKREG(0xE814) -#define S5P_MIPI_DPHY_ENABLE (1 << 0) -#define S5P_MIPI_DPHY_SRESETN (1 << 1) -#define S5P_MIPI_DPHY_MRESETN (1 << 2) - -#define S5P_INFORM0 S5P_CLKREG(0xF000) -#define S5P_INFORM1 S5P_CLKREG(0xF004) -#define S5P_INFORM2 S5P_CLKREG(0xF008) -#define S5P_INFORM3 S5P_CLKREG(0xF00C) -#define S5P_INFORM4 S5P_CLKREG(0xF010) -#define S5P_INFORM5 S5P_CLKREG(0xF014) -#define S5P_INFORM6 S5P_CLKREG(0xF018) -#define S5P_INFORM7 S5P_CLKREG(0xF01C) - -#define S5P_RST_STAT S5P_CLKREG(0xA000) -#define S5P_OSC_CON S5P_CLKREG(0x8000) -#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) -#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) -#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) - -#define S5P_IDLE_CFG_TL_MASK (3 << 30) -#define S5P_IDLE_CFG_TM_MASK (3 << 28) -#define S5P_IDLE_CFG_TL_ON (2 << 30) -#define S5P_IDLE_CFG_TM_ON (2 << 28) -#define S5P_IDLE_CFG_DIDLE (1 << 0) - -#define S5P_CFG_WFI_CLEAN (~(3 << 8)) -#define S5P_CFG_WFI_IDLE (1 << 8) -#define S5P_CFG_WFI_STOP (2 << 8) -#define S5P_CFG_WFI_SLEEP (3 << 8) - -#define S5P_OTHER_SYS_INT 24 -#define S5P_OTHER_STA_TYPE 23 -#define S5P_OTHER_SYSC_INTOFF (1 << 0) -#define STA_TYPE_EXPON 0 -#define STA_TYPE_SFR 1 - -#define S5P_PWR_STA_EXP_SCALE 0 -#define S5P_PWR_STA_CNT 4 - -#define S5P_PWR_STABLE_COUNT 85500 - -#define S5P_SLEEP_CFG_OSC_EN (1 << 0) -#define S5P_SLEEP_CFG_USBOSC_EN (1 << 1) - -/* OTHERS Resgister */ -#define S5P_OTHERS_RET_IO (1 << 31) -#define S5P_OTHERS_RET_CF (1 << 30) -#define S5P_OTHERS_RET_MMC (1 << 29) -#define S5P_OTHERS_RET_UART (1 << 28) -#define S5P_OTHERS_USB_SIG_MASK (1 << 16) - -/* S5P_DAC_CONTROL */ -#define S5P_DAC_ENABLE (1) -#define S5P_DAC_DISABLE (0) - -#endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-gpio.h deleted file mode 100644 index de0c8997..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-gpio.h +++ /dev/null @@ -1,41 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV210 - GPIO (including EINT) register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H __FILE__ - -#include <mach/map.h> - -#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) -#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) - -#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) -#define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) - -#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) -#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) - -#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) -#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) - -#define EINT_REG_NR(x) (EINT_OFFSET(x) >> 3) - -#define eint_irq_to_bit(irq) (1 << (EINT_OFFSET(irq) & 0x7)) - -#define EINT_MODE S3C_GPIO_SFN(0xf) - -#define EINT_GPIO_0(x) S5PV210_GPH0(x) -#define EINT_GPIO_1(x) S5PV210_GPH1(x) -#define EINT_GPIO_2(x) S5PV210_GPH2(x) -#define EINT_GPIO_3(x) S5PV210_GPH3(x) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-irq.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-irq.h deleted file mode 100644 index 5c3b104a..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-irq.h +++ /dev/null @@ -1,19 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/regs-irq.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - IRQ register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_IRQ_H -#define __ASM_ARCH_REGS_IRQ_H __FILE__ - -#include <asm/hardware/vic.h> -#include <mach/map.h> - -#endif /* __ASM_ARCH_REGS_IRQ_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-sys.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-sys.h deleted file mode 100644 index cccb1edd..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/regs-sys.h +++ /dev/null @@ -1,15 +0,0 @@ -/* arch/arm/mach-s5pv210/include/mach/regs-sys.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - System registers definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define S5PV210_USB_PHY_CON (S3C_VA_SYS + 0xE80C) -#define S5PV210_USB_PHY0_EN (1 << 0) -#define S5PV210_USB_PHY1_EN (1 << 1) diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/spi-clocks.h deleted file mode 100644 index 02acded5..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/spi-clocks.h +++ /dev/null @@ -1,17 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h - * - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __S5PV210_PLAT_SPI_CLKS_H -#define __S5PV210_PLAT_SPI_CLKS_H __FILE__ - -#define S5PV210_SPI_SRCCLK_PCLK 0 -#define S5PV210_SPI_SRCCLK_SCLK 1 - -#endif /* __S5PV210_PLAT_SPI_CLKS_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/tick.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/tick.h deleted file mode 100644 index 7993b360..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/tick.h +++ /dev/null @@ -1,26 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/tick.h - * - * Copyright (c) 2009 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s3c6400/include/mach/tick.h - * - * S5PV210 - Timer tick support definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TICK_H -#define __ASM_ARCH_TICK_H __FILE__ - -static inline u32 s3c24xx_ostimer_pending(void) -{ - u32 pend = __raw_readl(VA_VIC0 + VIC_RAW_STATUS); - return pend & (1 << (IRQ_TIMER4_VIC - S5P_IRQ_VIC0(0))); -} - -#define TICK_MAX (0xffffffff) - -#endif /* __ASM_ARCH_TICK_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/timex.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/timex.h deleted file mode 100644 index 73dc8549..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/timex.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/timex.h - * - * Copyright (c) 2003-2010 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Based on arch/arm/mach-s5p6442/include/mach/timex.h - * - * S5PV210 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H __FILE__ - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - -#define CLOCK_TICK_RATE 12000000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/uncompress.h b/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/uncompress.h deleted file mode 100644 index 08ff2fda..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/include/mach/uncompress.h +++ /dev/null @@ -1,24 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/uncompress.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - uncompress code - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include <mach/map.h> -#include <plat/uncompress.h> - -static void arch_detect_cpu(void) -{ - /* we do not need to do any cpu detection here at the moment. */ -} - -#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-aquila.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-aquila.c deleted file mode 100644 index 48d018f2..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-aquila.c +++ /dev/null @@ -1,690 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/mach-aquila.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/fb.h> -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> -#include <linux/mfd/max8998.h> -#include <linux/mfd/wm8994/pdata.h> -#include <linux/regulator/fixed.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/gpio.h> - -#include <asm/hardware/vic.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/gpio-cfg.h> -#include <plat/regs-serial.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/fb.h> -#include <plat/fimc-core.h> -#include <plat/sdhci.h> -#include <plat/s5p-time.h> -#include <plat/regs-fb-v4.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define AQUILA_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define AQUILA_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define AQUILA_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg aquila_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = AQUILA_UCON_DEFAULT, - .ulcon = AQUILA_ULCON_DEFAULT, - /* - * Actually UART0 can support 256 bytes fifo, but aquila board - * supports 128 bytes fifo because of initial chip bug - */ - .ufcon = AQUILA_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG128 | S5PV210_UFCON_RXTRIG128, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = AQUILA_UCON_DEFAULT, - .ulcon = AQUILA_ULCON_DEFAULT, - .ufcon = AQUILA_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = AQUILA_UCON_DEFAULT, - .ulcon = AQUILA_ULCON_DEFAULT, - .ufcon = AQUILA_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = AQUILA_UCON_DEFAULT, - .ulcon = AQUILA_ULCON_DEFAULT, - .ufcon = AQUILA_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, - }, -}; - -/* Frame Buffer */ -static struct s3c_fb_pd_win aquila_fb_win0 = { - .win_mode = { - .left_margin = 16, - .right_margin = 16, - .upper_margin = 3, - .lower_margin = 28, - .hsync_len = 2, - .vsync_len = 2, - .xres = 480, - .yres = 800, - }, - .max_bpp = 32, - .default_bpp = 16, -}; - -static struct s3c_fb_pd_win aquila_fb_win1 = { - .win_mode = { - .left_margin = 16, - .right_margin = 16, - .upper_margin = 3, - .lower_margin = 28, - .hsync_len = 2, - .vsync_len = 2, - .xres = 480, - .yres = 800, - }, - .max_bpp = 32, - .default_bpp = 16, -}; - -static struct s3c_fb_platdata aquila_lcd_pdata __initdata = { - .win[0] = &aquila_fb_win0, - .win[1] = &aquila_fb_win1, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC | - VIDCON1_INV_VCLK | VIDCON1_INV_VDEN, - .setup_gpio = s5pv210_fb_gpio_setup_24bpp, -}; - -/* MAX8998 regulators */ -#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) - -static struct regulator_init_data aquila_ldo2_data = { - .constraints = { - .name = "VALIVE_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data aquila_ldo3_data = { - .constraints = { - .name = "VUSB+MIPI_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo4_data = { - .constraints = { - .name = "VDAC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data aquila_ldo5_data = { - .constraints = { - .name = "VTF_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data aquila_ldo6_data = { - .constraints = { - .name = "VCC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data aquila_ldo7_data = { - .constraints = { - .name = "VCC_3.0V", - .min_uV = 3000000, - .max_uV = 3000000, - .apply_uV = 1, - .boot_on = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo8_data = { - .constraints = { - .name = "VUSB+VADC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo9_data = { - .constraints = { - .name = "VCC+VCAM_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo10_data = { - .constraints = { - .name = "VPLL_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .boot_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo11_data = { - .constraints = { - .name = "CAM_IO_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo12_data = { - .constraints = { - .name = "CAM_ISP_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo13_data = { - .constraints = { - .name = "CAM_A_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo14_data = { - .constraints = { - .name = "CAM_CIF_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo15_data = { - .constraints = { - .name = "CAM_AF_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo16_data = { - .constraints = { - .name = "VMIPI_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data aquila_ldo17_data = { - .constraints = { - .name = "CAM_8M_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -/* BUCK */ -static struct regulator_consumer_supply buck1_consumer = - REGULATOR_SUPPLY("vddarm", NULL); - -static struct regulator_consumer_supply buck2_consumer = - REGULATOR_SUPPLY("vddint", NULL); - -static struct regulator_init_data aquila_buck1_data = { - .constraints = { - .name = "VARM_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &buck1_consumer, -}; - -static struct regulator_init_data aquila_buck2_data = { - .constraints = { - .name = "VINT_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &buck2_consumer, -}; - -static struct regulator_init_data aquila_buck3_data = { - .constraints = { - .name = "VCC_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data aquila_buck4_data = { - .constraints = { - .name = "CAM_CORE_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct max8998_regulator_data aquila_regulators[] = { - { MAX8998_LDO2, &aquila_ldo2_data }, - { MAX8998_LDO3, &aquila_ldo3_data }, - { MAX8998_LDO4, &aquila_ldo4_data }, - { MAX8998_LDO5, &aquila_ldo5_data }, - { MAX8998_LDO6, &aquila_ldo6_data }, - { MAX8998_LDO7, &aquila_ldo7_data }, - { MAX8998_LDO8, &aquila_ldo8_data }, - { MAX8998_LDO9, &aquila_ldo9_data }, - { MAX8998_LDO10, &aquila_ldo10_data }, - { MAX8998_LDO11, &aquila_ldo11_data }, - { MAX8998_LDO12, &aquila_ldo12_data }, - { MAX8998_LDO13, &aquila_ldo13_data }, - { MAX8998_LDO14, &aquila_ldo14_data }, - { MAX8998_LDO15, &aquila_ldo15_data }, - { MAX8998_LDO16, &aquila_ldo16_data }, - { MAX8998_LDO17, &aquila_ldo17_data }, - { MAX8998_BUCK1, &aquila_buck1_data }, - { MAX8998_BUCK2, &aquila_buck2_data }, - { MAX8998_BUCK3, &aquila_buck3_data }, - { MAX8998_BUCK4, &aquila_buck4_data }, -}; - -static struct max8998_platform_data aquila_max8998_pdata = { - .num_regulators = ARRAY_SIZE(aquila_regulators), - .regulators = aquila_regulators, - .buck1_set1 = S5PV210_GPH0(3), - .buck1_set2 = S5PV210_GPH0(4), - .buck2_set3 = S5PV210_GPH0(5), - .buck1_voltage1 = 1200000, - .buck1_voltage2 = 1200000, - .buck1_voltage3 = 1200000, - .buck1_voltage4 = 1200000, - .buck2_voltage1 = 1200000, - .buck2_voltage2 = 1200000, -}; -#endif - -static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { - REGULATOR_SUPPLY("DBVDD", "5-001a"), - REGULATOR_SUPPLY("AVDD2", "5-001a"), - REGULATOR_SUPPLY("CPVDD", "5-001a"), -}; - -static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { - REGULATOR_SUPPLY("SPKVDD1", "5-001a"), - REGULATOR_SUPPLY("SPKVDD2", "5-001a"), -}; - -static struct regulator_init_data wm8994_fixed_voltage0_init_data = { - .constraints = { - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies), - .consumer_supplies = wm8994_fixed_voltage0_supplies, -}; - -static struct regulator_init_data wm8994_fixed_voltage1_init_data = { - .constraints = { - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies), - .consumer_supplies = wm8994_fixed_voltage1_supplies, -}; - -static struct fixed_voltage_config wm8994_fixed_voltage0_config = { - .supply_name = "VCC_1.8V_PDA", - .microvolts = 1800000, - .gpio = -EINVAL, - .init_data = &wm8994_fixed_voltage0_init_data, -}; - -static struct fixed_voltage_config wm8994_fixed_voltage1_config = { - .supply_name = "V_BAT", - .microvolts = 3700000, - .gpio = -EINVAL, - .init_data = &wm8994_fixed_voltage1_init_data, -}; - -static struct platform_device wm8994_fixed_voltage0 = { - .name = "reg-fixed-voltage", - .id = 0, - .dev = { - .platform_data = &wm8994_fixed_voltage0_config, - }, -}; - -static struct platform_device wm8994_fixed_voltage1 = { - .name = "reg-fixed-voltage", - .id = 1, - .dev = { - .platform_data = &wm8994_fixed_voltage1_config, - }, -}; - -static struct regulator_consumer_supply wm8994_avdd1_supply = - REGULATOR_SUPPLY("AVDD1", "5-001a"); - -static struct regulator_consumer_supply wm8994_dcvdd_supply = - REGULATOR_SUPPLY("DCVDD", "5-001a"); - -static struct regulator_init_data wm8994_ldo1_data = { - .constraints = { - .name = "AVDD1_3.0V", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &wm8994_avdd1_supply, -}; - -static struct regulator_init_data wm8994_ldo2_data = { - .constraints = { - .name = "DCVDD_1.0V", - }, - .num_consumer_supplies = 1, - .consumer_supplies = &wm8994_dcvdd_supply, -}; - -static struct wm8994_pdata wm8994_platform_data = { - /* configure gpio1 function: 0x0001(Logic level input/output) */ - .gpio_defaults[0] = 0x0001, - /* configure gpio3/4/5/7 function for AIF2 voice */ - .gpio_defaults[2] = 0x8100, - .gpio_defaults[3] = 0x8100, - .gpio_defaults[4] = 0x8100, - .gpio_defaults[6] = 0x0100, - /* configure gpio8/9/10/11 function for AIF3 BT */ - .gpio_defaults[7] = 0x8100, - .gpio_defaults[8] = 0x0100, - .gpio_defaults[9] = 0x0100, - .gpio_defaults[10] = 0x0100, - .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */ - .ldo[1] = { 0, &wm8994_ldo2_data }, -}; - -/* GPIO I2C PMIC */ -#define AP_I2C_GPIO_PMIC_BUS_4 4 -static struct i2c_gpio_platform_data aquila_i2c_gpio_pmic_data = { - .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ - .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ -}; - -static struct platform_device aquila_i2c_gpio_pmic = { - .name = "i2c-gpio", - .id = AP_I2C_GPIO_PMIC_BUS_4, - .dev = { - .platform_data = &aquila_i2c_gpio_pmic_data, - }, -}; - -static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { -#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) - { - /* 0xCC when SRAD = 0 */ - I2C_BOARD_INFO("max8998", 0xCC >> 1), - .platform_data = &aquila_max8998_pdata, - }, -#endif -}; - -/* GPIO I2C AP 1.8V */ -#define AP_I2C_GPIO_BUS_5 5 -static struct i2c_gpio_platform_data aquila_i2c_gpio5_data = { - .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */ - .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */ -}; - -static struct platform_device aquila_i2c_gpio5 = { - .name = "i2c-gpio", - .id = AP_I2C_GPIO_BUS_5, - .dev = { - .platform_data = &aquila_i2c_gpio5_data, - }, -}; - -static struct i2c_board_info i2c_gpio5_devs[] __initdata = { - { - /* CS/ADDR = low 0x34 (FYI: high = 0x36) */ - I2C_BOARD_INFO("wm8994", 0x1a), - .platform_data = &wm8994_platform_data, - }, -}; - -/* PMIC Power button */ -static struct gpio_keys_button aquila_gpio_keys_table[] = { - { - .code = KEY_POWER, - .gpio = S5PV210_GPH2(6), - .desc = "gpio-keys: KEY_POWER", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, -}; - -static struct gpio_keys_platform_data aquila_gpio_keys_data = { - .buttons = aquila_gpio_keys_table, - .nbuttons = ARRAY_SIZE(aquila_gpio_keys_table), -}; - -static struct platform_device aquila_device_gpiokeys = { - .name = "gpio-keys", - .dev = { - .platform_data = &aquila_gpio_keys_data, - }, -}; - -static void __init aquila_pmic_init(void) -{ - /* AP_PMIC_IRQ: EINT7 */ - s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); - - /* nPower: EINT22 */ - s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); -} - -/* MoviNAND */ -static struct s3c_sdhci_platdata aquila_hsmmc0_data __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_PERMANENT, -}; - -/* Wireless LAN */ -static struct s3c_sdhci_platdata aquila_hsmmc1_data __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_EXTERNAL, - /* ext_cd_{init,cleanup} callbacks will be added later */ -}; - -/* External Flash */ -#define AQUILA_EXT_FLASH_EN S5PV210_MP05(4) -#define AQUILA_EXT_FLASH_CD S5PV210_GPH3(4) -static struct s3c_sdhci_platdata aquila_hsmmc2_data __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = AQUILA_EXT_FLASH_CD, - .ext_cd_gpio_invert = 1, -}; - -static void aquila_setup_sdhci(void) -{ - gpio_request_one(AQUILA_EXT_FLASH_EN, GPIOF_OUT_INIT_HIGH, "FLASH_EN"); - - s3c_sdhci0_set_platdata(&aquila_hsmmc0_data); - s3c_sdhci1_set_platdata(&aquila_hsmmc1_data); - s3c_sdhci2_set_platdata(&aquila_hsmmc2_data); -}; - -static struct platform_device *aquila_devices[] __initdata = { - &aquila_i2c_gpio_pmic, - &aquila_i2c_gpio5, - &aquila_device_gpiokeys, - &s3c_device_fb, - &s5p_device_onenand, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc_md, - &s5pv210_device_iis0, - &wm8994_fixed_voltage0, - &wm8994_fixed_voltage1, -}; - -static void __init aquila_sound_init(void) -{ - unsigned int gpio; - - /* CODEC_XTAL_EN - * - * The Aquila board have a oscillator which provide main clock - * to WM8994 codec. The oscillator provide 24MHz clock to WM8994 - * clock. Set gpio setting of "CODEC_XTAL_EN" to enable a oscillator. - * */ - gpio = S5PV210_GPH3(2); /* XEINT_26 */ - gpio_request(gpio, "CODEC_XTAL_EN"); - s3c_gpio_cfgpin(gpio, S3C_GPIO_OUTPUT); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - - /* Ths main clock of WM8994 codec uses the output of CLKOUT pin. - * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS) - * because it needs 24MHz clock to operate WM8994 codec. - */ - __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS); -} - -static void __init aquila_map_io(void) -{ - s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(24000000); - s3c24xx_init_uarts(aquila_uartcfgs, ARRAY_SIZE(aquila_uartcfgs)); - s5p_set_timer_source(S5P_PWM3, S5P_PWM4); -} - -static void __init aquila_machine_init(void) -{ - /* PMIC */ - aquila_pmic_init(); - i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, - ARRAY_SIZE(i2c_gpio_pmic_devs)); - /* SDHCI */ - aquila_setup_sdhci(); - - s3c_fimc_setname(0, "s5p-fimc"); - s3c_fimc_setname(1, "s5p-fimc"); - s3c_fimc_setname(2, "s5p-fimc"); - - /* SOUND */ - aquila_sound_init(); - i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs, - ARRAY_SIZE(i2c_gpio5_devs)); - - /* FB */ - s3c_fb_set_platdata(&aquila_lcd_pdata); - - platform_add_devices(aquila_devices, ARRAY_SIZE(aquila_devices)); -} - -MACHINE_START(AQUILA, "Aquila") - /* Maintainers: - Marek Szyprowski <m.szyprowski@samsung.com> - Kyungmin Park <kyungmin.park@samsung.com> */ - .atag_offset = 0x100, - .init_irq = s5pv210_init_irq, - .handle_irq = vic_handle_irq, - .map_io = aquila_map_io, - .init_machine = aquila_machine_init, - .timer = &s5p_timer, - .restart = s5pv210_restart, -MACHINE_END diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-goni.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-goni.c deleted file mode 100644 index 32395664..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-goni.c +++ /dev/null @@ -1,967 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/mach-goni.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/fb.h> -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> -#include <linux/i2c/atmel_mxt_ts.h> -#include <linux/mfd/max8998.h> -#include <linux/mfd/wm8994/pdata.h> -#include <linux/regulator/fixed.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> -#include <linux/lcd.h> -#include <linux/gpio_keys.h> -#include <linux/input.h> -#include <linux/gpio.h> -#include <linux/mmc/host.h> -#include <linux/interrupt.h> - -#include <asm/hardware/vic.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/gpio-cfg.h> -#include <plat/regs-serial.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/fb.h> -#include <plat/iic.h> -#include <plat/keypad.h> -#include <plat/sdhci.h> -#include <plat/clock.h> -#include <plat/s5p-time.h> -#include <plat/mfc.h> -#include <plat/regs-fb-v4.h> -#include <plat/camport.h> - -#include <media/v4l2-mediabus.h> -#include <media/s5p_fimc.h> -#include <media/noon010pc30.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define GONI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define GONI_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define GONI_UFCON_DEFAULT S3C2410_UFCON_FIFOMODE - -static struct s3c2410_uartcfg goni_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = GONI_UCON_DEFAULT, - .ulcon = GONI_ULCON_DEFAULT, - .ufcon = GONI_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG256 | S5PV210_UFCON_RXTRIG256, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = GONI_UCON_DEFAULT, - .ulcon = GONI_ULCON_DEFAULT, - .ufcon = GONI_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG64 | S5PV210_UFCON_RXTRIG64, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = GONI_UCON_DEFAULT, - .ulcon = GONI_ULCON_DEFAULT, - .ufcon = GONI_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = GONI_UCON_DEFAULT, - .ulcon = GONI_ULCON_DEFAULT, - .ufcon = GONI_UFCON_DEFAULT | - S5PV210_UFCON_TXTRIG16 | S5PV210_UFCON_RXTRIG16, - }, -}; - -/* Frame Buffer */ -static struct s3c_fb_pd_win goni_fb_win0 = { - .win_mode = { - .left_margin = 16, - .right_margin = 16, - .upper_margin = 2, - .lower_margin = 28, - .hsync_len = 2, - .vsync_len = 1, - .xres = 480, - .yres = 800, - .refresh = 55, - }, - .max_bpp = 32, - .default_bpp = 16, - .virtual_x = 480, - .virtual_y = 2 * 800, -}; - -static struct s3c_fb_platdata goni_lcd_pdata __initdata = { - .win[0] = &goni_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB | - VIDCON0_CLKSEL_LCD, - .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN - | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = s5pv210_fb_gpio_setup_24bpp, -}; - -static int lcd_power_on(struct lcd_device *ld, int enable) -{ - return 1; -} - -static int reset_lcd(struct lcd_device *ld) -{ - static unsigned int first = 1; - int reset_gpio = -1; - - reset_gpio = S5PV210_MP05(5); - - if (first) { - gpio_request(reset_gpio, "MLCD_RST"); - first = 0; - } - - gpio_direction_output(reset_gpio, 1); - return 1; -} - -static struct lcd_platform_data goni_lcd_platform_data = { - .reset = reset_lcd, - .power_on = lcd_power_on, - .lcd_enabled = 0, - .reset_delay = 120, /* 120ms */ - .power_on_delay = 25, /* 25ms */ - .power_off_delay = 200, /* 200ms */ -}; - -#define LCD_BUS_NUM 3 -static struct spi_board_info spi_board_info[] __initdata = { - { - .modalias = "s6e63m0", - .platform_data = &goni_lcd_platform_data, - .max_speed_hz = 1200000, - .bus_num = LCD_BUS_NUM, - .chip_select = 0, - .mode = SPI_MODE_3, - .controller_data = (void *)S5PV210_MP01(1), /* DISPLAY_CS */ - }, -}; - -static struct spi_gpio_platform_data lcd_spi_gpio_data = { - .sck = S5PV210_MP04(1), /* DISPLAY_CLK */ - .mosi = S5PV210_MP04(3), /* DISPLAY_SI */ - .miso = SPI_GPIO_NO_MISO, - .num_chipselect = 1, -}; - -static struct platform_device goni_spi_gpio = { - .name = "spi_gpio", - .id = LCD_BUS_NUM, - .dev = { - .parent = &s3c_device_fb.dev, - .platform_data = &lcd_spi_gpio_data, - }, -}; - -/* KEYPAD */ -static uint32_t keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(0, 1, KEY_MENU), /* Send */ - KEY(0, 2, KEY_BACK), /* End */ - KEY(1, 1, KEY_CONFIG), /* Half shot */ - KEY(1, 2, KEY_VOLUMEUP), - KEY(2, 1, KEY_CAMERA), /* Full shot */ - KEY(2, 2, KEY_VOLUMEDOWN), -}; - -static struct matrix_keymap_data keymap_data __initdata = { - .keymap = keymap, - .keymap_size = ARRAY_SIZE(keymap), -}; - -static struct samsung_keypad_platdata keypad_data __initdata = { - .keymap_data = &keymap_data, - .rows = 3, - .cols = 3, -}; - -/* Radio */ -static struct i2c_board_info i2c1_devs[] __initdata = { - { - I2C_BOARD_INFO("si470x", 0x10), - }, -}; - -static void __init goni_radio_init(void) -{ - int gpio; - - gpio = S5PV210_GPJ2(4); /* XMSMDATA_4 */ - gpio_request(gpio, "FM_INT"); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - i2c1_devs[0].irq = gpio_to_irq(gpio); - - gpio = S5PV210_GPJ2(5); /* XMSMDATA_5 */ - gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "FM_RST"); -} - -/* TSP */ -static struct mxt_platform_data qt602240_platform_data = { - .x_line = 17, - .y_line = 11, - .x_size = 800, - .y_size = 480, - .blen = 0x21, - .threshold = 0x28, - .voltage = 2800000, /* 2.8V */ - .orient = MXT_DIAGONAL, - .irqflags = IRQF_TRIGGER_FALLING, -}; - -static struct s3c2410_platform_i2c i2c2_data __initdata = { - .flags = 0, - .bus_num = 2, - .slave_addr = 0x10, - .frequency = 400 * 1000, - .sda_delay = 100, -}; - -static struct i2c_board_info i2c2_devs[] __initdata = { - { - I2C_BOARD_INFO("qt602240_ts", 0x4a), - .platform_data = &qt602240_platform_data, - }, -}; - -static void __init goni_tsp_init(void) -{ - int gpio; - - gpio = S5PV210_GPJ1(3); /* XMSMADDR_11 */ - gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON"); - gpio_export(gpio, 0); - - gpio = S5PV210_GPJ0(5); /* XMSMADDR_5 */ - gpio_request(gpio, "TSP_INT"); - - s5p_register_gpio_interrupt(gpio); - s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); - i2c2_devs[0].irq = gpio_to_irq(gpio); -} - -static void goni_camera_init(void) -{ - s5pv210_fimc_setup_gpio(S5P_CAMPORT_A); - - /* Set max driver strength on CAM_A_CLKOUT pin. */ - s5p_gpio_set_drvstr(S5PV210_GPE1(3), S5P_GPIO_DRVSTR_LV4); -} - -/* MAX8998 regulators */ -#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) - -static struct regulator_consumer_supply goni_ldo3_consumers[] = { - REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), -}; - -static struct regulator_consumer_supply goni_ldo5_consumers[] = { - REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"), -}; - -static struct regulator_consumer_supply goni_ldo8_consumers[] = { - REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), - REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"), -}; - -static struct regulator_consumer_supply goni_ldo11_consumers[] = { - REGULATOR_SUPPLY("vddio", "0-0030"), /* "CAM_IO_2.8V" */ -}; - -static struct regulator_consumer_supply goni_ldo13_consumers[] = { - REGULATOR_SUPPLY("vdda", "0-0030"), /* "CAM_A_2.8V" */ -}; - -static struct regulator_consumer_supply goni_ldo14_consumers[] = { - REGULATOR_SUPPLY("vdd_core", "0-0030"), /* "CAM_CIF_1.8V" */ -}; - -static struct regulator_init_data goni_ldo2_data = { - .constraints = { - .name = "VALIVE_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .always_on = 1, - .state_mem = { - .enabled = 1, - }, - }, -}; - -static struct regulator_init_data goni_ldo3_data = { - .constraints = { - .name = "VUSB+MIPI_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(goni_ldo3_consumers), - .consumer_supplies = goni_ldo3_consumers, -}; - -static struct regulator_init_data goni_ldo4_data = { - .constraints = { - .name = "VDAC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data goni_ldo5_data = { - .constraints = { - .name = "VTF_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(goni_ldo5_consumers), - .consumer_supplies = goni_ldo5_consumers, -}; - -static struct regulator_init_data goni_ldo6_data = { - .constraints = { - .name = "VCC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data goni_ldo7_data = { - .constraints = { - .name = "VLCD_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct regulator_init_data goni_ldo8_data = { - .constraints = { - .name = "VUSB+VADC_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(goni_ldo8_consumers), - .consumer_supplies = goni_ldo8_consumers, -}; - -static struct regulator_init_data goni_ldo9_data = { - .constraints = { - .name = "VCC+VCAM_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data goni_ldo10_data = { - .constraints = { - .name = "VPLL_1.1V", - .min_uV = 1100000, - .max_uV = 1100000, - .apply_uV = 1, - .boot_on = 1, - }, -}; - -static struct regulator_init_data goni_ldo11_data = { - .constraints = { - .name = "CAM_IO_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(goni_ldo11_consumers), - .consumer_supplies = goni_ldo11_consumers, -}; - -static struct regulator_init_data goni_ldo12_data = { - .constraints = { - .name = "CAM_ISP_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data goni_ldo13_data = { - .constraints = { - .name = "CAM_A_2.8V", - .min_uV = 2800000, - .max_uV = 2800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(goni_ldo13_consumers), - .consumer_supplies = goni_ldo13_consumers, -}; - -static struct regulator_init_data goni_ldo14_data = { - .constraints = { - .name = "CAM_CIF_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(goni_ldo14_consumers), - .consumer_supplies = goni_ldo14_consumers, -}; - -static struct regulator_init_data goni_ldo15_data = { - .constraints = { - .name = "CAM_AF_3.3V", - .min_uV = 3300000, - .max_uV = 3300000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data goni_ldo16_data = { - .constraints = { - .name = "VMIPI_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - }, -}; - -static struct regulator_init_data goni_ldo17_data = { - .constraints = { - .name = "VCC_3.0V_LCD", - .min_uV = 3000000, - .max_uV = 3000000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -/* BUCK */ -static struct regulator_consumer_supply buck1_consumer = - REGULATOR_SUPPLY("vddarm", NULL); - -static struct regulator_consumer_supply buck2_consumer = - REGULATOR_SUPPLY("vddint", NULL); - -static struct regulator_consumer_supply buck3_consumer = - REGULATOR_SUPPLY("vdet", "s5p-sdo"); - - -static struct regulator_init_data goni_buck1_data = { - .constraints = { - .name = "VARM_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &buck1_consumer, -}; - -static struct regulator_init_data goni_buck2_data = { - .constraints = { - .name = "VINT_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &buck2_consumer, -}; - -static struct regulator_init_data goni_buck3_data = { - .constraints = { - .name = "VCC_1.8V", - .min_uV = 1800000, - .max_uV = 1800000, - .apply_uV = 1, - .state_mem = { - .enabled = 1, - }, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &buck3_consumer, -}; - -static struct regulator_init_data goni_buck4_data = { - .constraints = { - .name = "CAM_CORE_1.2V", - .min_uV = 1200000, - .max_uV = 1200000, - .apply_uV = 1, - .always_on = 1, - }, -}; - -static struct max8998_regulator_data goni_regulators[] = { - { MAX8998_LDO2, &goni_ldo2_data }, - { MAX8998_LDO3, &goni_ldo3_data }, - { MAX8998_LDO4, &goni_ldo4_data }, - { MAX8998_LDO5, &goni_ldo5_data }, - { MAX8998_LDO6, &goni_ldo6_data }, - { MAX8998_LDO7, &goni_ldo7_data }, - { MAX8998_LDO8, &goni_ldo8_data }, - { MAX8998_LDO9, &goni_ldo9_data }, - { MAX8998_LDO10, &goni_ldo10_data }, - { MAX8998_LDO11, &goni_ldo11_data }, - { MAX8998_LDO12, &goni_ldo12_data }, - { MAX8998_LDO13, &goni_ldo13_data }, - { MAX8998_LDO14, &goni_ldo14_data }, - { MAX8998_LDO15, &goni_ldo15_data }, - { MAX8998_LDO16, &goni_ldo16_data }, - { MAX8998_LDO17, &goni_ldo17_data }, - { MAX8998_BUCK1, &goni_buck1_data }, - { MAX8998_BUCK2, &goni_buck2_data }, - { MAX8998_BUCK3, &goni_buck3_data }, - { MAX8998_BUCK4, &goni_buck4_data }, -}; - -static struct max8998_platform_data goni_max8998_pdata = { - .num_regulators = ARRAY_SIZE(goni_regulators), - .regulators = goni_regulators, - .buck1_set1 = S5PV210_GPH0(3), - .buck1_set2 = S5PV210_GPH0(4), - .buck2_set3 = S5PV210_GPH0(5), - .buck1_voltage1 = 1200000, - .buck1_voltage2 = 1200000, - .buck1_voltage3 = 1200000, - .buck1_voltage4 = 1200000, - .buck2_voltage1 = 1200000, - .buck2_voltage2 = 1200000, -}; -#endif - -static struct regulator_consumer_supply wm8994_fixed_voltage0_supplies[] = { - REGULATOR_SUPPLY("DBVDD", "5-001a"), - REGULATOR_SUPPLY("AVDD2", "5-001a"), - REGULATOR_SUPPLY("CPVDD", "5-001a"), -}; - -static struct regulator_consumer_supply wm8994_fixed_voltage1_supplies[] = { - REGULATOR_SUPPLY("SPKVDD1", "5-001a"), - REGULATOR_SUPPLY("SPKVDD2", "5-001a"), -}; - -static struct regulator_init_data wm8994_fixed_voltage0_init_data = { - .constraints = { - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage0_supplies), - .consumer_supplies = wm8994_fixed_voltage0_supplies, -}; - -static struct regulator_init_data wm8994_fixed_voltage1_init_data = { - .constraints = { - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(wm8994_fixed_voltage1_supplies), - .consumer_supplies = wm8994_fixed_voltage1_supplies, -}; - -static struct fixed_voltage_config wm8994_fixed_voltage0_config = { - .supply_name = "VCC_1.8V_PDA", - .microvolts = 1800000, - .gpio = -EINVAL, - .init_data = &wm8994_fixed_voltage0_init_data, -}; - -static struct fixed_voltage_config wm8994_fixed_voltage1_config = { - .supply_name = "V_BAT", - .microvolts = 3700000, - .gpio = -EINVAL, - .init_data = &wm8994_fixed_voltage1_init_data, -}; - -static struct platform_device wm8994_fixed_voltage0 = { - .name = "reg-fixed-voltage", - .id = 0, - .dev = { - .platform_data = &wm8994_fixed_voltage0_config, - }, -}; - -static struct platform_device wm8994_fixed_voltage1 = { - .name = "reg-fixed-voltage", - .id = 1, - .dev = { - .platform_data = &wm8994_fixed_voltage1_config, - }, -}; - -static struct regulator_consumer_supply wm8994_avdd1_supply = - REGULATOR_SUPPLY("AVDD1", "5-001a"); - -static struct regulator_consumer_supply wm8994_dcvdd_supply = - REGULATOR_SUPPLY("DCVDD", "5-001a"); - -static struct regulator_init_data wm8994_ldo1_data = { - .constraints = { - .name = "AVDD1_3.0V", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = 1, - .consumer_supplies = &wm8994_avdd1_supply, -}; - -static struct regulator_init_data wm8994_ldo2_data = { - .constraints = { - .name = "DCVDD_1.0V", - }, - .num_consumer_supplies = 1, - .consumer_supplies = &wm8994_dcvdd_supply, -}; - -static struct wm8994_pdata wm8994_platform_data = { - /* configure gpio1 function: 0x0001(Logic level input/output) */ - .gpio_defaults[0] = 0x0001, - /* configure gpio3/4/5/7 function for AIF2 voice */ - .gpio_defaults[2] = 0x8100, - .gpio_defaults[3] = 0x8100, - .gpio_defaults[4] = 0x8100, - .gpio_defaults[6] = 0x0100, - /* configure gpio8/9/10/11 function for AIF3 BT */ - .gpio_defaults[7] = 0x8100, - .gpio_defaults[8] = 0x0100, - .gpio_defaults[9] = 0x0100, - .gpio_defaults[10] = 0x0100, - .ldo[0] = { S5PV210_MP03(6), &wm8994_ldo1_data }, /* XM0FRNB_2 */ - .ldo[1] = { 0, &wm8994_ldo2_data }, -}; - -/* GPIO I2C PMIC */ -#define AP_I2C_GPIO_PMIC_BUS_4 4 -static struct i2c_gpio_platform_data goni_i2c_gpio_pmic_data = { - .sda_pin = S5PV210_GPJ4(0), /* XMSMCSN */ - .scl_pin = S5PV210_GPJ4(3), /* XMSMIRQN */ -}; - -static struct platform_device goni_i2c_gpio_pmic = { - .name = "i2c-gpio", - .id = AP_I2C_GPIO_PMIC_BUS_4, - .dev = { - .platform_data = &goni_i2c_gpio_pmic_data, - }, -}; - -static struct i2c_board_info i2c_gpio_pmic_devs[] __initdata = { -#if defined(CONFIG_REGULATOR_MAX8998) || defined(CONFIG_REGULATOR_MAX8998_MODULE) - { - /* 0xCC when SRAD = 0 */ - I2C_BOARD_INFO("max8998", 0xCC >> 1), - .platform_data = &goni_max8998_pdata, - }, -#endif -}; - -/* GPIO I2C AP 1.8V */ -#define AP_I2C_GPIO_BUS_5 5 -static struct i2c_gpio_platform_data goni_i2c_gpio5_data = { - .sda_pin = S5PV210_MP05(3), /* XM0ADDR_11 */ - .scl_pin = S5PV210_MP05(2), /* XM0ADDR_10 */ -}; - -static struct platform_device goni_i2c_gpio5 = { - .name = "i2c-gpio", - .id = AP_I2C_GPIO_BUS_5, - .dev = { - .platform_data = &goni_i2c_gpio5_data, - }, -}; - -static struct i2c_board_info i2c_gpio5_devs[] __initdata = { - { - /* CS/ADDR = low 0x34 (FYI: high = 0x36) */ - I2C_BOARD_INFO("wm8994", 0x1a), - .platform_data = &wm8994_platform_data, - }, -}; - -/* PMIC Power button */ -static struct gpio_keys_button goni_gpio_keys_table[] = { - { - .code = KEY_POWER, - .gpio = S5PV210_GPH2(6), - .desc = "gpio-keys: KEY_POWER", - .type = EV_KEY, - .active_low = 1, - .wakeup = 1, - .debounce_interval = 1, - }, -}; - -static struct gpio_keys_platform_data goni_gpio_keys_data = { - .buttons = goni_gpio_keys_table, - .nbuttons = ARRAY_SIZE(goni_gpio_keys_table), -}; - -static struct platform_device goni_device_gpiokeys = { - .name = "gpio-keys", - .dev = { - .platform_data = &goni_gpio_keys_data, - }, -}; - -static void __init goni_pmic_init(void) -{ - /* AP_PMIC_IRQ: EINT7 */ - s3c_gpio_cfgpin(S5PV210_GPH0(7), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(S5PV210_GPH0(7), S3C_GPIO_PULL_UP); - - /* nPower: EINT22 */ - s3c_gpio_cfgpin(S5PV210_GPH2(6), S3C_GPIO_SFN(0xf)); - s3c_gpio_setpull(S5PV210_GPH2(6), S3C_GPIO_PULL_UP); -} - -/* MoviNAND */ -static struct s3c_sdhci_platdata goni_hsmmc0_data __initdata = { - .max_width = 4, - .host_caps2 = MMC_CAP2_BROKEN_VOLTAGE, - .cd_type = S3C_SDHCI_CD_PERMANENT, -}; - -/* Wireless LAN */ -static struct s3c_sdhci_platdata goni_hsmmc1_data __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_EXTERNAL, - /* ext_cd_{init,cleanup} callbacks will be added later */ -}; - -/* External Flash */ -#define GONI_EXT_FLASH_EN S5PV210_MP05(4) -#define GONI_EXT_FLASH_CD S5PV210_GPH3(4) -static struct s3c_sdhci_platdata goni_hsmmc2_data __initdata = { - .max_width = 4, - .cd_type = S3C_SDHCI_CD_GPIO, - .ext_cd_gpio = GONI_EXT_FLASH_CD, - .ext_cd_gpio_invert = 1, -}; - -static struct regulator_consumer_supply mmc2_supplies[] = { - REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"), -}; - -static struct regulator_init_data mmc2_fixed_voltage_init_data = { - .constraints = { - .name = "V_TF_2.8V", - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(mmc2_supplies), - .consumer_supplies = mmc2_supplies, -}; - -static struct fixed_voltage_config mmc2_fixed_voltage_config = { - .supply_name = "EXT_FLASH_EN", - .microvolts = 2800000, - .gpio = GONI_EXT_FLASH_EN, - .enable_high = true, - .init_data = &mmc2_fixed_voltage_init_data, -}; - -static struct platform_device mmc2_fixed_voltage = { - .name = "reg-fixed-voltage", - .id = 2, - .dev = { - .platform_data = &mmc2_fixed_voltage_config, - }, -}; - -static void goni_setup_sdhci(void) -{ - s3c_sdhci0_set_platdata(&goni_hsmmc0_data); - s3c_sdhci1_set_platdata(&goni_hsmmc1_data); - s3c_sdhci2_set_platdata(&goni_hsmmc2_data); -}; - -static struct noon010pc30_platform_data noon010pc30_pldata = { - .clk_rate = 16000000UL, - .gpio_nreset = S5PV210_GPB(2), /* CAM_CIF_NRST */ - .gpio_nstby = S5PV210_GPB(0), /* CAM_CIF_NSTBY */ -}; - -static struct i2c_board_info noon010pc30_board_info = { - I2C_BOARD_INFO("NOON010PC30", 0x60 >> 1), - .platform_data = &noon010pc30_pldata, -}; - -static struct s5p_fimc_isp_info goni_camera_sensors[] = { - { - .mux_id = 0, - .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | - V4L2_MBUS_VSYNC_ACTIVE_LOW, - .bus_type = FIMC_ITU_601, - .board_info = &noon010pc30_board_info, - .i2c_bus_num = 0, - .clk_frequency = 16000000UL, - }, -}; - -static struct s5p_platform_fimc goni_fimc_md_platdata __initdata = { - .isp_info = goni_camera_sensors, - .num_clients = ARRAY_SIZE(goni_camera_sensors), -}; - -static struct platform_device *goni_devices[] __initdata = { - &s3c_device_fb, - &s5p_device_onenand, - &goni_spi_gpio, - &goni_i2c_gpio_pmic, - &goni_i2c_gpio5, - &mmc2_fixed_voltage, - &goni_device_gpiokeys, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &s5p_device_mixer, - &s5p_device_sdo, - &s3c_device_i2c0, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc_md, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - &s5pv210_device_iis0, - &s3c_device_usb_hsotg, - &samsung_device_keypad, - &s3c_device_i2c1, - &s3c_device_i2c2, - &wm8994_fixed_voltage0, - &wm8994_fixed_voltage1, -}; - -static void __init goni_sound_init(void) -{ - /* Ths main clock of WM8994 codec uses the output of CLKOUT pin. - * The CLKOUT[9:8] set to 0x3(XUSBXTI) of 0xE010E000(OTHERS) - * because it needs 24MHz clock to operate WM8994 codec. - */ - __raw_writel(__raw_readl(S5P_OTHERS) | (0x3 << 8), S5P_OTHERS); -} - -static void __init goni_map_io(void) -{ - s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(24000000); - s3c24xx_init_uarts(goni_uartcfgs, ARRAY_SIZE(goni_uartcfgs)); - s5p_set_timer_source(S5P_PWM3, S5P_PWM4); -} - -static void __init goni_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init goni_machine_init(void) -{ - /* Radio: call before I2C 1 registeration */ - goni_radio_init(); - - /* I2C0 */ - s3c_i2c0_set_platdata(NULL); - - /* I2C1 */ - s3c_i2c1_set_platdata(NULL); - i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs)); - - /* TSP: call before I2C 2 registeration */ - goni_tsp_init(); - - /* I2C2 */ - s3c_i2c2_set_platdata(&i2c2_data); - i2c_register_board_info(2, i2c2_devs, ARRAY_SIZE(i2c2_devs)); - - /* PMIC */ - goni_pmic_init(); - i2c_register_board_info(AP_I2C_GPIO_PMIC_BUS_4, i2c_gpio_pmic_devs, - ARRAY_SIZE(i2c_gpio_pmic_devs)); - /* SDHCI */ - goni_setup_sdhci(); - - /* SOUND */ - goni_sound_init(); - i2c_register_board_info(AP_I2C_GPIO_BUS_5, i2c_gpio5_devs, - ARRAY_SIZE(i2c_gpio5_devs)); - - /* FB */ - s3c_fb_set_platdata(&goni_lcd_pdata); - - /* FIMC */ - s3c_set_platdata(&goni_fimc_md_platdata, sizeof(goni_fimc_md_platdata), - &s5p_device_fimc_md); - - goni_camera_init(); - - /* SPI */ - spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); - - /* KEYPAD */ - samsung_keypad_set_platdata(&keypad_data); - - clk_xusbxti.rate = 24000000; - - platform_add_devices(goni_devices, ARRAY_SIZE(goni_devices)); -} - -MACHINE_START(GONI, "GONI") - /* Maintainers: Kyungmin Park <kyungmin.park@samsung.com> */ - .atag_offset = 0x100, - .init_irq = s5pv210_init_irq, - .handle_irq = vic_handle_irq, - .map_io = goni_map_io, - .init_machine = goni_machine_init, - .timer = &s5p_timer, - .reserve = &goni_reserve, - .restart = s5pv210_restart, -MACHINE_END diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-smdkc110.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-smdkc110.c deleted file mode 100644 index dfc29236..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-smdkc110.c +++ /dev/null @@ -1,162 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/mach-smdkc110.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/i2c.h> -#include <linux/device.h> - -#include <asm/hardware/vic.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/regs-serial.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/ata.h> -#include <plat/iic.h> -#include <plat/pm.h> -#include <plat/s5p-time.h> -#include <plat/mfc.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define SMDKC110_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDKC110_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDKC110_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDKC110_UCON_DEFAULT, - .ulcon = SMDKC110_ULCON_DEFAULT, - .ufcon = SMDKC110_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDKC110_UCON_DEFAULT, - .ulcon = SMDKC110_ULCON_DEFAULT, - .ufcon = SMDKC110_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDKC110_UCON_DEFAULT, - .ulcon = SMDKC110_ULCON_DEFAULT, - .ufcon = SMDKC110_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDKC110_UCON_DEFAULT, - .ulcon = SMDKC110_ULCON_DEFAULT, - .ufcon = SMDKC110_UFCON_DEFAULT, - }, -}; - -static struct s3c_ide_platdata smdkc110_ide_pdata __initdata = { - .setup_gpio = s5pv210_ide_setup_gpio, -}; - -static struct platform_device *smdkc110_devices[] __initdata = { - &samsung_asoc_dma, - &s5pv210_device_iis0, - &s5pv210_device_ac97, - &s5pv210_device_spdif, - &s3c_device_cfcon, - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_i2c2, - &s3c_device_rtc, - &s3c_device_wdt, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc_md, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, -}; - -static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = { - { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ - { I2C_BOARD_INFO("wm8580", 0x1b), }, -}; - -static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = { - /* To Be Updated */ -}; - -static struct i2c_board_info smdkc110_i2c_devs2[] __initdata = { - /* To Be Updated */ -}; - -static void __init smdkc110_map_io(void) -{ - s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(24000000); - s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); - s5p_set_timer_source(S5P_PWM3, S5P_PWM4); -} - -static void __init smdkc110_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init smdkc110_machine_init(void) -{ - s3c_pm_init(); - - s3c_i2c0_set_platdata(NULL); - s3c_i2c1_set_platdata(NULL); - s3c_i2c2_set_platdata(NULL); - i2c_register_board_info(0, smdkc110_i2c_devs0, - ARRAY_SIZE(smdkc110_i2c_devs0)); - i2c_register_board_info(1, smdkc110_i2c_devs1, - ARRAY_SIZE(smdkc110_i2c_devs1)); - i2c_register_board_info(2, smdkc110_i2c_devs2, - ARRAY_SIZE(smdkc110_i2c_devs2)); - - s3c_ide_set_platdata(&smdkc110_ide_pdata); - - platform_add_devices(smdkc110_devices, ARRAY_SIZE(smdkc110_devices)); -} - -MACHINE_START(SMDKC110, "SMDKC110") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .atag_offset = 0x100, - .init_irq = s5pv210_init_irq, - .handle_irq = vic_handle_irq, - .map_io = smdkc110_map_io, - .init_machine = smdkc110_machine_init, - .timer = &s5p_timer, - .restart = s5pv210_restart, - .reserve = &smdkc110_reserve, -MACHINE_END diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-smdkv210.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-smdkv210.c deleted file mode 100644 index 91d4ad8b..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-smdkv210.c +++ /dev/null @@ -1,337 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/mach-smdkv210.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/i2c.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/device.h> -#include <linux/dm9000.h> -#include <linux/fb.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/pwm_backlight.h> - -#include <asm/hardware/vic.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <video/platform_lcd.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/regs-serial.h> -#include <plat/regs-srom.h> -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/adc.h> -#include <plat/ts.h> -#include <plat/ata.h> -#include <plat/iic.h> -#include <plat/keypad.h> -#include <plat/pm.h> -#include <plat/fb.h> -#include <plat/s5p-time.h> -#include <plat/backlight.h> -#include <plat/regs-fb-v4.h> -#include <plat/mfc.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define SMDKV210_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define SMDKV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg smdkv210_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = SMDKV210_UCON_DEFAULT, - .ulcon = SMDKV210_ULCON_DEFAULT, - .ufcon = SMDKV210_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = SMDKV210_UCON_DEFAULT, - .ulcon = SMDKV210_ULCON_DEFAULT, - .ufcon = SMDKV210_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = SMDKV210_UCON_DEFAULT, - .ulcon = SMDKV210_ULCON_DEFAULT, - .ufcon = SMDKV210_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = SMDKV210_UCON_DEFAULT, - .ulcon = SMDKV210_ULCON_DEFAULT, - .ufcon = SMDKV210_UFCON_DEFAULT, - }, -}; - -static struct s3c_ide_platdata smdkv210_ide_pdata __initdata = { - .setup_gpio = s5pv210_ide_setup_gpio, -}; - -static uint32_t smdkv210_keymap[] __initdata = { - /* KEY(row, col, keycode) */ - KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3), - KEY(0, 6, KEY_4), KEY(0, 7, KEY_5), - KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C), - KEY(1, 6, KEY_D), KEY(1, 7, KEY_E) -}; - -static struct matrix_keymap_data smdkv210_keymap_data __initdata = { - .keymap = smdkv210_keymap, - .keymap_size = ARRAY_SIZE(smdkv210_keymap), -}; - -static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = { - .keymap_data = &smdkv210_keymap_data, - .rows = 8, - .cols = 8, -}; - -static struct resource smdkv210_dm9000_resources[] = { - [0] = { - .start = S5PV210_PA_SROM_BANK5, - .end = S5PV210_PA_SROM_BANK5, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = S5PV210_PA_SROM_BANK5 + 2, - .end = S5PV210_PA_SROM_BANK5 + 2, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_EINT(9), - .end = IRQ_EINT(9), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, - }, -}; - -static struct dm9000_plat_data smdkv210_dm9000_platdata = { - .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, - .dev_addr = { 0x00, 0x09, 0xc0, 0xff, 0xec, 0x48 }, -}; - -static struct platform_device smdkv210_dm9000 = { - .name = "dm9000", - .id = -1, - .num_resources = ARRAY_SIZE(smdkv210_dm9000_resources), - .resource = smdkv210_dm9000_resources, - .dev = { - .platform_data = &smdkv210_dm9000_platdata, - }, -}; - -static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd, - unsigned int power) -{ - if (power) { -#if !defined(CONFIG_BACKLIGHT_PWM) - gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_HIGH, "GPD0"); - gpio_free(S5PV210_GPD0(3)); -#endif - - /* fire nRESET on power up */ - gpio_request_one(S5PV210_GPH0(6), GPIOF_OUT_INIT_HIGH, "GPH0"); - - gpio_set_value(S5PV210_GPH0(6), 0); - mdelay(10); - - gpio_set_value(S5PV210_GPH0(6), 1); - mdelay(10); - - gpio_free(S5PV210_GPH0(6)); - } else { -#if !defined(CONFIG_BACKLIGHT_PWM) - gpio_request_one(S5PV210_GPD0(3), GPIOF_OUT_INIT_LOW, "GPD0"); - gpio_free(S5PV210_GPD0(3)); -#endif - } -} - -static struct plat_lcd_data smdkv210_lcd_lte480wv_data = { - .set_power = smdkv210_lte480wv_set_power, -}; - -static struct platform_device smdkv210_lcd_lte480wv = { - .name = "platform-lcd", - .dev.parent = &s3c_device_fb.dev, - .dev.platform_data = &smdkv210_lcd_lte480wv_data, -}; - -static struct s3c_fb_pd_win smdkv210_fb_win0 = { - .win_mode = { - .left_margin = 13, - .right_margin = 8, - .upper_margin = 7, - .lower_margin = 5, - .hsync_len = 3, - .vsync_len = 1, - .xres = 800, - .yres = 480, - }, - .max_bpp = 32, - .default_bpp = 24, -}; - -static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = { - .win[0] = &smdkv210_fb_win0, - .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, - .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, - .setup_gpio = s5pv210_fb_gpio_setup_24bpp, -}; - -static struct platform_device *smdkv210_devices[] __initdata = { - &s3c_device_adc, - &s3c_device_cfcon, - &s3c_device_fb, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_i2c2, - &s3c_device_rtc, - &s3c_device_ts, - &s3c_device_wdt, - &s5p_device_fimc0, - &s5p_device_fimc1, - &s5p_device_fimc2, - &s5p_device_fimc_md, - &s5p_device_jpeg, - &s5p_device_mfc, - &s5p_device_mfc_l, - &s5p_device_mfc_r, - &s5pv210_device_ac97, - &s5pv210_device_iis0, - &s5pv210_device_spdif, - &samsung_asoc_dma, - &samsung_asoc_idma, - &samsung_device_keypad, - &smdkv210_dm9000, - &smdkv210_lcd_lte480wv, -}; - -static void __init smdkv210_dm9000_init(void) -{ - unsigned int tmp; - - gpio_request(S5PV210_MP01(5), "nCS5"); - s3c_gpio_cfgpin(S5PV210_MP01(5), S3C_GPIO_SFN(2)); - gpio_free(S5PV210_MP01(5)); - - tmp = (5 << S5P_SROM_BCX__TACC__SHIFT); - __raw_writel(tmp, S5P_SROM_BC5); - - tmp = __raw_readl(S5P_SROM_BW); - tmp &= (S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS5__SHIFT); - tmp |= (1 << S5P_SROM_BW__NCS5__SHIFT); - __raw_writel(tmp, S5P_SROM_BW); -} - -static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = { - { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ - { I2C_BOARD_INFO("wm8580", 0x1b), }, -}; - -static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = { - /* To Be Updated */ -}; - -static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = { - /* To Be Updated */ -}; - -/* LCD Backlight data */ -static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = { - .no = S5PV210_GPD0(3), - .func = S3C_GPIO_SFN(2), -}; - -static struct platform_pwm_backlight_data smdkv210_bl_data = { - .pwm_id = 3, - .pwm_period_ns = 1000, -}; - -static void __init smdkv210_map_io(void) -{ - s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(24000000); - s3c24xx_init_uarts(smdkv210_uartcfgs, ARRAY_SIZE(smdkv210_uartcfgs)); - s5p_set_timer_source(S5P_PWM2, S5P_PWM4); -} - -static void __init smdkv210_reserve(void) -{ - s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20); -} - -static void __init smdkv210_machine_init(void) -{ - s3c_pm_init(); - - smdkv210_dm9000_init(); - - samsung_keypad_set_platdata(&smdkv210_keypad_data); - s3c24xx_ts_set_platdata(NULL); - - s3c_i2c0_set_platdata(NULL); - s3c_i2c1_set_platdata(NULL); - s3c_i2c2_set_platdata(NULL); - i2c_register_board_info(0, smdkv210_i2c_devs0, - ARRAY_SIZE(smdkv210_i2c_devs0)); - i2c_register_board_info(1, smdkv210_i2c_devs1, - ARRAY_SIZE(smdkv210_i2c_devs1)); - i2c_register_board_info(2, smdkv210_i2c_devs2, - ARRAY_SIZE(smdkv210_i2c_devs2)); - - s3c_ide_set_platdata(&smdkv210_ide_pdata); - - s3c_fb_set_platdata(&smdkv210_lcd0_pdata); - - samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data); - - platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); -} - -MACHINE_START(SMDKV210, "SMDKV210") - /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ - .atag_offset = 0x100, - .init_irq = s5pv210_init_irq, - .handle_irq = vic_handle_irq, - .map_io = smdkv210_map_io, - .init_machine = smdkv210_machine_init, - .timer = &s5p_timer, - .restart = s5pv210_restart, - .reserve = &smdkv210_reserve, -MACHINE_END diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-torbreck.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-torbreck.c deleted file mode 100644 index 74e99bc0..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/mach-torbreck.c +++ /dev/null @@ -1,137 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/mach-torbreck.c - * - * Copyright (c) 2010 aESOP Community - * http://www.aesop.or.kr/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/i2c.h> -#include <linux/init.h> -#include <linux/serial_core.h> - -#include <asm/hardware/vic.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/setup.h> -#include <asm/mach-types.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> - -#include <plat/regs-serial.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/iic.h> -#include <plat/s5p-time.h> - -#include "common.h" - -/* Following are default values for UCON, ULCON and UFCON UART registers */ -#define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ - S3C2410_UCON_RXILEVEL | \ - S3C2410_UCON_TXIRQMODE | \ - S3C2410_UCON_RXIRQMODE | \ - S3C2410_UCON_RXFIFO_TOI | \ - S3C2443_UCON_RXERR_IRQEN) - -#define TORBRECK_ULCON_DEFAULT S3C2410_LCON_CS8 - -#define TORBRECK_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ - S5PV210_UFCON_TXTRIG4 | \ - S5PV210_UFCON_RXTRIG4) - -static struct s3c2410_uartcfg torbreck_uartcfgs[] __initdata = { - [0] = { - .hwport = 0, - .flags = 0, - .ucon = TORBRECK_UCON_DEFAULT, - .ulcon = TORBRECK_ULCON_DEFAULT, - .ufcon = TORBRECK_UFCON_DEFAULT, - }, - [1] = { - .hwport = 1, - .flags = 0, - .ucon = TORBRECK_UCON_DEFAULT, - .ulcon = TORBRECK_ULCON_DEFAULT, - .ufcon = TORBRECK_UFCON_DEFAULT, - }, - [2] = { - .hwport = 2, - .flags = 0, - .ucon = TORBRECK_UCON_DEFAULT, - .ulcon = TORBRECK_ULCON_DEFAULT, - .ufcon = TORBRECK_UFCON_DEFAULT, - }, - [3] = { - .hwport = 3, - .flags = 0, - .ucon = TORBRECK_UCON_DEFAULT, - .ulcon = TORBRECK_ULCON_DEFAULT, - .ufcon = TORBRECK_UFCON_DEFAULT, - }, -}; - -static struct platform_device *torbreck_devices[] __initdata = { - &s5pv210_device_iis0, - &s3c_device_cfcon, - &s3c_device_hsmmc0, - &s3c_device_hsmmc1, - &s3c_device_hsmmc2, - &s3c_device_hsmmc3, - &s3c_device_i2c0, - &s3c_device_i2c1, - &s3c_device_i2c2, - &s3c_device_rtc, - &s3c_device_wdt, -}; - -static struct i2c_board_info torbreck_i2c_devs0[] __initdata = { - /* To Be Updated */ -}; - -static struct i2c_board_info torbreck_i2c_devs1[] __initdata = { - /* To Be Updated */ -}; - -static struct i2c_board_info torbreck_i2c_devs2[] __initdata = { - /* To Be Updated */ -}; - -static void __init torbreck_map_io(void) -{ - s5pv210_init_io(NULL, 0); - s3c24xx_init_clocks(24000000); - s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); - s5p_set_timer_source(S5P_PWM3, S5P_PWM4); -} - -static void __init torbreck_machine_init(void) -{ - s3c_i2c0_set_platdata(NULL); - s3c_i2c1_set_platdata(NULL); - s3c_i2c2_set_platdata(NULL); - i2c_register_board_info(0, torbreck_i2c_devs0, - ARRAY_SIZE(torbreck_i2c_devs0)); - i2c_register_board_info(1, torbreck_i2c_devs1, - ARRAY_SIZE(torbreck_i2c_devs1)); - i2c_register_board_info(2, torbreck_i2c_devs2, - ARRAY_SIZE(torbreck_i2c_devs2)); - - platform_add_devices(torbreck_devices, ARRAY_SIZE(torbreck_devices)); -} - -MACHINE_START(TORBRECK, "TORBRECK") - /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */ - .atag_offset = 0x100, - .init_irq = s5pv210_init_irq, - .handle_irq = vic_handle_irq, - .map_io = torbreck_map_io, - .init_machine = torbreck_machine_init, - .timer = &s5p_timer, - .restart = s5pv210_restart, -MACHINE_END diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/pm.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/pm.c deleted file mode 100644 index 736bfb10..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/pm.c +++ /dev/null @@ -1,177 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/pm.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV210 - Power Management support - * - * Based on arch/arm/mach-s3c2410/pm.c - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/init.h> -#include <linux/suspend.h> -#include <linux/syscore_ops.h> -#include <linux/io.h> - -#include <plat/cpu.h> -#include <plat/pm.h> -#include <plat/regs-timer.h> - -#include <mach/regs-irq.h> -#include <mach/regs-clock.h> - -static struct sleep_save s5pv210_core_save[] = { - /* Clock source */ - SAVE_ITEM(S5P_CLK_SRC0), - SAVE_ITEM(S5P_CLK_SRC1), - SAVE_ITEM(S5P_CLK_SRC2), - SAVE_ITEM(S5P_CLK_SRC3), - SAVE_ITEM(S5P_CLK_SRC4), - SAVE_ITEM(S5P_CLK_SRC5), - SAVE_ITEM(S5P_CLK_SRC6), - - /* Clock source Mask */ - SAVE_ITEM(S5P_CLK_SRC_MASK0), - SAVE_ITEM(S5P_CLK_SRC_MASK1), - - /* Clock Divider */ - SAVE_ITEM(S5P_CLK_DIV0), - SAVE_ITEM(S5P_CLK_DIV1), - SAVE_ITEM(S5P_CLK_DIV2), - SAVE_ITEM(S5P_CLK_DIV3), - SAVE_ITEM(S5P_CLK_DIV4), - SAVE_ITEM(S5P_CLK_DIV5), - SAVE_ITEM(S5P_CLK_DIV6), - SAVE_ITEM(S5P_CLK_DIV7), - - /* Clock Main Gate */ - SAVE_ITEM(S5P_CLKGATE_MAIN0), - SAVE_ITEM(S5P_CLKGATE_MAIN1), - SAVE_ITEM(S5P_CLKGATE_MAIN2), - - /* Clock source Peri Gate */ - SAVE_ITEM(S5P_CLKGATE_PERI0), - SAVE_ITEM(S5P_CLKGATE_PERI1), - - /* Clock source SCLK Gate */ - SAVE_ITEM(S5P_CLKGATE_SCLK0), - SAVE_ITEM(S5P_CLKGATE_SCLK1), - - /* Clock IP Clock gate */ - SAVE_ITEM(S5P_CLKGATE_IP0), - SAVE_ITEM(S5P_CLKGATE_IP1), - SAVE_ITEM(S5P_CLKGATE_IP2), - SAVE_ITEM(S5P_CLKGATE_IP3), - SAVE_ITEM(S5P_CLKGATE_IP4), - - /* Clock Blcok and Bus gate */ - SAVE_ITEM(S5P_CLKGATE_BLOCK), - SAVE_ITEM(S5P_CLKGATE_BUS0), - - /* Clock ETC */ - SAVE_ITEM(S5P_CLK_OUT), - SAVE_ITEM(S5P_MDNIE_SEL), - - /* PWM Register */ - SAVE_ITEM(S3C2410_TCFG0), - SAVE_ITEM(S3C2410_TCFG1), - SAVE_ITEM(S3C64XX_TINT_CSTAT), - SAVE_ITEM(S3C2410_TCON), - SAVE_ITEM(S3C2410_TCNTB(0)), - SAVE_ITEM(S3C2410_TCMPB(0)), - SAVE_ITEM(S3C2410_TCNTO(0)), -}; - -static int s5pv210_cpu_suspend(unsigned long arg) -{ - unsigned long tmp; - - /* issue the standby signal into the pm unit. Note, we - * issue a write-buffer drain just in case */ - - tmp = 0; - - asm("b 1f\n\t" - ".align 5\n\t" - "1:\n\t" - "mcr p15, 0, %0, c7, c10, 5\n\t" - "mcr p15, 0, %0, c7, c10, 4\n\t" - "wfi" : : "r" (tmp)); - - /* we should never get past here */ - panic("sleep resumed to originator?"); -} - -static void s5pv210_pm_prepare(void) -{ - unsigned int tmp; - - /* ensure at least INFORM0 has the resume address */ - __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0); - - tmp = __raw_readl(S5P_SLEEP_CFG); - tmp &= ~(S5P_SLEEP_CFG_OSC_EN | S5P_SLEEP_CFG_USBOSC_EN); - __raw_writel(tmp, S5P_SLEEP_CFG); - - /* WFI for SLEEP mode configuration by SYSCON */ - tmp = __raw_readl(S5P_PWR_CFG); - tmp &= S5P_CFG_WFI_CLEAN; - tmp |= S5P_CFG_WFI_SLEEP; - __raw_writel(tmp, S5P_PWR_CFG); - - /* SYSCON interrupt handling disable */ - tmp = __raw_readl(S5P_OTHERS); - tmp |= S5P_OTHER_SYSC_INTOFF; - __raw_writel(tmp, S5P_OTHERS); - - s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); -} - -static int s5pv210_pm_add(struct device *dev, struct subsys_interface *sif) -{ - pm_cpu_prep = s5pv210_pm_prepare; - pm_cpu_sleep = s5pv210_cpu_suspend; - - return 0; -} - -static struct subsys_interface s5pv210_pm_interface = { - .name = "s5pv210_pm", - .subsys = &s5pv210_subsys, - .add_dev = s5pv210_pm_add, -}; - -static __init int s5pv210_pm_drvinit(void) -{ - return subsys_interface_register(&s5pv210_pm_interface); -} -arch_initcall(s5pv210_pm_drvinit); - -static void s5pv210_pm_resume(void) -{ - u32 tmp; - - tmp = __raw_readl(S5P_OTHERS); - tmp |= (S5P_OTHERS_RET_IO | S5P_OTHERS_RET_CF |\ - S5P_OTHERS_RET_MMC | S5P_OTHERS_RET_UART); - __raw_writel(tmp , S5P_OTHERS); - - s3c_pm_do_restore_core(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); -} - -static struct syscore_ops s5pv210_pm_syscore_ops = { - .resume = s5pv210_pm_resume, -}; - -static __init int s5pv210_pm_syscore_init(void) -{ - register_syscore_ops(&s5pv210_pm_syscore_ops); - return 0; -} -arch_initcall(s5pv210_pm_syscore_init); diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-fb-24bpp.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-fb-24bpp.c deleted file mode 100644 index 55103c82..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-fb-24bpp.c +++ /dev/null @@ -1,49 +0,0 @@ -/* linux/arch/arm/plat-s5pv210/setup-fb-24bpp.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Base s5pv210 setup information for 24bpp LCD framebuffer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/fb.h> -#include <linux/gpio.h> - -#include <mach/map.h> -#include <plat/fb.h> -#include <mach/regs-clock.h> -#include <plat/gpio-cfg.h> - -static void s5pv210_fb_cfg_gpios(unsigned int base, unsigned int nr) -{ - s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(2)); - - for (; nr > 0; nr--, base++) - s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); -} - - -void s5pv210_fb_gpio_setup_24bpp(void) -{ - s5pv210_fb_cfg_gpios(S5PV210_GPF0(0), 8); - s5pv210_fb_cfg_gpios(S5PV210_GPF1(0), 8); - s5pv210_fb_cfg_gpios(S5PV210_GPF2(0), 8); - s5pv210_fb_cfg_gpios(S5PV210_GPF3(0), 4); - - /* Set DISPLAY_CONTROL register for Display path selection. - * - * ouput | RGB | I80 | ITU - * ----------------------------------- - * 00 | MIE | FIMD | FIMD - * 01 | MDNIE | MDNIE | FIMD - * 10 | FIMD | FIMD | FIMD - * 11 | FIMD | FIMD | FIMD - */ - writel(0x2, S5P_MDNIE_SEL); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-fimc.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-fimc.c deleted file mode 100644 index 54cc5b11..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-fimc.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - * - * S5PV210 camera interface GPIO configuration. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> -#include <plat/camport.h> - -int s5pv210_fimc_setup_gpio(enum s5p_camport_id id) -{ - u32 gpio8, gpio5; - int ret; - - switch (id) { - case S5P_CAMPORT_A: - gpio8 = S5PV210_GPE0(0); - gpio5 = S5PV210_GPE1(0); - break; - - case S5P_CAMPORT_B: - gpio8 = S5PV210_GPJ0(0); - gpio5 = S5PV210_GPJ1(0); - break; - - default: - WARN(1, "Wrong camport id: %d\n", id); - return -EINVAL; - } - - ret = s3c_gpio_cfgall_range(gpio8, 8, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_UP); - if (ret) - return ret; - - return s3c_gpio_cfgall_range(gpio5, 5, S3C_GPIO_SFN(2), - S3C_GPIO_PULL_UP); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c0.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c0.c deleted file mode 100644 index 0f1cc3a1..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c0.c +++ /dev/null @@ -1,28 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/setup-i2c0.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * I2C0 GPIO configuration. - * - * Based on plat-s3c64xx/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/gpio.h> - -struct platform_device; /* don't need the contents */ - -#include <plat/iic.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5PV210_GPD1(0), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c1.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c1.c deleted file mode 100644 index f61365a3..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c1.c +++ /dev/null @@ -1,28 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/setup-i2c1.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * I2C1 GPIO configuration. - * - * Based on plat-s3c64xx/setup-i2c1.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/gpio.h> - -struct platform_device; /* don't need the contents */ - -#include <plat/iic.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c1_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5PV210_GPD1(2), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c2.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c2.c deleted file mode 100644 index 2f91b5ce..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-i2c2.c +++ /dev/null @@ -1,28 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/setup-i2c2.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * I2C2 GPIO configuration. - * - * Based on plat-s3c64xx/setup-i2c0.c - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/gpio.h> - -struct platform_device; /* don't need the contents */ - -#include <plat/iic.h> -#include <plat/gpio-cfg.h> - -void s3c_i2c2_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgall_range(S5PV210_GPD1(4), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-ide.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-ide.c deleted file mode 100644 index ea123d54..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-ide.c +++ /dev/null @@ -1,39 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/setup-ide.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV210 setup information for IDE - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/gpio.h> - -#include <plat/gpio-cfg.h> - -static void s5pv210_ide_cfg_gpios(unsigned int base, unsigned int nr) -{ - s3c_gpio_cfgrange_nopull(base, nr, S3C_GPIO_SFN(4)); - - for (; nr > 0; nr--, base++) - s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4); -} - -void s5pv210_ide_setup_gpio(void) -{ - /* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */ - s5pv210_ide_cfg_gpios(S5PV210_GPJ0(0), 8); - - /* CF_Data[0 - 7] */ - s5pv210_ide_cfg_gpios(S5PV210_GPJ2(0), 8); - - /* CF_Data[8 - 15] */ - s5pv210_ide_cfg_gpios(S5PV210_GPJ3(0), 8); - - /* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */ - s5pv210_ide_cfg_gpios(S5PV210_GPJ4(0), 4); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-keypad.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-keypad.c deleted file mode 100644 index c56420a5..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-keypad.c +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/arch/arm/mach-s5pv210/setup-keypad.c - * - * Copyright (C) 2010 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> - -void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) -{ - /* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */ - s3c_gpio_cfgrange_nopull(S5PV210_GPH3(0), rows, S3C_GPIO_SFN(3)); - - /* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */ - s3c_gpio_cfgrange_nopull(S5PV210_GPH2(0), cols, S3C_GPIO_SFN(3)); -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-sdhci-gpio.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-sdhci-gpio.c deleted file mode 100644 index 3e3ac05b..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-sdhci-gpio.c +++ /dev/null @@ -1,104 +0,0 @@ -/* linux/arch/arm/plat-s5pc1xx/setup-sdhci-gpio.c - * - * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/mmc/host.h> -#include <linux/mmc/card.h> - -#include <plat/gpio-cfg.h> -#include <plat/regs-sdhci.h> -#include <plat/sdhci.h> - -void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG0(0), 2, S3C_GPIO_SFN(2)); - - switch (width) { - case 8: - /* GPG1[3:6] special-function 3 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(3)); - case 4: - /* GPG0[3:6] special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG0(3), 4, S3C_GPIO_SFN(2)); - default: - break; - } - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PV210_GPG0(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPG0(2), S3C_GPIO_SFN(2)); - } -} - -void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG1[0:1] pins to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG1(0), 2, S3C_GPIO_SFN(2)); - - /* Data pin GPG1[3:6] to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG1(3), 4, S3C_GPIO_SFN(2)); - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PV210_GPG1(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPG1(2), S3C_GPIO_SFN(2)); - } -} - -void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG2[0:1] pins to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG2(0), 2, S3C_GPIO_SFN(2)); - - switch (width) { - case 8: - /* Data pin GPG3[3:6] to special-function 3 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(3)); - case 4: - /* Data pin GPG2[3:6] to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG2(3), 4, S3C_GPIO_SFN(2)); - default: - break; - } - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PV210_GPG2(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPG2(2), S3C_GPIO_SFN(2)); - } -} - -void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *dev, int width) -{ - struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; - - /* Set all the necessary GPG3[0:1] pins to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG3(0), 2, S3C_GPIO_SFN(2)); - - /* Data pin GPG3[3:6] to special-function 2 */ - s3c_gpio_cfgrange_nopull(S5PV210_GPG3(3), 4, S3C_GPIO_SFN(2)); - - if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { - s3c_gpio_setpull(S5PV210_GPG3(2), S3C_GPIO_PULL_UP); - s3c_gpio_cfgpin(S5PV210_GPG3(2), S3C_GPIO_SFN(2)); - } -} diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-spi.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-spi.c deleted file mode 100644 index f43c5048..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-spi.c +++ /dev/null @@ -1,51 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/setup-spi.c - * - * Copyright (C) 2011 Samsung Electronics Ltd. - * http://www.samsung.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <plat/gpio-cfg.h> -#include <plat/s3c64xx-spi.h> - -#ifdef CONFIG_S3C64XX_DEV_SPI0 -struct s3c64xx_spi_info s3c64xx_spi0_pdata = { - .fifo_lvl_mask = 0x1ff, - .rx_lvl_offset = 15, - .high_speed = 1, - .tx_st_done = 25, -}; - -int s3c64xx_spi0_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP); - s3c_gpio_cfgall_range(S5PV210_GPB(2), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif - -#ifdef CONFIG_S3C64XX_DEV_SPI1 -struct s3c64xx_spi_info s3c64xx_spi1_pdata = { - .fifo_lvl_mask = 0x7f, - .rx_lvl_offset = 15, - .high_speed = 1, - .tx_st_done = 25, -}; - -int s3c64xx_spi1_cfg_gpio(struct platform_device *dev) -{ - s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2)); - s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP); - s3c_gpio_cfgall_range(S5PV210_GPB(6), 2, - S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP); - return 0; -} -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-usb-phy.c b/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-usb-phy.c deleted file mode 100644 index be39cf4a..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-s5pv210/setup-usb-phy.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (C) 2012 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundationr - */ - -#include <linux/clk.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/platform_device.h> -#include <mach/map.h> -#include <mach/regs-sys.h> -#include <plat/cpu.h> -#include <plat/regs-usb-hsotg-phy.h> -#include <plat/usb-phy.h> - -static int s5pv210_usb_otgphy_init(struct platform_device *pdev) -{ - struct clk *xusbxti; - u32 phyclk; - - writel(readl(S5PV210_USB_PHY_CON) | S5PV210_USB_PHY0_EN, - S5PV210_USB_PHY_CON); - - /* set clock frequency for PLL */ - phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK; - - xusbxti = clk_get(&pdev->dev, "xusbxti"); - if (xusbxti && !IS_ERR(xusbxti)) { - switch (clk_get_rate(xusbxti)) { - case 12 * MHZ: - phyclk |= S3C_PHYCLK_CLKSEL_12M; - break; - case 24 * MHZ: - phyclk |= S3C_PHYCLK_CLKSEL_24M; - break; - default: - case 48 * MHZ: - /* default reference clock */ - break; - } - clk_put(xusbxti); - } - - /* TODO: select external clock/oscillator */ - writel(phyclk | S3C_PHYCLK_CLK_FORCE, S3C_PHYCLK); - - /* set to normal OTG PHY */ - writel((readl(S3C_PHYPWR) & ~S3C_PHYPWR_NORMAL_MASK), S3C_PHYPWR); - mdelay(1); - - /* reset OTG PHY and Link */ - writel(S3C_RSTCON_PHY | S3C_RSTCON_HCLK | S3C_RSTCON_PHYCLK, - S3C_RSTCON); - udelay(20); /* at-least 10uS */ - writel(0, S3C_RSTCON); - - return 0; -} - -static int s5pv210_usb_otgphy_exit(struct platform_device *pdev) -{ - writel((readl(S3C_PHYPWR) | S3C_PHYPWR_ANALOG_POWERDOWN | - S3C_PHYPWR_OTG_DISABLE), S3C_PHYPWR); - - writel(readl(S5PV210_USB_PHY_CON) & ~S5PV210_USB_PHY0_EN, - S5PV210_USB_PHY_CON); - - return 0; -} - -int s5p_usb_phy_init(struct platform_device *pdev, int type) -{ - if (type == S5P_USB_PHY_DEVICE) - return s5pv210_usb_otgphy_init(pdev); - - return -EINVAL; -} - -int s5p_usb_phy_exit(struct platform_device *pdev, int type) -{ - if (type == S5P_USB_PHY_DEVICE) - return s5pv210_usb_otgphy_exit(pdev); - - return -EINVAL; -} |