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authorKevin2014-11-15 09:58:27 +0800
committerKevin2014-11-15 09:58:27 +0800
commit392e8802486cb573b916e746010e141a75f507e6 (patch)
tree50029aca02c81f087b90336e670b44e510782330 /ANDROID_3.4.5/arch/arm/mach-ixp23xx/include/mach/entry-macro.S
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init android origin source code
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-ixp23xx/include/mach/entry-macro.S')
-rw-r--r--ANDROID_3.4.5/arch/arm/mach-ixp23xx/include/mach/entry-macro.S31
1 files changed, 31 insertions, 0 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/ANDROID_3.4.5/arch/arm/mach-ixp23xx/include/mach/entry-macro.S
new file mode 100644
index 00000000..3fd2cb98
--- /dev/null
+++ b/ANDROID_3.4.5/arch/arm/mach-ixp23xx/include/mach/entry-macro.S
@@ -0,0 +1,31 @@
+/*
+ * arch/arm/mach-ixp23xx/include/mach/entry-macro.S
+ */
+
+ .macro get_irqnr_preamble, base, tmp
+ .endm
+
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
+ ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
+ ldr \irqnr, [\irqnr] @ get interrupt number
+ cmp \irqnr, #0x0 @ spurious interrupt ?
+ movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits
+ subne \irqnr, \irqnr, #1 @ convert to 0 based
+
+#if 0
+ cmp \irqnr, #IRQ_IXP23XX_PCI_INT_RPH
+ bne 1001f
+ mov \irqnr, #IRQ_IXP23XX_INTA
+
+ ldr \irqnr, =0xf5000030
+
+ mov \tmp, #(1<<26)
+ tst \irqnr, \tmp
+ movne \irqnr, #IRQ_IXP23XX_INTB
+
+ mov \tmp, #(1<<27)
+ tst \irqnr, \tmp
+ movne \irqnr, #IRQ_IXP23XX_INTA
+1001:
+#endif
+ .endm