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author | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
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committer | Srikant Patnaik | 2015-01-11 12:28:04 +0530 |
commit | 871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch) | |
tree | 8718f573808810c2a1e8cb8fb6ac469093ca2784 /ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach | |
parent | 9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff) | |
download | FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.tar.gz FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.tar.bz2 FOSSEE-netbook-kernel-source-871480933a1c28f8a9fed4c4d34d06c439a7a422.zip |
Moved, renamed, and deleted files
The original directory structure was scattered and unorganized.
Changes are basically to make it look like kernel structure.
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach')
15 files changed, 0 insertions, 325 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/adma.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/adma.h deleted file mode 100644 index 5ed92037..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/adma.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef IOP32X_ADMA_H -#define IOP32X_ADMA_H -#include <asm/hardware/iop3xx-adma.h> -#endif - diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/debug-macro.S b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/debug-macro.S deleted file mode 100644 index 363bdf90..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/debug-macro.S +++ /dev/null @@ -1,21 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - .macro addruart, rp, rv, tmp - mov \rp, #0xfe000000 @ physical as well as virtual - orr \rp, \rp, #0x00800000 @ location of the UART - mov \rv, \rp - .endm - -#define UART_SHIFT 0 -#include <asm/hardware/debug-8250.S> diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/entry-macro.S b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/entry-macro.S deleted file mode 100644 index ea13ae02..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/entry-macro.S - * - * Low-level IRQ helper macros for IOP32x-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include <mach/iop32x.h> - - .macro get_irqnr_preamble, base, tmp - mrc p15, 0, \tmp, c15, c1, 0 - orr \tmp, \tmp, #(1 << 6) - mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access - mrc p15, 0, \tmp, c15, c1, 0 - mov \tmp, \tmp - sub pc, pc, #4 @ cp_wait - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC - cmp \irqstat, #0 - clzne \irqnr, \irqstat - rsbne \irqnr, \irqnr, #31 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - mrc p15, 0, \tmp1, c15, c1, 0 - ands \tmp2, \tmp1, #(1 << 6) - bicne \tmp1, \tmp1, #(1 << 6) - mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access - .endm diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/glantank.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/glantank.h deleted file mode 100644 index 958eb91c..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/glantank.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/glantank.h - * - * IO-Data GLAN Tank board registers - */ - -#ifndef __GLANTANK_H -#define __GLANTANK_H - -#define GLANTANK_UART 0xfe800000 /* UART */ - - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/gpio.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/gpio.h deleted file mode 100644 index 708f4ec9..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/gpio.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_ARCH_IOP32X_GPIO_H -#define __ASM_ARCH_IOP32X_GPIO_H - -#include <asm/hardware/iop3xx-gpio.h> - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/hardware.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/hardware.h deleted file mode 100644 index 48cb1b20..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/hardware.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/hardware.h - */ - -#ifndef __HARDWARE_H -#define __HARDWARE_H - -#include <asm/types.h> - -/* - * Note about PCI IO space mappings - * - * To make IO space accesses efficient, we store virtual addresses in - * the IO resources. - * - * The PCI IO space is located at virtual 0xfe000000 from physical - * 0x90000000. The PCI BARs must be programmed with physical addresses, - * but when we read them, we convert them to virtual addresses. See - * arch/arm/plat-iop/pci.c. - */ - -#ifndef __ASSEMBLY__ -void iop32x_init_irq(void); -#endif - - -/* - * Generic chipset bits - */ -#include "iop32x.h" - -/* - * Board specific bits - */ -#include "glantank.h" -#include "iq80321.h" -#include "iq31244.h" -#include "n2100.h" - - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/io.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/io.h deleted file mode 100644 index e2ada265..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/io.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/io.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IO_H -#define __IO_H - -#include <asm/hardware/iop3xx.h> - -#define IO_SPACE_LIMIT 0xffffffff -#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h deleted file mode 100644 index 941f363a..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/iop32x.h - * - * Intel IOP32X Chip definitions - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright (C) 2002 Rory Bolt - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IOP32X_H -#define __IOP32X_H - -/* - * Peripherals that are shared between the iop32x and iop33x but - * located at different addresses. - */ -#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) -#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) - -#include <asm/hardware/iop3xx.h> - -/* ATU Parameters - * set up a 1:1 bus to physical ram relationship - * w/ physical ram on top of pci in the memory map - */ -#define IOP32X_MAX_RAM_SIZE 0x40000000UL -#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE -#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000 - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iq31244.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iq31244.h deleted file mode 100644 index 6b6b369e..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iq31244.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/iq31244.h - * - * Intel IQ31244 evaluation board registers - */ - -#ifndef __IQ31244_H -#define __IQ31244_H - -#define IQ31244_UART 0xfe800000 /* UART #1 */ -#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */ -#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ -#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ -#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */ - - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iq80321.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iq80321.h deleted file mode 100644 index 498819b7..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iq80321.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/iq80321.h - * - * Intel IQ80321 evaluation board registers - */ - -#ifndef __IQ80321_H -#define __IQ80321_H - -#define IQ80321_UART 0xfe800000 /* UART #1 */ -#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ -#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ -#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ -#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ - - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/irqs.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/irqs.h deleted file mode 100644 index 33573e09..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/irqs.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/irqs.h - * - * Author: Rory Bolt <rorybolt@pacbell.net> - * Copyright: (C) 2002 Rory Bolt - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IRQS_H -#define __IRQS_H - -/* - * IOP80321 chipset interrupts - */ -#define IRQ_IOP32X_DMA0_EOT 0 -#define IRQ_IOP32X_DMA0_EOC 1 -#define IRQ_IOP32X_DMA1_EOT 2 -#define IRQ_IOP32X_DMA1_EOC 3 -#define IRQ_IOP32X_AA_EOT 6 -#define IRQ_IOP32X_AA_EOC 7 -#define IRQ_IOP32X_CORE_PMON 8 -#define IRQ_IOP32X_TIMER0 9 -#define IRQ_IOP32X_TIMER1 10 -#define IRQ_IOP32X_I2C_0 11 -#define IRQ_IOP32X_I2C_1 12 -#define IRQ_IOP32X_MESSAGING 13 -#define IRQ_IOP32X_ATU_BIST 14 -#define IRQ_IOP32X_PERFMON 15 -#define IRQ_IOP32X_CORE_PMU 16 -#define IRQ_IOP32X_BIU_ERR 17 -#define IRQ_IOP32X_ATU_ERR 18 -#define IRQ_IOP32X_MCU_ERR 19 -#define IRQ_IOP32X_DMA0_ERR 20 -#define IRQ_IOP32X_DMA1_ERR 21 -#define IRQ_IOP32X_AA_ERR 23 -#define IRQ_IOP32X_MSG_ERR 24 -#define IRQ_IOP32X_SSP 25 -#define IRQ_IOP32X_XINT0 27 -#define IRQ_IOP32X_XINT1 28 -#define IRQ_IOP32X_XINT2 29 -#define IRQ_IOP32X_XINT3 30 -#define IRQ_IOP32X_HPI 31 - -#define NR_IRQS 32 - - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/n2100.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/n2100.h deleted file mode 100644 index 40b8a532..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/n2100.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/n2100.h - * - * Thecus N2100 board registers - */ - -#ifndef __N2100_H -#define __N2100_H - -#define N2100_UART 0xfe800000 /* UART */ - -#define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0) -#define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2) -#define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3) -#define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4) -#define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5) - - -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/time.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/time.h deleted file mode 100644 index 0f28c994..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/time.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _IOP32X_TIME_H_ -#define _IOP32X_TIME_H_ -#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0 -#endif diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/timex.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/timex.h deleted file mode 100644 index 7262ab81..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/timex.h +++ /dev/null @@ -1,6 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/timex.h - * - * IOP32x architecture timex specifications - */ -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/uncompress.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/uncompress.h deleted file mode 100644 index 4fd71549..00000000 --- a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/uncompress.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * arch/arm/mach-iop32x/include/mach/uncompress.h - */ - -#include <asm/types.h> -#include <asm/mach-types.h> -#include <linux/serial_reg.h> -#include <mach/hardware.h> - -volatile u8 *uart_base; - -#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) - -static inline void putc(char c) -{ - while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) - barrier(); - uart_base[UART_TX] = c; -} - -static inline void flush(void) -{ -} - -static __inline__ void __arch_decomp_setup(unsigned long arch_id) -{ - if (machine_is_iq80321()) - uart_base = (volatile u8 *)IQ80321_UART; - else if (machine_is_iq31244() || machine_is_em7210()) - uart_base = (volatile u8 *)IQ31244_UART; - else - uart_base = (volatile u8 *)0xfe800000; -} - -/* - * nothing to do - */ -#define arch_decomp_setup() __arch_decomp_setup(arch_id) -#define arch_decomp_wdog() |