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author | Kevin | 2014-11-15 09:58:27 +0800 |
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committer | Kevin | 2014-11-15 09:58:27 +0800 |
commit | 392e8802486cb573b916e746010e141a75f507e6 (patch) | |
tree | 50029aca02c81f087b90336e670b44e510782330 /ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h | |
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init android origin source code
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h')
-rw-r--r-- | ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h new file mode 100644 index 00000000..941f363a --- /dev/null +++ b/ANDROID_3.4.5/arch/arm/mach-iop32x/include/mach/iop32x.h @@ -0,0 +1,35 @@ +/* + * arch/arm/mach-iop32x/include/mach/iop32x.h + * + * Intel IOP32X Chip definitions + * + * Author: Rory Bolt <rorybolt@pacbell.net> + * Copyright (C) 2002 Rory Bolt + * Copyright (C) 2004 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __IOP32X_H +#define __IOP32X_H + +/* + * Peripherals that are shared between the iop32x and iop33x but + * located at different addresses. + */ +#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) +#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) + +#include <asm/hardware/iop3xx.h> + +/* ATU Parameters + * set up a 1:1 bus to physical ram relationship + * w/ physical ram on top of pci in the memory map + */ +#define IOP32X_MAX_RAM_SIZE 0x40000000UL +#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE +#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000 + +#endif |