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authorSrikant Patnaik2015-01-11 12:28:04 +0530
committerSrikant Patnaik2015-01-11 12:28:04 +0530
commit871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch)
tree8718f573808810c2a1e8cb8fb6ac469093ca2784 /ANDROID_3.4.5/arch/arm/mach-ep93xx/include/mach/hardware.h
parent9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff)
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Moved, renamed, and deleted files
The original directory structure was scattered and unorganized. Changes are basically to make it look like kernel structure.
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-ep93xx/include/mach/hardware.h')
-rw-r--r--ANDROID_3.4.5/arch/arm/mach-ep93xx/include/mach/hardware.h24
1 files changed, 0 insertions, 24 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-ep93xx/include/mach/hardware.h b/ANDROID_3.4.5/arch/arm/mach-ep93xx/include/mach/hardware.h
deleted file mode 100644
index efcd4781..00000000
--- a/ANDROID_3.4.5/arch/arm/mach-ep93xx/include/mach/hardware.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/*
- * arch/arm/mach-ep93xx/include/mach/hardware.h
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-#include <mach/platform.h>
-
-/*
- * The EP93xx has two external crystal oscillators. To generate the
- * required high-frequency clocks, the processor uses two phase-locked-
- * loops (PLLs) to multiply the incoming external clock signal to much
- * higher frequencies that are then divided down by programmable dividers
- * to produce the needed clocks. The PLLs operate independently of one
- * another.
- */
-#define EP93XX_EXT_CLK_RATE 14745600
-#define EP93XX_EXT_RTC_RATE 32768
-
-#define EP93XX_KEYTCHCLK_DIV4 (EP93XX_EXT_CLK_RATE / 4)
-#define EP93XX_KEYTCHCLK_DIV16 (EP93XX_EXT_CLK_RATE / 16)
-
-#endif