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authorSrikant Patnaik2015-01-11 12:28:04 +0530
committerSrikant Patnaik2015-01-11 12:28:04 +0530
commit871480933a1c28f8a9fed4c4d34d06c439a7a422 (patch)
tree8718f573808810c2a1e8cb8fb6ac469093ca2784 /ANDROID_3.4.5/arch/arm/mach-davinci/mux.c
parent9d40ac5867b9aefe0722bc1f110b965ff294d30d (diff)
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Moved, renamed, and deleted files
The original directory structure was scattered and unorganized. Changes are basically to make it look like kernel structure.
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/mach-davinci/mux.c')
-rw-r--r--ANDROID_3.4.5/arch/arm/mach-davinci/mux.c113
1 files changed, 0 insertions, 113 deletions
diff --git a/ANDROID_3.4.5/arch/arm/mach-davinci/mux.c b/ANDROID_3.4.5/arch/arm/mach-davinci/mux.c
deleted file mode 100644
index f34a8dcd..00000000
--- a/ANDROID_3.4.5/arch/arm/mach-davinci/mux.c
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * Utility to set the DAVINCI MUX register from a table in mux.h
- *
- * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
- *
- * Based on linux/arch/arm/plat-omap/mux.c:
- * Copyright (C) 2003 - 2005 Nokia Corporation
- *
- * Written by Tony Lindgren
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- *
- * Copyright (C) 2008 Texas Instruments.
- */
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-
-#include <mach/mux.h>
-#include <mach/common.h>
-
-static void __iomem *pinmux_base;
-
-/*
- * Sets the DAVINCI MUX register based on the table
- */
-int __init_or_module davinci_cfg_reg(const unsigned long index)
-{
- static DEFINE_SPINLOCK(mux_spin_lock);
- struct davinci_soc_info *soc_info = &davinci_soc_info;
- unsigned long flags;
- const struct mux_config *cfg;
- unsigned int reg_orig = 0, reg = 0;
- unsigned int mask, warn = 0;
-
- if (WARN_ON(!soc_info->pinmux_pins))
- return -ENODEV;
-
- if (!pinmux_base) {
- pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K);
- if (WARN_ON(!pinmux_base))
- return -ENOMEM;
- }
-
- if (index >= soc_info->pinmux_pins_num) {
- printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
- index, soc_info->pinmux_pins_num);
- dump_stack();
- return -ENODEV;
- }
-
- cfg = &soc_info->pinmux_pins[index];
-
- if (cfg->name == NULL) {
- printk(KERN_ERR "No entry for the specified index\n");
- return -ENODEV;
- }
-
- /* Update the mux register in question */
- if (cfg->mask) {
- unsigned tmp1, tmp2;
-
- spin_lock_irqsave(&mux_spin_lock, flags);
- reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
-
- mask = (cfg->mask << cfg->mask_offset);
- tmp1 = reg_orig & mask;
- reg = reg_orig & ~mask;
-
- tmp2 = (cfg->mode << cfg->mask_offset);
- reg |= tmp2;
-
- if (tmp1 != tmp2)
- warn = 1;
-
- __raw_writel(reg, pinmux_base + cfg->mux_reg);
- spin_unlock_irqrestore(&mux_spin_lock, flags);
- }
-
- if (warn) {
-#ifdef CONFIG_DAVINCI_MUX_WARNINGS
- printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
-#endif
- }
-
-#ifdef CONFIG_DAVINCI_MUX_DEBUG
- if (cfg->debug || warn) {
- printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
- printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n",
- cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
- }
-#endif
-
- return 0;
-}
-EXPORT_SYMBOL(davinci_cfg_reg);
-
-int __init_or_module davinci_cfg_reg_list(const short pins[])
-{
- int i, error = -EINVAL;
-
- if (pins)
- for (i = 0; pins[i] >= 0; i++) {
- error = davinci_cfg_reg(pins[i]);
- if (error)
- break;
- }
-
- return error;
-}