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author | Kevin | 2014-11-15 09:58:27 +0800 |
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committer | Kevin | 2014-11-15 09:58:27 +0800 |
commit | 392e8802486cb573b916e746010e141a75f507e6 (patch) | |
tree | 50029aca02c81f087b90336e670b44e510782330 /ANDROID_3.4.5/arch/arm/Kconfig-nommu | |
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init android origin source code
Diffstat (limited to 'ANDROID_3.4.5/arch/arm/Kconfig-nommu')
-rw-r--r-- | ANDROID_3.4.5/arch/arm/Kconfig-nommu | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/ANDROID_3.4.5/arch/arm/Kconfig-nommu b/ANDROID_3.4.5/arch/arm/Kconfig-nommu new file mode 100644 index 00000000..2cef8e13 --- /dev/null +++ b/ANDROID_3.4.5/arch/arm/Kconfig-nommu @@ -0,0 +1,52 @@ +# +# Kconfig for uClinux(non-paged MM) depend configurations +# Hyok S. Choi <hyok.choi@samsung.com> +# + +config SET_MEM_PARAM + bool "Set flash/sdram size and base addr" + help + Say Y to manually set the base addresses and sizes. + otherwise, the default values are assigned. + +config DRAM_BASE + hex '(S)DRAM Base Address' if SET_MEM_PARAM + default 0x00800000 + +config DRAM_SIZE + hex '(S)DRAM SIZE' if SET_MEM_PARAM + default 0x00800000 + +config FLASH_MEM_BASE + hex 'FLASH Base Address' if SET_MEM_PARAM + default 0x00400000 + +config FLASH_SIZE + hex 'FLASH Size' if SET_MEM_PARAM + default 0x00400000 + +config PROCESSOR_ID + hex 'Hard wire the processor ID' + default 0x00007700 + depends on !CPU_CP15 + help + If processor has no CP15 register, this processor ID is + used instead of the auto-probing which utilizes the register. + +config REMAP_VECTORS_TO_RAM + bool 'Install vectors to the beginning of RAM' if DRAM_BASE + depends on DRAM_BASE + help + The kernel needs to change the hardware exception vectors. + In nommu mode, the hardware exception vectors are normally + placed at address 0x00000000. However, this region may be + occupied by read-only memory depending on H/W design. + + If the region contains read-write memory, say 'n' here. + + If your CPU provides a remap facility which allows the exception + vectors to be mapped to writable memory, say 'n' here. + + Otherwise, say 'y' here. In this case, the kernel will require + external support to redirect the hardware exception vectors to + the writable versions located at DRAM_BASE. |