CD4093B

10 files changed, 2404 insertions, 0 deletions

diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B-cache.lib b/library/SubcircuitLibrary/CD4093B/CD4093B-cache.lib
new file mode 100644
index 00000000..b98d3b21
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B-cache.lib
@@ -0,0 +1,73 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B.cir b/library/SubcircuitLibrary/CD4093B/CD4093B.cir
new file mode 100644
index 00000000..d34285c4
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B.cir
@@ -0,0 +1,90 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD4093B\CD4093B.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 4/26/2025 7:27:35 PM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M2  Net-_M1-Pad3_ A GND GND mosfet_n		
+M1  Net-_M1-Pad1_ A Net-_M1-Pad3_ Net-_M1-Pad3_ mosfet_n		
+M6  Net-_M1-Pad1_ A Net-_M17-Pad3_ Net-_M17-Pad3_ mosfet_p		
+M5  Net-_M17-Pad3_ A vdd vdd mosfet_p		
+M17  GND Net-_M1-Pad1_ Net-_M17-Pad3_ Net-_M17-Pad3_ mosfet_p		
+M21  vdd Net-_M1-Pad1_ Net-_M1-Pad3_ Net-_M1-Pad3_ mosfet_n		
+M4  Net-_M22-Pad3_ B GND GND mosfet_n		
+M3  Net-_M18-Pad2_ B Net-_M22-Pad3_ Net-_M22-Pad3_ mosfet_n		
+M8  Net-_M18-Pad2_ B Net-_M18-Pad3_ Net-_M18-Pad3_ mosfet_p		
+M7  Net-_M18-Pad3_ B vdd vdd mosfet_p		
+M18  GND Net-_M18-Pad2_ Net-_M18-Pad3_ Net-_M18-Pad3_ mosfet_p		
+M22  vdd Net-_M18-Pad2_ Net-_M22-Pad3_ Net-_M22-Pad3_ mosfet_n		
+M27  Net-_M25-Pad1_ Net-_M1-Pad1_ vdd vdd mosfet_p		
+M25  Net-_M25-Pad1_ Net-_M1-Pad1_ GND GND mosfet_n		
+M28  Net-_M26-Pad1_ Net-_M18-Pad2_ vdd vdd mosfet_p		
+M26  Net-_M26-Pad1_ Net-_M18-Pad2_ GND GND mosfet_n		
+M35  j Net-_M25-Pad1_ Net-_M35-Pad3_ Net-_M35-Pad3_ mosfet_n		
+M37  Net-_M35-Pad3_ Net-_M26-Pad1_ GND GND mosfet_n		
+M33  j Net-_M25-Pad1_ vdd vdd mosfet_p		
+M39  j Net-_M26-Pad1_ vdd vdd mosfet_p		
+M10  Net-_M10-Pad1_ c GND GND mosfet_n		
+M9  Net-_M14-Pad1_ c Net-_M10-Pad1_ Net-_M10-Pad1_ mosfet_n		
+M14  Net-_M14-Pad1_ c Net-_M13-Pad1_ Net-_M13-Pad1_ mosfet_p		
+M13  Net-_M13-Pad1_ c vdd vdd mosfet_p		
+M19  GND Net-_M14-Pad1_ Net-_M13-Pad1_ Net-_M13-Pad1_ mosfet_p		
+M23  vdd Net-_M14-Pad1_ Net-_M10-Pad1_ Net-_M10-Pad1_ mosfet_n		
+M12  Net-_M11-Pad3_ d GND GND mosfet_n		
+M11  Net-_M11-Pad1_ d Net-_M11-Pad3_ Net-_M11-Pad3_ mosfet_n		
+M16  Net-_M11-Pad1_ d Net-_M15-Pad1_ Net-_M15-Pad1_ mosfet_p		
+M15  Net-_M15-Pad1_ d vdd vdd mosfet_p		
+M20  GND Net-_M11-Pad1_ Net-_M15-Pad1_ Net-_M15-Pad1_ mosfet_p		
+M24  vdd Net-_M11-Pad1_ Net-_M11-Pad3_ Net-_M11-Pad3_ mosfet_n		
+M31  Net-_M29-Pad1_ Net-_M14-Pad1_ vdd vdd mosfet_p		
+M29  Net-_M29-Pad1_ Net-_M14-Pad1_ GND GND mosfet_n		
+M32  Net-_M30-Pad1_ Net-_M11-Pad1_ vdd vdd mosfet_p		
+M30  Net-_M30-Pad1_ Net-_M11-Pad1_ GND GND mosfet_n		
+M36  k Net-_M29-Pad1_ Net-_M36-Pad3_ Net-_M36-Pad3_ mosfet_n		
+M38  Net-_M36-Pad3_ Net-_M30-Pad1_ GND GND mosfet_n		
+M34  k Net-_M29-Pad1_ vdd vdd mosfet_p		
+M40  k Net-_M30-Pad1_ vdd vdd mosfet_p		
+M42  Net-_M41-Pad3_ e GND GND mosfet_n		
+M41  Net-_M41-Pad1_ e Net-_M41-Pad3_ Net-_M41-Pad3_ mosfet_n		
+M46  Net-_M41-Pad1_ e Net-_M45-Pad1_ Net-_M45-Pad1_ mosfet_p		
+M45  Net-_M45-Pad1_ e vdd vdd mosfet_p		
+M49  GND Net-_M41-Pad1_ Net-_M45-Pad1_ Net-_M45-Pad1_ mosfet_p		
+M51  vdd Net-_M41-Pad1_ Net-_M41-Pad3_ Net-_M41-Pad3_ mosfet_n		
+M44  Net-_M43-Pad3_ f GND GND mosfet_n		
+M43  Net-_M43-Pad1_ f Net-_M43-Pad3_ Net-_M43-Pad3_ mosfet_n		
+M48  Net-_M43-Pad1_ f Net-_M47-Pad1_ Net-_M47-Pad1_ mosfet_p		
+M47  Net-_M47-Pad1_ f vdd vdd mosfet_p		
+M50  GND Net-_M43-Pad1_ Net-_M47-Pad1_ Net-_M47-Pad1_ mosfet_p		
+M52  vdd Net-_M43-Pad1_ Net-_M43-Pad3_ Net-_M43-Pad3_ mosfet_n		
+M55  Net-_M53-Pad1_ Net-_M41-Pad1_ vdd vdd mosfet_p		
+M53  Net-_M53-Pad1_ Net-_M41-Pad1_ GND GND mosfet_n		
+M56  Net-_M54-Pad1_ Net-_M43-Pad1_ vdd vdd mosfet_p		
+M54  Net-_M54-Pad1_ Net-_M43-Pad1_ GND GND mosfet_n		
+M58  l Net-_M53-Pad1_ Net-_M58-Pad3_ Net-_M58-Pad3_ mosfet_n		
+M59  Net-_M58-Pad3_ Net-_M54-Pad1_ GND GND mosfet_n		
+M57  l Net-_M53-Pad1_ vdd vdd mosfet_p		
+M60  l Net-_M54-Pad1_ vdd vdd mosfet_p		
+M62  Net-_M61-Pad3_ g GND GND mosfet_n		
+M61  Net-_M61-Pad1_ g Net-_M61-Pad3_ Net-_M61-Pad3_ mosfet_n		
+M66  Net-_M61-Pad1_ g Net-_M65-Pad1_ Net-_M65-Pad1_ mosfet_p		
+M65  Net-_M65-Pad1_ g vdd vdd mosfet_p		
+M69  GND Net-_M61-Pad1_ Net-_M65-Pad1_ Net-_M65-Pad1_ mosfet_p		
+M71  vdd Net-_M61-Pad1_ Net-_M61-Pad3_ Net-_M61-Pad3_ mosfet_n		
+M64  Net-_M63-Pad3_ h GND GND mosfet_n		
+M63  Net-_M63-Pad1_ h Net-_M63-Pad3_ Net-_M63-Pad3_ mosfet_n		
+M68  Net-_M63-Pad1_ h Net-_M67-Pad1_ Net-_M67-Pad1_ mosfet_p		
+M67  Net-_M67-Pad1_ h vdd vdd mosfet_p		
+M70  GND Net-_M63-Pad1_ Net-_M67-Pad1_ Net-_M67-Pad1_ mosfet_p		
+M72  vdd Net-_M63-Pad1_ Net-_M63-Pad3_ Net-_M63-Pad3_ mosfet_n		
+M75  Net-_M73-Pad1_ Net-_M61-Pad1_ vdd vdd mosfet_p		
+M73  Net-_M73-Pad1_ Net-_M61-Pad1_ GND GND mosfet_n		
+M76  Net-_M74-Pad1_ Net-_M63-Pad1_ vdd vdd mosfet_p		
+M74  Net-_M74-Pad1_ Net-_M63-Pad1_ GND GND mosfet_n		
+M78  m Net-_M73-Pad1_ Net-_M78-Pad3_ Net-_M78-Pad3_ mosfet_n		
+M79  Net-_M78-Pad3_ Net-_M74-Pad1_ GND GND mosfet_n		
+M77  m Net-_M73-Pad1_ vdd vdd mosfet_p		
+M80  m Net-_M74-Pad1_ vdd vdd mosfet_p		
+
+.end
diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B.cir.out b/library/SubcircuitLibrary/CD4093B/CD4093B.cir.out
new file mode 100644
index 00000000..a703a931
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B.cir.out
@@ -0,0 +1,93 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd4093b\cd4093b.cir
+
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m2 net-_m1-pad3_ a gnd gnd CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ a net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m1-pad1_ a net-_m17-pad3_ net-_m17-pad3_ CMOSP W=100u L=100u M=1
+m5 net-_m17-pad3_ a vdd vdd CMOSP W=100u L=100u M=1
+m17 gnd net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSP W=100u L=100u M=1
+m21 vdd net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m4 net-_m22-pad3_ b gnd gnd CMOSN W=100u L=100u M=1
+m3 net-_m18-pad2_ b net-_m22-pad3_ net-_m22-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m18-pad2_ b net-_m18-pad3_ net-_m18-pad3_ CMOSP W=100u L=100u M=1
+m7 net-_m18-pad3_ b vdd vdd CMOSP W=100u L=100u M=1
+m18 gnd net-_m18-pad2_ net-_m18-pad3_ net-_m18-pad3_ CMOSP W=100u L=100u M=1
+m22 vdd net-_m18-pad2_ net-_m22-pad3_ net-_m22-pad3_ CMOSN W=100u L=100u M=1
+m27 net-_m25-pad1_ net-_m1-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m25 net-_m25-pad1_ net-_m1-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m28 net-_m26-pad1_ net-_m18-pad2_ vdd vdd CMOSP W=100u L=100u M=1
+m26 net-_m26-pad1_ net-_m18-pad2_ gnd gnd CMOSN W=100u L=100u M=1
+m35 j net-_m25-pad1_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1
+m37 net-_m35-pad3_ net-_m26-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m33 j net-_m25-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m39 j net-_m26-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ c gnd gnd CMOSN W=100u L=100u M=1
+m9 net-_m14-pad1_ c net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m14 net-_m14-pad1_ c net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ c vdd vdd CMOSP W=100u L=100u M=1
+m19 gnd net-_m14-pad1_ net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m23 vdd net-_m14-pad1_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m12 net-_m11-pad3_ d gnd gnd CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ d net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m11-pad1_ d net-_m15-pad1_ net-_m15-pad1_ CMOSP W=100u L=100u M=1
+m15 net-_m15-pad1_ d vdd vdd CMOSP W=100u L=100u M=1
+m20 gnd net-_m11-pad1_ net-_m15-pad1_ net-_m15-pad1_ CMOSP W=100u L=100u M=1
+m24 vdd net-_m11-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m31 net-_m29-pad1_ net-_m14-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m29 net-_m29-pad1_ net-_m14-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m32 net-_m30-pad1_ net-_m11-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m30 net-_m30-pad1_ net-_m11-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m36 k net-_m29-pad1_ net-_m36-pad3_ net-_m36-pad3_ CMOSN W=100u L=100u M=1
+m38 net-_m36-pad3_ net-_m30-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m34 k net-_m29-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m40 k net-_m30-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m42 net-_m41-pad3_ e gnd gnd CMOSN W=100u L=100u M=1
+m41 net-_m41-pad1_ e net-_m41-pad3_ net-_m41-pad3_ CMOSN W=100u L=100u M=1
+m46 net-_m41-pad1_ e net-_m45-pad1_ net-_m45-pad1_ CMOSP W=100u L=100u M=1
+m45 net-_m45-pad1_ e vdd vdd CMOSP W=100u L=100u M=1
+m49 gnd net-_m41-pad1_ net-_m45-pad1_ net-_m45-pad1_ CMOSP W=100u L=100u M=1
+m51 vdd net-_m41-pad1_ net-_m41-pad3_ net-_m41-pad3_ CMOSN W=100u L=100u M=1
+m44 net-_m43-pad3_ f gnd gnd CMOSN W=100u L=100u M=1
+m43 net-_m43-pad1_ f net-_m43-pad3_ net-_m43-pad3_ CMOSN W=100u L=100u M=1
+m48 net-_m43-pad1_ f net-_m47-pad1_ net-_m47-pad1_ CMOSP W=100u L=100u M=1
+m47 net-_m47-pad1_ f vdd vdd CMOSP W=100u L=100u M=1
+m50 gnd net-_m43-pad1_ net-_m47-pad1_ net-_m47-pad1_ CMOSP W=100u L=100u M=1
+m52 vdd net-_m43-pad1_ net-_m43-pad3_ net-_m43-pad3_ CMOSN W=100u L=100u M=1
+m55 net-_m53-pad1_ net-_m41-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m53 net-_m53-pad1_ net-_m41-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m56 net-_m54-pad1_ net-_m43-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m54 net-_m54-pad1_ net-_m43-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m58 l net-_m53-pad1_ net-_m58-pad3_ net-_m58-pad3_ CMOSN W=100u L=100u M=1
+m59 net-_m58-pad3_ net-_m54-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m57 l net-_m53-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m60 l net-_m54-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m62 net-_m61-pad3_ g gnd gnd CMOSN W=100u L=100u M=1
+m61 net-_m61-pad1_ g net-_m61-pad3_ net-_m61-pad3_ CMOSN W=100u L=100u M=1
+m66 net-_m61-pad1_ g net-_m65-pad1_ net-_m65-pad1_ CMOSP W=100u L=100u M=1
+m65 net-_m65-pad1_ g vdd vdd CMOSP W=100u L=100u M=1
+m69 gnd net-_m61-pad1_ net-_m65-pad1_ net-_m65-pad1_ CMOSP W=100u L=100u M=1
+m71 vdd net-_m61-pad1_ net-_m61-pad3_ net-_m61-pad3_ CMOSN W=100u L=100u M=1
+m64 net-_m63-pad3_ h gnd gnd CMOSN W=100u L=100u M=1
+m63 net-_m63-pad1_ h net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1
+m68 net-_m63-pad1_ h net-_m67-pad1_ net-_m67-pad1_ CMOSP W=100u L=100u M=1
+m67 net-_m67-pad1_ h vdd vdd CMOSP W=100u L=100u M=1
+m70 gnd net-_m63-pad1_ net-_m67-pad1_ net-_m67-pad1_ CMOSP W=100u L=100u M=1
+m72 vdd net-_m63-pad1_ net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1
+m75 net-_m73-pad1_ net-_m61-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m73 net-_m73-pad1_ net-_m61-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m76 net-_m74-pad1_ net-_m63-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m74 net-_m74-pad1_ net-_m63-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m78 m net-_m73-pad1_ net-_m78-pad3_ net-_m78-pad3_ CMOSN W=100u L=100u M=1
+m79 net-_m78-pad3_ net-_m74-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m77 m net-_m73-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m80 m net-_m74-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B.pro b/library/SubcircuitLibrary/CD4093B/CD4093B.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
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diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B.sch b/library/SubcircuitLibrary/CD4093B/CD4093B.sch
new file mode 100644
index 00000000..850d9540
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B.sch
@@ -0,0 +1,1965 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
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+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:tst1-cache
+EELAYER 25 0
+EELAYER END
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+encoding utf-8
+Sheet 1 1
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+Date ""
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+F 3 "" H 2350 8850 60  0000 C CNN
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+F 2 "" H 2500 8700 50  0001 C CNN
+F 3 "" H 2500 8700 50  0001 C CNN
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+F 2 "" H 3600 6550 29  0000 C CNN
+F 3 "" H 3400 6450 60  0000 C CNN
+	1    3350 6450
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+F 2 "" H 4900 7600 29  0000 C CNN
+F 3 "" H 4700 7700 60  0000 C CNN
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+F 2 "" H 4800 8750 50  0001 C CNN
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+F 3 "" H 7250 2850 50  0001 C CNN
+	1    7250 2850
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+U 1 1 680CF17D
+P 7050 2450
+F 0 "M42" H 7050 2300 50  0000 R CNN
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+F 2 "" H 7350 2150 29  0000 C CNN
+F 3 "" H 7150 2250 60  0000 C CNN
+	1    7050 2450
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+F 2 "" H 7350 1700 29  0000 C CNN
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+F 0 "M46" H 7050 1750 50  0000 R CNN
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+F 2 "" H 7350 1800 29  0000 C CNN
+F 3 "" H 7150 1700 60  0000 C CNN
+	1    7100 1700
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+F 0 "M45" H 7050 1300 50  0000 R CNN
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+	1    7100 1250
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+L mosfet_p M49
+U 1 1 680CF19C
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+F 2 "" H 8200 1850 29  0000 C CNN
+F 3 "" H 8000 1750 60  0000 C CNN
+	1    7950 1750
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+F 2 "" H 8450 1800 29  0000 C CNN
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+	1    8150 2100
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+U 1 1 680CF1B0
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+F 2 "" H 8150 1600 50  0001 C CNN
+F 3 "" H 8150 1600 50  0001 C CNN
+	1    8150 1600
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+Text GLabel 8150 2300 2    60   Input ~ 0
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+L GND #PWR16
+U 1 1 680CF1B8
+P 7250 5100
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+F 2 "" H 7250 5100 50  0001 C CNN
+F 3 "" H 7250 5100 50  0001 C CNN
+	1    7250 5100
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+U 1 1 680CF1C9
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+F 0 "M44" H 7050 4550 50  0000 R CNN
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+F 2 "" H 7350 4400 29  0000 C CNN
+F 3 "" H 7150 4500 60  0000 C CNN
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+L mosfet_n M43
+U 1 1 680CF1CF
+P 7050 4250
+F 0 "M43" H 7050 4100 50  0000 R CNN
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+F 2 "" H 7350 3950 29  0000 C CNN
+F 3 "" H 7150 4050 60  0000 C CNN
+	1    7050 4250
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+U 1 1 680CF1D5
+P 7100 3950
+F 0 "M48" H 7050 4000 50  0000 R CNN
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+F 2 "" H 7350 4050 29  0000 C CNN
+F 3 "" H 7150 3950 60  0000 C CNN
+	1    7100 3950
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+L mosfet_p M47
+U 1 1 680CF1DB
+P 7100 3500
+F 0 "M47" H 7050 3550 50  0000 R CNN
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+F 2 "" H 7350 3600 29  0000 C CNN
+F 3 "" H 7150 3500 60  0000 C CNN
+	1    7100 3500
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+L mosfet_p M50
+U 1 1 680CF1E8
+P 7950 4000
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+F 2 "" H 8200 4100 29  0000 C CNN
+F 3 "" H 8000 4000 60  0000 C CNN
+	1    7950 4000
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+U 1 1 680CF1EE
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+F 0 "M52" H 8150 4200 50  0000 R CNN
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+F 2 "" H 8450 4050 29  0000 C CNN
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+L GND #PWR18
+U 1 1 680CF1FC
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+F 2 "" H 8150 3850 50  0001 C CNN
+F 3 "" H 8150 3850 50  0001 C CNN
+	1    8150 3850
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+Text GLabel 8150 4550 2    60   Input ~ 0
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+Wire Wire Line
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+L mosfet_p M55
+U 1 1 680CF205
+P 9000 1600
+F 0 "M55" H 8950 1650 50  0000 R CNN
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+F 2 "" H 9250 1700 29  0000 C CNN
+F 3 "" H 9050 1600 60  0000 C CNN
+	1    9000 1600
+	1    0    0    1   
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+L mosfet_n M53
+U 1 1 680CF20B
+P 8950 1900
+F 0 "M53" H 8950 1750 50  0000 R CNN
+F 1 "mosfet_n" H 9050 1850 50  0000 R CNN
+F 2 "" H 9250 1600 29  0000 C CNN
+F 3 "" H 9050 1700 60  0000 C CNN
+	1    8950 1900
+	1    0    0    -1  
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+Text GLabel 9150 1350 1    60   Input ~ 0
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+L GND #PWR19
+U 1 1 680CF212
+P 9150 2350
+F 0 "#PWR19" H 9150 2100 50  0001 C CNN
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+F 2 "" H 9150 2350 50  0001 C CNN
+F 3 "" H 9150 2350 50  0001 C CNN
+	1    9150 2350
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+P 9000 3850
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+F 2 "" H 9250 3950 29  0000 C CNN
+F 3 "" H 9050 3850 60  0000 C CNN
+	1    9000 3850
+	1    0    0    1   
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+L mosfet_n M54
+U 1 1 680CF227
+P 8950 4150
+F 0 "M54" H 8950 4000 50  0000 R CNN
+F 1 "mosfet_n" H 9050 4100 50  0000 R CNN
+F 2 "" H 9250 3850 29  0000 C CNN
+F 3 "" H 9050 3950 60  0000 C CNN
+	1    8950 4150
+	1    0    0    -1  
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+Text GLabel 9150 3600 1    60   Input ~ 0
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+L GND #PWR20
+U 1 1 680CF22E
+P 9150 4600
+F 0 "#PWR20" H 9150 4350 50  0001 C CNN
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+F 2 "" H 9150 4600 50  0001 C CNN
+F 3 "" H 9150 4600 50  0001 C CNN
+	1    9150 4600
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+F 2 "" H 10550 2750 29  0000 C CNN
+F 3 "" H 10350 2850 60  0000 C CNN
+	1    10250 3050
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+F 0 "M59" H 10650 3350 50  0000 R CNN
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+F 2 "" H 10950 3200 29  0000 C CNN
+F 3 "" H 10750 3300 60  0000 C CNN
+	1    10650 3500
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+L mosfet_p M57
+U 1 1 680CF249
+P 10000 2750
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+F 2 "" H 10250 2850 29  0000 C CNN
+F 3 "" H 10050 2750 60  0000 C CNN
+	1    10000 2750
+	1    0    0    1   
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+L mosfet_p M60
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+P 10850 2750
+F 0 "M60" H 10800 2800 50  0000 R CNN
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+F 2 "" H 11100 2850 29  0000 C CNN
+F 3 "" H 10900 2750 60  0000 C CNN
+	1    10850 2750
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+L GND #PWR21
+U 1 1 680CF26D
+P 10450 3900
+F 0 "#PWR21" H 10450 3650 50  0001 C CNN
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+F 2 "" H 10450 3900 50  0001 C CNN
+F 3 "" H 10450 3900 50  0001 C CNN
+	1    10450 3900
+	1    0    0    -1  
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+Text GLabel 10450 2950 1    60   Input ~ 0
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+L GND #PWR22
+U 1 1 680CF4B9
+P 12950 2850
+F 0 "#PWR22" H 12950 2600 50  0001 C CNN
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+F 2 "" H 12950 2850 50  0001 C CNN
+F 3 "" H 12950 2850 50  0001 C CNN
+	1    12950 2850
+	1    0    0    -1  
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+Wire Wire Line
+	13050 1500 13050 1550
+Wire Wire Line
+	12950 1500 13500 1500
+Wire Wire Line
+	12950 1450 12950 1500
+Wire Wire Line
+	13050 1050 13050 1100
+Wire Wire Line
+	12950 1050 13050 1050
+$Comp
+L mosfet_n M62
+U 1 1 680CF4CA
+P 12750 2450
+F 0 "M62" H 12750 2300 50  0000 R CNN
+F 1 "mosfet_n" H 12850 2400 50  0000 R CNN
+F 2 "" H 13050 2150 29  0000 C CNN
+F 3 "" H 12850 2250 60  0000 C CNN
+	1    12750 2450
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M61
+U 1 1 680CF4D0
+P 12750 2000
+F 0 "M61" H 12750 1850 50  0000 R CNN
+F 1 "mosfet_n" H 12850 1950 50  0000 R CNN
+F 2 "" H 13050 1700 29  0000 C CNN
+F 3 "" H 12850 1800 60  0000 C CNN
+	1    12750 2000
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M66
+U 1 1 680CF4D6
+P 12800 1700
+F 0 "M66" H 12750 1750 50  0000 R CNN
+F 1 "mosfet_p" H 12850 1850 50  0000 R CNN
+F 2 "" H 13050 1800 29  0000 C CNN
+F 3 "" H 12850 1700 60  0000 C CNN
+	1    12800 1700
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_p M65
+U 1 1 680CF4DC
+P 12800 1250
+F 0 "M65" H 12750 1300 50  0000 R CNN
+F 1 "mosfet_p" H 12850 1400 50  0000 R CNN
+F 2 "" H 13050 1350 29  0000 C CNN
+F 3 "" H 12850 1250 60  0000 C CNN
+	1    12800 1250
+	1    0    0    1   
+$EndComp
+Wire Wire Line
+	12950 1900 12950 2000
+Text GLabel 12350 1950 0    60   Input ~ 0
+g
+Wire Wire Line
+	12650 1250 12650 2650
+Connection ~ 12650 1700
+Connection ~ 12650 2200
+Wire Wire Line
+	12350 1950 12650 1950
+Connection ~ 12650 1950
+$Comp
+L mosfet_p M69
+U 1 1 680CF4E9
+P 13650 1750
+F 0 "M69" H 13600 1800 50  0000 R CNN
+F 1 "mosfet_p" H 13700 1900 50  0000 R CNN
+F 2 "" H 13900 1850 29  0000 C CNN
+F 3 "" H 13700 1750 60  0000 C CNN
+	1    13650 1750
+	0    1    -1   0   
+$EndComp
+$Comp
+L mosfet_n M71
+U 1 1 680CF4EF
+P 13850 2100
+F 0 "M71" H 13850 1950 50  0000 R CNN
+F 1 "mosfet_n" H 13950 2050 50  0000 R CNN
+F 2 "" H 14150 1800 29  0000 C CNN
+F 3 "" H 13950 1900 60  0000 C CNN
+	1    13850 2100
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	13650 1900 13650 2000
+Connection ~ 13650 1950
+Wire Wire Line
+	13450 2400 13450 2300
+Connection ~ 13050 2400
+Connection ~ 13450 2400
+Connection ~ 13050 1500
+Wire Wire Line
+	13450 1600 13450 1500
+Connection ~ 13450 1500
+$Comp
+L GND #PWR24
+U 1 1 680CF4FD
+P 13850 1600
+F 0 "#PWR24" H 13850 1350 50  0001 C CNN
+F 1 "GND" H 13850 1450 50  0000 C CNN
+F 2 "" H 13850 1600 50  0001 C CNN
+F 3 "" H 13850 1600 50  0001 C CNN
+	1    13850 1600
+	1    0    0    -1  
+$EndComp
+Text GLabel 13850 2300 2    60   Input ~ 0
+vdd
+Text GLabel 12950 3300 1    60   Input ~ 0
+vdd
+$Comp
+L GND #PWR23
+U 1 1 680CF505
+P 12950 5100
+F 0 "#PWR23" H 12950 4850 50  0001 C CNN
+F 1 "GND" H 12950 4950 50  0000 C CNN
+F 2 "" H 12950 5100 50  0001 C CNN
+F 3 "" H 12950 5100 50  0001 C CNN
+	1    12950 5100
+	1    0    0    -1  
+$EndComp
+Connection ~ 12950 4200
+Wire Wire Line
+	13050 5100 13050 5050
+Wire Wire Line
+	12950 5100 13050 5100
+Wire Wire Line
+	12950 4650 12950 4700
+Wire Wire Line
+	13050 4650 13050 4600
+Wire Wire Line
+	12950 4650 13500 4650
+Wire Wire Line
+	13050 3750 13050 3800
+Wire Wire Line
+	12950 3750 13500 3750
+Wire Wire Line
+	12950 3700 12950 3750
+Wire Wire Line
+	13050 3300 13050 3350
+Wire Wire Line
+	12950 3300 13050 3300
+$Comp
+L mosfet_n M64
+U 1 1 680CF516
+P 12750 4700
+F 0 "M64" H 12750 4550 50  0000 R CNN
+F 1 "mosfet_n" H 12850 4650 50  0000 R CNN
+F 2 "" H 13050 4400 29  0000 C CNN
+F 3 "" H 12850 4500 60  0000 C CNN
+	1    12750 4700
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M63
+U 1 1 680CF51C
+P 12750 4250
+F 0 "M63" H 12750 4100 50  0000 R CNN
+F 1 "mosfet_n" H 12850 4200 50  0000 R CNN
+F 2 "" H 13050 3950 29  0000 C CNN
+F 3 "" H 12850 4050 60  0000 C CNN
+	1    12750 4250
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M68
+U 1 1 680CF522
+P 12800 3950
+F 0 "M68" H 12750 4000 50  0000 R CNN
+F 1 "mosfet_p" H 12850 4100 50  0000 R CNN
+F 2 "" H 13050 4050 29  0000 C CNN
+F 3 "" H 12850 3950 60  0000 C CNN
+	1    12800 3950
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_p M67
+U 1 1 680CF528
+P 12800 3500
+F 0 "M67" H 12750 3550 50  0000 R CNN
+F 1 "mosfet_p" H 12850 3650 50  0000 R CNN
+F 2 "" H 13050 3600 29  0000 C CNN
+F 3 "" H 12850 3500 60  0000 C CNN
+	1    12800 3500
+	1    0    0    1   
+$EndComp
+Wire Wire Line
+	12950 4150 12950 4250
+Text GLabel 12350 4200 0    60   Input ~ 0
+h
+Wire Wire Line
+	12650 3500 12650 4900
+Connection ~ 12650 3950
+Connection ~ 12650 4450
+Wire Wire Line
+	12350 4200 12650 4200
+Connection ~ 12650 4200
+$Comp
+L mosfet_p M70
+U 1 1 680CF535
+P 13650 4000
+F 0 "M70" H 13600 4050 50  0000 R CNN
+F 1 "mosfet_p" H 13700 4150 50  0000 R CNN
+F 2 "" H 13900 4100 29  0000 C CNN
+F 3 "" H 13700 4000 60  0000 C CNN
+	1    13650 4000
+	0    1    -1   0   
+$EndComp
+$Comp
+L mosfet_n M72
+U 1 1 680CF53B
+P 13850 4350
+F 0 "M72" H 13850 4200 50  0000 R CNN
+F 1 "mosfet_n" H 13950 4300 50  0000 R CNN
+F 2 "" H 14150 4050 29  0000 C CNN
+F 3 "" H 13950 4150 60  0000 C CNN
+	1    13850 4350
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	13650 4150 13650 4250
+Connection ~ 13650 4200
+Wire Wire Line
+	13450 4650 13450 4550
+Connection ~ 13050 4650
+Connection ~ 13450 4650
+Connection ~ 13050 3750
+Wire Wire Line
+	13450 3850 13450 3750
+Connection ~ 13450 3750
+$Comp
+L GND #PWR25
+U 1 1 680CF549
+P 13850 3850
+F 0 "#PWR25" H 13850 3600 50  0001 C CNN
+F 1 "GND" H 13850 3700 50  0000 C CNN
+F 2 "" H 13850 3850 50  0001 C CNN
+F 3 "" H 13850 3850 50  0001 C CNN
+	1    13850 3850
+	1    0    0    -1  
+$EndComp
+Text GLabel 13850 4550 2    60   Input ~ 0
+vdd
+Wire Wire Line
+	12950 1950 14550 1950
+Wire Wire Line
+	12950 4200 14550 4200
+$Comp
+L mosfet_p M75
+U 1 1 680CF552
+P 14700 1600
+F 0 "M75" H 14650 1650 50  0000 R CNN
+F 1 "mosfet_p" H 14750 1750 50  0000 R CNN
+F 2 "" H 14950 1700 29  0000 C CNN
+F 3 "" H 14750 1600 60  0000 C CNN
+	1    14700 1600
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_n M73
+U 1 1 680CF558
+P 14650 1900
+F 0 "M73" H 14650 1750 50  0000 R CNN
+F 1 "mosfet_n" H 14750 1850 50  0000 R CNN
+F 2 "" H 14950 1600 29  0000 C CNN
+F 3 "" H 14750 1700 60  0000 C CNN
+	1    14650 1900
+	1    0    0    -1  
+$EndComp
+Text GLabel 14850 1350 1    60   Input ~ 0
+vdd
+$Comp
+L GND #PWR26
+U 1 1 680CF55F
+P 14850 2350
+F 0 "#PWR26" H 14850 2100 50  0001 C CNN
+F 1 "GND" H 14850 2200 50  0000 C CNN
+F 2 "" H 14850 2350 50  0001 C CNN
+F 3 "" H 14850 2350 50  0001 C CNN
+	1    14850 2350
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	14550 1600 14550 2100
+Connection ~ 14550 1950
+Wire Wire Line
+	14850 1800 14850 1900
+Wire Wire Line
+	14850 1350 14850 1400
+Wire Wire Line
+	14850 1400 14950 1400
+Wire Wire Line
+	14950 1400 14950 1450
+Wire Wire Line
+	14850 2350 14850 2300
+Wire Wire Line
+	14850 2300 14950 2300
+Wire Wire Line
+	14950 2300 14950 2250
+$Comp
+L mosfet_p M76
+U 1 1 680CF56E
+P 14700 3850
+F 0 "M76" H 14650 3900 50  0000 R CNN
+F 1 "mosfet_p" H 14750 4000 50  0000 R CNN
+F 2 "" H 14950 3950 29  0000 C CNN
+F 3 "" H 14750 3850 60  0000 C CNN
+	1    14700 3850
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_n M74
+U 1 1 680CF574
+P 14650 4150
+F 0 "M74" H 14650 4000 50  0000 R CNN
+F 1 "mosfet_n" H 14750 4100 50  0000 R CNN
+F 2 "" H 14950 3850 29  0000 C CNN
+F 3 "" H 14750 3950 60  0000 C CNN
+	1    14650 4150
+	1    0    0    -1  
+$EndComp
+Text GLabel 14850 3600 1    60   Input ~ 0
+vdd
+$Comp
+L GND #PWR27
+U 1 1 680CF57B
+P 14850 4600
+F 0 "#PWR27" H 14850 4350 50  0001 C CNN
+F 1 "GND" H 14850 4450 50  0000 C CNN
+F 2 "" H 14850 4600 50  0001 C CNN
+F 3 "" H 14850 4600 50  0001 C CNN
+	1    14850 4600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	14550 3850 14550 4350
+Connection ~ 14550 4200
+Wire Wire Line
+	14850 4050 14850 4150
+Wire Wire Line
+	14850 3600 14850 3650
+Wire Wire Line
+	14850 3650 14950 3650
+Wire Wire Line
+	14950 3650 14950 3700
+Wire Wire Line
+	14850 4600 14850 4550
+Wire Wire Line
+	14850 4550 14950 4550
+Wire Wire Line
+	14950 4550 14950 4500
+$Comp
+L mosfet_n M78
+U 1 1 680CF58A
+P 15950 3050
+F 0 "M78" H 15950 2900 50  0000 R CNN
+F 1 "mosfet_n" H 16050 3000 50  0000 R CNN
+F 2 "" H 16250 2750 29  0000 C CNN
+F 3 "" H 16050 2850 60  0000 C CNN
+	1    15950 3050
+	1    0    0    -1  
+$EndComp
+$Comp
+L mosfet_n M79
+U 1 1 680CF590
+P 16350 3500
+F 0 "M79" H 16350 3350 50  0000 R CNN
+F 1 "mosfet_n" H 16450 3450 50  0000 R CNN
+F 2 "" H 16650 3200 29  0000 C CNN
+F 3 "" H 16450 3300 60  0000 C CNN
+	1    16350 3500
+	-1   0    0    -1  
+$EndComp
+$Comp
+L mosfet_p M77
+U 1 1 680CF596
+P 15700 2750
+F 0 "M77" H 15650 2800 50  0000 R CNN
+F 1 "mosfet_p" H 15750 2900 50  0000 R CNN
+F 2 "" H 15950 2850 29  0000 C CNN
+F 3 "" H 15750 2750 60  0000 C CNN
+	1    15700 2750
+	1    0    0    1   
+$EndComp
+$Comp
+L mosfet_p M80
+U 1 1 680CF59C
+P 16550 2750
+F 0 "M80" H 16500 2800 50  0000 R CNN
+F 1 "mosfet_p" H 16600 2900 50  0000 R CNN
+F 2 "" H 16800 2850 29  0000 C CNN
+F 3 "" H 16600 2750 60  0000 C CNN
+	1    16550 2750
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	15850 2950 16400 2950
+Wire Wire Line
+	16150 3050 16150 2950
+Connection ~ 16150 2950
+Wire Wire Line
+	16150 3450 16250 3450
+Wire Wire Line
+	16250 3450 16250 3400
+Wire Wire Line
+	16150 3450 16150 3500
+Wire Wire Line
+	16050 3850 16050 3900
+Wire Wire Line
+	16050 3900 16150 3900
+Wire Wire Line
+	15850 2550 16400 2550
+Wire Wire Line
+	15950 2600 15950 2550
+Connection ~ 15950 2550
+Wire Wire Line
+	16300 2600 16300 2550
+Connection ~ 16300 2550
+Wire Wire Line
+	14850 1850 15550 1850
+Wire Wire Line
+	15550 1850 15550 3250
+Connection ~ 14850 1850
+Wire Wire Line
+	15550 3250 15850 3250
+Connection ~ 15550 2750
+Wire Wire Line
+	14850 4100 16450 4100
+Wire Wire Line
+	16450 4100 16450 3700
+Connection ~ 14850 4100
+Wire Wire Line
+	16450 3700 16700 3700
+Wire Wire Line
+	16700 3700 16700 2750
+Text GLabel 15950 2550 1    60   Input ~ 0
+vdd
+$Comp
+L GND #PWR28
+U 1 1 680CF5BA
+P 16150 3900
+F 0 "#PWR28" H 16150 3650 50  0001 C CNN
+F 1 "GND" H 16150 3750 50  0000 C CNN
+F 2 "" H 16150 3900 50  0001 C CNN
+F 3 "" H 16150 3900 50  0001 C CNN
+	1    16150 3900
+	1    0    0    -1  
+$EndComp
+Text GLabel 16150 2950 1    60   Input ~ 0
+m
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B.sub b/library/SubcircuitLibrary/CD4093B/CD4093B.sub
new file mode 100644
index 00000000..d364c9c1
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B.sub
@@ -0,0 +1,84 @@
+.subckt CD4093B a b j k c d ? e f l m g h vdd
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m2 net-_m1-pad3_ a gnd gnd CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ a net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m1-pad1_ a net-_m17-pad3_ net-_m17-pad3_ CMOSP W=100u L=100u M=1
+m5 net-_m17-pad3_ a vdd vdd CMOSP W=100u L=100u M=1
+m17 gnd net-_m1-pad1_ net-_m17-pad3_ net-_m17-pad3_ CMOSP W=100u L=100u M=1
+m21 vdd net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m4 net-_m22-pad3_ b gnd gnd CMOSN W=100u L=100u M=1
+m3 net-_m18-pad2_ b net-_m22-pad3_ net-_m22-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m18-pad2_ b net-_m18-pad3_ net-_m18-pad3_ CMOSP W=100u L=100u M=1
+m7 net-_m18-pad3_ b vdd vdd CMOSP W=100u L=100u M=1
+m18 gnd net-_m18-pad2_ net-_m18-pad3_ net-_m18-pad3_ CMOSP W=100u L=100u M=1
+m22 vdd net-_m18-pad2_ net-_m22-pad3_ net-_m22-pad3_ CMOSN W=100u L=100u M=1
+m27 net-_m25-pad1_ net-_m1-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m25 net-_m25-pad1_ net-_m1-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m28 net-_m26-pad1_ net-_m18-pad2_ vdd vdd CMOSP W=100u L=100u M=1
+m26 net-_m26-pad1_ net-_m18-pad2_ gnd gnd CMOSN W=100u L=100u M=1
+m35 j net-_m25-pad1_ net-_m35-pad3_ net-_m35-pad3_ CMOSN W=100u L=100u M=1
+m37 net-_m35-pad3_ net-_m26-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m33 j net-_m25-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m39 j net-_m26-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m10 net-_m10-pad1_ c gnd gnd CMOSN W=100u L=100u M=1
+m9 net-_m14-pad1_ c net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m14 net-_m14-pad1_ c net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m13 net-_m13-pad1_ c vdd vdd CMOSP W=100u L=100u M=1
+m19 gnd net-_m14-pad1_ net-_m13-pad1_ net-_m13-pad1_ CMOSP W=100u L=100u M=1
+m23 vdd net-_m14-pad1_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m12 net-_m11-pad3_ d gnd gnd CMOSN W=100u L=100u M=1
+m11 net-_m11-pad1_ d net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m11-pad1_ d net-_m15-pad1_ net-_m15-pad1_ CMOSP W=100u L=100u M=1
+m15 net-_m15-pad1_ d vdd vdd CMOSP W=100u L=100u M=1
+m20 gnd net-_m11-pad1_ net-_m15-pad1_ net-_m15-pad1_ CMOSP W=100u L=100u M=1
+m24 vdd net-_m11-pad1_ net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m31 net-_m29-pad1_ net-_m14-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m29 net-_m29-pad1_ net-_m14-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m32 net-_m30-pad1_ net-_m11-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m30 net-_m30-pad1_ net-_m11-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m36 k net-_m29-pad1_ net-_m36-pad3_ net-_m36-pad3_ CMOSN W=100u L=100u M=1
+m38 net-_m36-pad3_ net-_m30-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m34 k net-_m29-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m40 k net-_m30-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m42 net-_m41-pad3_ e gnd gnd CMOSN W=100u L=100u M=1
+m41 net-_m41-pad1_ e net-_m41-pad3_ net-_m41-pad3_ CMOSN W=100u L=100u M=1
+m46 net-_m41-pad1_ e net-_m45-pad1_ net-_m45-pad1_ CMOSP W=100u L=100u M=1
+m45 net-_m45-pad1_ e vdd vdd CMOSP W=100u L=100u M=1
+m49 gnd net-_m41-pad1_ net-_m45-pad1_ net-_m45-pad1_ CMOSP W=100u L=100u M=1
+m51 vdd net-_m41-pad1_ net-_m41-pad3_ net-_m41-pad3_ CMOSN W=100u L=100u M=1
+m44 net-_m43-pad3_ f gnd gnd CMOSN W=100u L=100u M=1
+m43 net-_m43-pad1_ f net-_m43-pad3_ net-_m43-pad3_ CMOSN W=100u L=100u M=1
+m48 net-_m43-pad1_ f net-_m47-pad1_ net-_m47-pad1_ CMOSP W=100u L=100u M=1
+m47 net-_m47-pad1_ f vdd vdd CMOSP W=100u L=100u M=1
+m50 gnd net-_m43-pad1_ net-_m47-pad1_ net-_m47-pad1_ CMOSP W=100u L=100u M=1
+m52 vdd net-_m43-pad1_ net-_m43-pad3_ net-_m43-pad3_ CMOSN W=100u L=100u M=1
+m55 net-_m53-pad1_ net-_m41-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m53 net-_m53-pad1_ net-_m41-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m56 net-_m54-pad1_ net-_m43-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m54 net-_m54-pad1_ net-_m43-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m58 l net-_m53-pad1_ net-_m58-pad3_ net-_m58-pad3_ CMOSN W=100u L=100u M=1
+m59 net-_m58-pad3_ net-_m54-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m57 l net-_m53-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m60 l net-_m54-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m62 net-_m61-pad3_ g gnd gnd CMOSN W=100u L=100u M=1
+m61 net-_m61-pad1_ g net-_m61-pad3_ net-_m61-pad3_ CMOSN W=100u L=100u M=1
+m66 net-_m61-pad1_ g net-_m65-pad1_ net-_m65-pad1_ CMOSP W=100u L=100u M=1
+m65 net-_m65-pad1_ g vdd vdd CMOSP W=100u L=100u M=1
+m69 gnd net-_m61-pad1_ net-_m65-pad1_ net-_m65-pad1_ CMOSP W=100u L=100u M=1
+m71 vdd net-_m61-pad1_ net-_m61-pad3_ net-_m61-pad3_ CMOSN W=100u L=100u M=1
+m64 net-_m63-pad3_ h gnd gnd CMOSN W=100u L=100u M=1
+m63 net-_m63-pad1_ h net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1
+m68 net-_m63-pad1_ h net-_m67-pad1_ net-_m67-pad1_ CMOSP W=100u L=100u M=1
+m67 net-_m67-pad1_ h vdd vdd CMOSP W=100u L=100u M=1
+m70 gnd net-_m63-pad1_ net-_m67-pad1_ net-_m67-pad1_ CMOSP W=100u L=100u M=1
+m72 vdd net-_m63-pad1_ net-_m63-pad3_ net-_m63-pad3_ CMOSN W=100u L=100u M=1
+m75 net-_m73-pad1_ net-_m61-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m73 net-_m73-pad1_ net-_m61-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m76 net-_m74-pad1_ net-_m63-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m74 net-_m74-pad1_ net-_m63-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m78 m net-_m73-pad1_ net-_m78-pad3_ net-_m78-pad3_ CMOSN W=100u L=100u M=1
+m79 net-_m78-pad3_ net-_m74-pad1_ gnd gnd CMOSN W=100u L=100u M=1
+m77 m net-_m73-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+m80 m net-_m74-pad1_ vdd vdd CMOSP W=100u L=100u M=1
+.ends CD4093B
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD4093B/CD4093B_Previous_Values.xml b/library/SubcircuitLibrary/CD4093B/CD4093B_Previous_Values.xml
new file mode 100644
index 00000000..2f6521f8
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/CD4093B_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis><source /><model /><devicemodel><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m1><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m6><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m5><m17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m17><m21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m21><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m4><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m3><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m8><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m7><m18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m18><m22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m22><m27><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m27><m25><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m25><m28><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m28><m26><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m26><m35><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m35><m37><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m37><m33><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m33><m39><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m39><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m10><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m9><m14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m14><m13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m13><m19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m19><m23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m23><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m12><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m11><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m16><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m15><m20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m20><m24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m24><m31><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m31><m29><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m29><m32><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m32><m30><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m30><m36><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m36><m38><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m38><m34><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m34><m40><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m40><m42><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m42><m41><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m41><m46><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m46><m45><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m45><m49><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m49><m51><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m51><m44><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m44><m43><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m43><m48><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m48><m47><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m47><m50><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m50><m52><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m52><m55><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m55><m53><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m53><m56><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m56><m54><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m54><m58><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m58><m59><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m59><m57><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m57><m60><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m60><m62><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m62><m61><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m61><m66><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m66><m65><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m65><m69><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m69><m71><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m71><m64><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m64><m63><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m63><m68><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m68><m67><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m67><m70><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m70><m72><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m72><m75><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m75><m73><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m73><m76><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m76><m74><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m74><m78><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m78><m79><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m79><m77><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m77><m80><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m80></devicemodel><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD4093B/NMOS-180nm.lib b/library/SubcircuitLibrary/CD4093B/NMOS-180nm.lib
new file mode 100644
index 00000000..51e9b119
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 
++            K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 
++            DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++            UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++            A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++            XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++            CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3    
++            PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++            PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++            WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++            CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 
++            MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 
++            PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/CD4093B/PMOS-180nm.lib b/library/SubcircuitLibrary/CD4093B/PMOS-180nm.lib
new file mode 100644
index 00000000..032b5b95
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++            K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++            DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++            AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++            PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 
++            VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++            DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++            PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++            UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++            CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8            +            MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3    
++            WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/library/SubcircuitLibrary/CD4093B/analysis b/library/SubcircuitLibrary/CD4093B/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4093B/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file