diff options
author | Nirmitha N | 2025-06-01 16:46:53 +0530 |
---|---|---|
committer | GitHub | 2025-06-01 16:46:53 +0530 |
commit | 9f1e63ca847454cc4745594aff474cfe8784fb44 (patch) | |
tree | 45e9d64ac551f8e79a05f8cc68a6be68e8ba57c2 | |
parent | 673d0db4775b38579ff81ea84d461460a3c454ec (diff) | |
download | eSim-9f1e63ca847454cc4745594aff474cfe8784fb44.tar.gz eSim-9f1e63ca847454cc4745594aff474cfe8784fb44.tar.bz2 eSim-9f1e63ca847454cc4745594aff474cfe8784fb44.zip |
Adding MAX7410
MAX7410 is a 5th Order Switched-Capacitor Butterworth Low Pass Filter for cut off frequency of 2.5kHz & Vin of 4V
-rw-r--r-- | library/SubcircuitLibrary/MAX7410-cache.lib | 143 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410.bak | 632 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410.cir | 43 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410.cir.out | 46 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410.pro | 71 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410.sch | 1001 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410.sub | 40 | ||||
-rw-r--r-- | library/SubcircuitLibrary/MAX7410_Previous_Values.xml | 1 | ||||
-rw-r--r-- | library/SubcircuitLibrary/analysis | 2 |
9 files changed, 1978 insertions, 1 deletions
diff --git a/library/SubcircuitLibrary/MAX7410-cache.lib b/library/SubcircuitLibrary/MAX7410-cache.lib new file mode 100644 index 00000000..a85a72d8 --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410-cache.lib @@ -0,0 +1,143 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/MAX7410.bak b/library/SubcircuitLibrary/MAX7410.bak new file mode 100644 index 00000000..c696547a --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410.bak @@ -0,0 +1,632 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:MAX7410-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
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+ 1 5850 2500
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+$EndComp
+$Comp
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+F 3 "" V 4900 2700 30 0000 C CNN
+ 1 4850 2650
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R4
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+ 1 5650 1500
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+$EndComp
+$Comp
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+F 3 "" V 5000 1650 30 0000 C CNN
+ 1 4950 1600
+ 0 1 1 0
+$EndComp
+$Comp
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+P 5150 3100
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+F 2 "" H 5188 2950 30 0000 C CNN
+F 3 "" H 5150 3100 60 0000 C CNN
+ 1 5150 3100
+ 1 0 0 -1
+$EndComp
+$Comp
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+P 4500 1650
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+F 3 "" H 4500 1650 60 0000 C CNN
+ 1 4500 1650
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+$Comp
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+ 1 5550 3750
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+F 1 "GND" H 5000 1850 50 0000 C CNN
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+F 3 "" H 5000 2000 50 0001 C CNN
+ 1 5000 2000
+ 1 0 0 -1
+$EndComp
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+F 1 "GND" H 4500 1850 50 0000 C CNN
+F 2 "" H 4500 2000 50 0001 C CNN
+F 3 "" H 4500 2000 50 0001 C CNN
+ 1 4500 2000
+ 1 0 0 -1
+$EndComp
+$Comp
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+F 2 "" H 5150 3400 50 0001 C CNN
+F 3 "" H 5150 3400 50 0001 C CNN
+ 1 5150 3400
+ 1 0 0 -1
+$EndComp
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+P 8950 2700
+F 0 "X3" H 8750 2700 60 0000 C CNN
+F 1 "lm_741" H 8850 2450 60 0000 C CNN
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+F 3 "" H 8950 2700 60 0000 C CNN
+ 1 8950 2700
+ 1 0 0 -1
+$EndComp
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+F 1 "3.5k" H 8000 2800 50 0000 C CNN
+F 2 "" H 8000 2830 30 0000 C CNN
+F 3 "" V 8000 2900 30 0000 C CNN
+ 1 7950 2850
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R8
+U 1 1 68306269
+P 7350 2850
+F 0 "R8" H 7400 2980 50 0000 C CNN
+F 1 "3.5k" H 7400 2800 50 0000 C CNN
+F 2 "" H 7400 2830 30 0000 C CNN
+F 3 "" V 7400 2900 30 0000 C CNN
+ 1 7350 2850
+ 1 0 0 -1
+$EndComp
+$Comp
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+P 8750 1700
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+F 1 "3.52k" H 8800 1650 50 0000 C CNN
+F 2 "" H 8800 1680 30 0000 C CNN
+F 3 "" V 8800 1750 30 0000 C CNN
+ 1 8750 1700
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R10
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+P 8050 1800
+F 0 "R10" H 8100 1930 50 0000 C CNN
+F 1 "10k" H 8100 1750 50 0000 C CNN
+F 2 "" H 8100 1780 30 0000 C CNN
+F 3 "" V 8100 1850 30 0000 C CNN
+ 1 8050 1800
+ 0 1 1 0
+$EndComp
+$Comp
+L capacitor C7
+U 1 1 6830626C
+P 8250 3300
+F 0 "C7" H 8275 3400 50 0000 L CNN
+F 1 "0.01u" H 8275 3200 50 0000 L CNN
+F 2 "" H 8288 3150 30 0000 C CNN
+F 3 "" H 8250 3300 60 0000 C CNN
+ 1 8250 3300
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C6
+U 1 1 6830626D
+P 7600 1850
+F 0 "C6" H 7625 1950 50 0000 L CNN
+F 1 "0.01u" H 7625 1750 50 0000 L CNN
+F 2 "" H 7638 1700 30 0000 C CNN
+F 3 "" H 7600 1850 60 0000 C CNN
+ 1 7600 1850
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C8
+U 1 1 6830626E
+P 8650 3950
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+F 1 "0.01u" H 8675 3850 50 0000 L CNN
+F 2 "" H 8688 3800 30 0000 C CNN
+F 3 "" H 8650 3950 60 0000 C CNN
+ 1 8650 3950
+ 0 1 1 0
+$EndComp
+$Comp
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+U 1 1 6830626F
+P 8100 2200
+F 0 "#PWR04" H 8100 1950 50 0001 C CNN
+F 1 "GND" H 8100 2050 50 0000 C CNN
+F 2 "" H 8100 2200 50 0001 C CNN
+F 3 "" H 8100 2200 50 0001 C CNN
+ 1 8100 2200
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+$EndComp
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+F 1 "GND" H 7600 2050 50 0000 C CNN
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+F 3 "" H 7600 2200 50 0001 C CNN
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+F 2 "" H 8250 3600 50 0001 C CNN
+F 3 "" H 8250 3600 50 0001 C CNN
+ 1 8250 3600
+ 1 0 0 -1
+$EndComp
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+U 1 1 68306276
+P 2750 2500
+F 0 "X1" H 2550 2500 60 0000 C CNN
+F 1 "lm_741" H 2650 2250 60 0000 C CNN
+F 2 "" H 2750 2500 60 0000 C CNN
+F 3 "" H 2750 2500 60 0000 C CNN
+ 1 2750 2500
+ 1 0 0 -1
+$EndComp
+$Comp
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+U 1 1 68306277
+P 1750 2650
+F 0 "R1" H 1800 2780 50 0000 C CNN
+F 1 "3.5k" H 1800 2600 50 0000 C CNN
+F 2 "" H 1800 2630 30 0000 C CNN
+F 3 "" V 1800 2700 30 0000 C CNN
+ 1 1750 2650
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R3
+U 1 1 68306278
+P 2550 1500
+F 0 "R3" H 2600 1630 50 0000 C CNN
+F 1 "10k" H 2600 1450 50 0000 C CNN
+F 2 "" H 2600 1480 30 0000 C CNN
+F 3 "" V 2600 1550 30 0000 C CNN
+ 1 2550 1500
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+$EndComp
+$Comp
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+F 1 "10k" H 1900 1550 50 0000 C CNN
+F 2 "" H 1900 1580 30 0000 C CNN
+F 3 "" V 1900 1650 30 0000 C CNN
+ 1 1850 1600
+ 0 1 1 0
+$EndComp
+$Comp
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+U 1 1 6830627A
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+F 2 "" H 2088 2950 30 0000 C CNN
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+NoConn ~ 5800 2100
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+F 3 "" H 10450 3700 60 0000 C CNN
+ 4 10450 3700
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+$EndComp
+Wire Wire Line
+ 1350 2650 1000 2650
+Wire Wire Line
+ 1000 2650 1000 2550
+Wire Wire Line
+ 3800 3700 1000 3700
+Wire Wire Line
+ 6900 4850 3800 4850
+Connection ~ 3800 3700
+Wire Wire Line
+ 10000 4950 3650 4950
+Wire Wire Line
+ 3650 4950 3650 3850
+Wire Wire Line
+ 3650 3850 3800 3850
+Wire Wire Line
+ 3800 3850 3800 3700
+Wire Wire Line
+ 1000 4000 3300 4000
+Wire Wire Line
+ 3300 2950 3300 5450
+Wire Wire Line
+ 6400 2950 6400 5450
+Wire Wire Line
+ 6400 5450 3300 5450
+Connection ~ 3300 4000
+Wire Wire Line
+ 9500 3150 9500 5650
+Wire Wire Line
+ 9500 5650 3100 5650
+Wire Wire Line
+ 3100 5650 3100 4050
+Wire Wire Line
+ 3100 4050 3300 4050
+Wire Wire Line
+ 3300 4050 3300 4000
+Wire Wire Line
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+Wire Wire Line
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+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/MAX7410.cir b/library/SubcircuitLibrary/MAX7410.cir new file mode 100644 index 00000000..6ee5237b --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410.cir @@ -0,0 +1,43 @@ +* E:\ESIM\FOSSEE\eSim\library\SubcircuitLibrary\MAX7410\MAX7410.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/30/25 19:47:05
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X2 ? Net-_C3-Pad1_ Net-_C4-Pad1_ Net-_U1-Pad4_ ? Net-_C5-Pad1_ Net-_U1-Pad3_ ? lm_741
+R7 Net-_C3-Pad1_ Net-_C5-Pad1_ 13.82k
+R6 Net-_C3-Pad1_ GND 10k
+C4 Net-_C4-Pad1_ GND 0.05n
+C3 Net-_C3-Pad1_ GND 0.008u
+C5 Net-_C5-Pad1_ Net-_C5-Pad2_ 0.05n
+X3 ? Net-_C6-Pad1_ Net-_C7-Pad1_ Net-_U1-Pad4_ ? Net-_C8-Pad1_ Net-_U1-Pad3_ ? lm_741
+R11 Net-_C6-Pad1_ Net-_C8-Pad1_ 3.52k
+R10 Net-_C6-Pad1_ GND 10k
+C7 Net-_C7-Pad1_ GND 0.05n
+C6 Net-_C6-Pad1_ GND 0.01u
+C8 Net-_C8-Pad1_ Net-_C8-Pad2_ 0.05n
+X1 ? Net-_C1-Pad1_ Net-_C2-Pad1_ Net-_U1-Pad4_ ? Net-_M7-Pad2_ Net-_U1-Pad3_ ? lm_741
+R3 Net-_C1-Pad1_ Net-_M7-Pad2_ 10k
+R2 Net-_C1-Pad1_ GND 10k
+C2 Net-_C2-Pad1_ GND 0.05n
+C1 Net-_C1-Pad1_ GND 0.001u
+M1 Net-_C9-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad2_ Net-_M1-Pad2_ eSim_MOS_N
+M3 Net-_C2-Pad1_ Net-_M1-Pad2_ Net-_C9-Pad1_ Net-_M1-Pad2_ eSim_MOS_N
+C9 Net-_C9-Pad1_ GND 0.05n
+M9 Net-_C13-Pad1_ Net-_C5-Pad2_ Net-_C5-Pad2_ Net-_C5-Pad2_ eSim_MOS_N
+M10 Net-_C4-Pad1_ Net-_C5-Pad2_ Net-_C13-Pad1_ Net-_C5-Pad2_ eSim_MOS_N
+C13 Net-_C13-Pad1_ GND 0.005n
+M7 Net-_C12-Pad1_ Net-_M7-Pad2_ Net-_M7-Pad2_ Net-_M7-Pad2_ eSim_MOS_N
+M8 Net-_C5-Pad2_ Net-_M7-Pad2_ Net-_C12-Pad1_ Net-_M7-Pad2_ eSim_MOS_N
+C12 Net-_C12-Pad1_ GND 0.005n
+M5 Net-_C11-Pad1_ Net-_C8-Pad2_ Net-_C8-Pad2_ Net-_C8-Pad2_ eSim_MOS_N
+M6 Net-_C7-Pad1_ Net-_C8-Pad2_ Net-_C11-Pad1_ Net-_C8-Pad2_ eSim_MOS_N
+C11 Net-_C11-Pad1_ GND 0.05n
+M2 Net-_C10-Pad1_ Net-_C5-Pad1_ Net-_C5-Pad1_ Net-_C5-Pad1_ eSim_MOS_N
+M4 Net-_C8-Pad2_ Net-_C5-Pad1_ Net-_C10-Pad1_ Net-_C5-Pad1_ eSim_MOS_N
+C10 Net-_C10-Pad1_ GND 0.05n
+U1 ? Net-_M1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_C8-Pad1_ ? GND GND PORT
+
+.end
diff --git a/library/SubcircuitLibrary/MAX7410.cir.out b/library/SubcircuitLibrary/MAX7410.cir.out new file mode 100644 index 00000000..3a323ca0 --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410.cir.out @@ -0,0 +1,46 @@ +* e:\esim\fossee\esim\library\subcircuitlibrary\max7410\max7410.cir
+
+.include lm_741.sub
+.include NMOS-180nm.lib
+x2 ? net-_c3-pad1_ net-_c4-pad1_ net-_u1-pad4_ ? net-_c5-pad1_ net-_u1-pad3_ ? lm_741
+r7 net-_c3-pad1_ net-_c5-pad1_ 13.82k
+r6 net-_c3-pad1_ gnd 10k
+c4 net-_c4-pad1_ gnd 0.05n
+c3 net-_c3-pad1_ gnd 0.008u
+c5 net-_c5-pad1_ net-_c5-pad2_ 0.05n
+x3 ? net-_c6-pad1_ net-_c7-pad1_ net-_u1-pad4_ ? net-_c8-pad1_ net-_u1-pad3_ ? lm_741
+r11 net-_c6-pad1_ net-_c8-pad1_ 3.52k
+r10 net-_c6-pad1_ gnd 10k
+c7 net-_c7-pad1_ gnd 0.05n
+c6 net-_c6-pad1_ gnd 0.01u
+c8 net-_c8-pad1_ net-_c8-pad2_ 0.05n
+x1 ? net-_c1-pad1_ net-_c2-pad1_ net-_u1-pad4_ ? net-_m7-pad2_ net-_u1-pad3_ ? lm_741
+r3 net-_c1-pad1_ net-_m7-pad2_ 10k
+r2 net-_c1-pad1_ gnd 10k
+c2 net-_c2-pad1_ gnd 0.05n
+c1 net-_c1-pad1_ gnd 0.001u
+m1 net-_c9-pad1_ net-_m1-pad2_ net-_m1-pad2_ net-_m1-pad2_ CMOSN W=100u L=100u M=1
+m3 net-_c2-pad1_ net-_m1-pad2_ net-_c9-pad1_ net-_m1-pad2_ CMOSN W=100u L=100u M=1
+c9 net-_c9-pad1_ gnd 0.05n
+m9 net-_c13-pad1_ net-_c5-pad2_ net-_c5-pad2_ net-_c5-pad2_ CMOSN W=100u L=100u M=1
+m10 net-_c4-pad1_ net-_c5-pad2_ net-_c13-pad1_ net-_c5-pad2_ CMOSN W=100u L=100u M=1
+c13 net-_c13-pad1_ gnd 0.005n
+m7 net-_c12-pad1_ net-_m7-pad2_ net-_m7-pad2_ net-_m7-pad2_ CMOSN W=100u L=100u M=1
+m8 net-_c5-pad2_ net-_m7-pad2_ net-_c12-pad1_ net-_m7-pad2_ CMOSN W=100u L=100u M=1
+c12 net-_c12-pad1_ gnd 0.005n
+m5 net-_c11-pad1_ net-_c8-pad2_ net-_c8-pad2_ net-_c8-pad2_ CMOSN W=100u L=100u M=1
+m6 net-_c7-pad1_ net-_c8-pad2_ net-_c11-pad1_ net-_c8-pad2_ CMOSN W=100u L=100u M=1
+c11 net-_c11-pad1_ gnd 0.05n
+m2 net-_c10-pad1_ net-_c5-pad1_ net-_c5-pad1_ net-_c5-pad1_ CMOSN W=100u L=100u M=1
+m4 net-_c8-pad2_ net-_c5-pad1_ net-_c10-pad1_ net-_c5-pad1_ CMOSN W=100u L=100u M=1
+c10 net-_c10-pad1_ gnd 0.05n
+* u1 ? net-_m1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_c8-pad1_ ? gnd gnd port
+.ac lin 2000 1Hz 10KHz
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/MAX7410.pro b/library/SubcircuitLibrary/MAX7410.pro new file mode 100644 index 00000000..22f2d439 --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/MAX7410.sch b/library/SubcircuitLibrary/MAX7410.sch new file mode 100644 index 00000000..8fc3340f --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410.sch @@ -0,0 +1,1001 @@ +EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:MAX7410-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
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+Comment2 ""
+Comment3 ""
+Comment4 ""
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+F 2 "" H 8750 2500 60 0000 C CNN
+F 3 "" H 8750 2500 60 0000 C CNN
+ 1 8750 2500
+ 1 0 0 -1
+$EndComp
+$Comp
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+U 1 1 6830625B
+P 8550 1500
+F 0 "R7" H 8600 1630 50 0000 C CNN
+F 1 "13.82k" H 8600 1450 50 0000 C CNN
+F 2 "" H 8600 1480 30 0000 C CNN
+F 3 "" V 8600 1550 30 0000 C CNN
+ 1 8550 1500
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R6
+U 1 1 6830625C
+P 7850 1600
+F 0 "R6" H 7900 1730 50 0000 C CNN
+F 1 "10k" H 7900 1550 50 0000 C CNN
+F 2 "" H 7900 1580 30 0000 C CNN
+F 3 "" V 7900 1650 30 0000 C CNN
+ 1 7850 1600
+ 0 1 1 0
+$EndComp
+$Comp
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+F 2 "" H 8088 2950 30 0000 C CNN
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+ 1 8050 3100
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+$EndComp
+$Comp
+L capacitor C3
+U 1 1 6830625E
+P 7400 1650
+F 0 "C3" H 7425 1750 50 0000 L CNN
+F 1 "0.008u" H 7425 1550 50 0000 L CNN
+F 2 "" H 7438 1500 30 0000 C CNN
+F 3 "" H 7400 1650 60 0000 C CNN
+ 1 7400 1650
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C5
+U 1 1 6830625F
+P 7900 4400
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+F 2 "" H 7938 4250 30 0000 C CNN
+F 3 "" H 7900 4400 60 0000 C CNN
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+ 0 1 1 0
+$EndComp
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+U 1 1 68306260
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+ 1 8050 3400
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+U 1 1 68306267
+P 5100 5950
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+F 3 "" H 5100 5950 60 0000 C CNN
+ 1 5100 5950
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+$EndComp
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+U 1 1 6830626A
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+F 2 "" H 4950 4930 30 0000 C CNN
+F 3 "" V 4950 5000 30 0000 C CNN
+ 1 4900 4950
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R10
+U 1 1 6830626B
+P 4200 5050
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+F 1 "10k" H 4250 5000 50 0000 C CNN
+F 2 "" H 4250 5030 30 0000 C CNN
+F 3 "" V 4250 5100 30 0000 C CNN
+ 1 4200 5050
+ 0 1 1 0
+$EndComp
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+L capacitor C7
+U 1 1 6830626C
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+F 2 "" H 4438 6400 30 0000 C CNN
+F 3 "" H 4400 6550 60 0000 C CNN
+ 1 4400 6550
+ 1 0 0 -1
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+U 1 1 6830626D
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+F 2 "" H 3788 4950 30 0000 C CNN
+F 3 "" H 3750 5100 60 0000 C CNN
+ 1 3750 5100
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C8
+U 1 1 6830626E
+P 4750 7800
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+F 2 "" H 4788 7650 30 0000 C CNN
+F 3 "" H 4750 7800 60 0000 C CNN
+ 1 4750 7800
+ 0 1 1 0
+$EndComp
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+U 1 1 6830626F
+P 4250 5450
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+F 2 "" H 4250 5450 50 0001 C CNN
+F 3 "" H 4250 5450 50 0001 C CNN
+ 1 4250 5450
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+F 2 "" H 4400 6850 50 0001 C CNN
+F 3 "" H 4400 6850 50 0001 C CNN
+ 1 4400 6850
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+$EndComp
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+L lm_741 X1
+U 1 1 68306276
+P 3600 2500
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+F 2 "" H 3600 2500 60 0000 C CNN
+F 3 "" H 3600 2500 60 0000 C CNN
+ 1 3600 2500
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R3
+U 1 1 68306278
+P 3400 1500
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+F 2 "" H 3450 1480 30 0000 C CNN
+F 3 "" V 3450 1550 30 0000 C CNN
+ 1 3400 1500
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R2
+U 1 1 68306279
+P 2700 1600
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+F 2 "" H 2750 1580 30 0000 C CNN
+F 3 "" V 2750 1650 30 0000 C CNN
+ 1 2700 1600
+ 0 1 1 0
+$EndComp
+$Comp
+L capacitor C2
+U 1 1 6830627A
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+F 2 "" H 2938 2950 30 0000 C CNN
+F 3 "" H 2900 3100 60 0000 C CNN
+ 1 2900 3100
+ 1 0 0 -1
+$EndComp
+$Comp
+L capacitor C1
+U 1 1 6830627B
+P 2250 1650
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+F 2 "" H 2288 1500 30 0000 C CNN
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+ 1 2250 1650
+ 1 0 0 -1
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+U 1 1 6830627C
+P 2750 2000
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+F 2 "" H 2750 2000 50 0001 C CNN
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+ 1 2750 2000
+ 1 0 0 -1
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+$Comp
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+U 1 1 6830627D
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+F 1 "GND" H 2250 1850 50 0000 C CNN
+F 2 "" H 2250 2000 50 0001 C CNN
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+ 1 2250 2000
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+NoConn ~ 3550 2100
+NoConn ~ 3650 2150
+NoConn ~ 3750 2800
+NoConn ~ 8700 2100
+NoConn ~ 8800 2150
+NoConn ~ 8900 2800
+NoConn ~ 5050 5550
+NoConn ~ 5150 5600
+NoConn ~ 5250 6250
+$Comp
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+F 2 "" H 1850 2600 29 0000 C CNN
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+ 1 1550 2900
+ 0 1 1 0
+$EndComp
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+F 2 "" H 2700 2600 29 0000 C CNN
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+ 1 2400 2900
+ 0 1 1 0
+$EndComp
+$Comp
+L capacitor C9
+U 1 1 6839C034
+P 1750 3700
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+F 2 "" H 1788 3550 30 0000 C CNN
+F 3 "" H 1750 3700 60 0000 C CNN
+ 1 1750 3700
+ 1 0 0 -1
+$EndComp
+$Comp
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+ 1 1750 4000
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+$EndComp
+Wire Wire Line
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+Wire Wire Line
+ 3450 1750 4650 1750
+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+$EndComp
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+$Comp
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+$Comp
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+$Comp
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+F 2 "" H 3488 6950 30 0000 C CNN
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+ 0 1 1 0
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+ 0 1 1 0
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+$Comp
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+$Comp
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+Connection ~ 2500 6500
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+U 1 1 6839D612
+P 300 1950
+F 0 "U1" H 350 2050 30 0000 C CNN
+F 1 "PORT" H 300 1950 30 0000 C CNN
+F 2 "" H 300 1950 60 0000 C CNN
+F 3 "" H 300 1950 60 0000 C CNN
+ 1 300 1950
+ 1 0 0 -1
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+F 0 "U1" H 350 2500 30 0000 C CNN
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+ 2 300 2400
+ 1 0 0 -1
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+$Comp
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+F 0 "U1" H 350 4000 30 0000 C CNN
+F 1 "PORT" H 300 3900 30 0000 C CNN
+F 2 "" H 300 3900 60 0000 C CNN
+F 3 "" H 300 3900 60 0000 C CNN
+ 3 300 3900
+ 1 0 0 -1
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+$Comp
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+F 0 "U1" H 350 4400 30 0000 C CNN
+F 1 "PORT" H 300 4300 30 0000 C CNN
+F 2 "" H 300 4300 60 0000 C CNN
+F 3 "" H 300 4300 60 0000 C CNN
+ 4 300 4300
+ 1 0 0 -1
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+$Comp
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+U 5 1 6839D93F
+P 7450 5950
+F 0 "U1" H 7500 6050 30 0000 C CNN
+F 1 "PORT" H 7450 5950 30 0000 C CNN
+F 2 "" H 7450 5950 60 0000 C CNN
+F 3 "" H 7450 5950 60 0000 C CNN
+ 5 7450 5950
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 6839DA24
+P 7500 6400
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+F 1 "PORT" H 7500 6400 30 0000 C CNN
+F 2 "" H 7500 6400 60 0000 C CNN
+F 3 "" H 7500 6400 60 0000 C CNN
+ 6 7500 6400
+ -1 0 0 1
+$EndComp
+$Comp
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+U 7 1 6839DAA9
+P 7500 6850
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+F 1 "PORT" H 7500 6850 30 0000 C CNN
+F 2 "" H 7500 6850 60 0000 C CNN
+F 3 "" H 7500 6850 60 0000 C CNN
+ 7 7500 6850
+ -1 0 0 1
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+$Comp
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+U 8 1 6839DB42
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+F 0 "U1" H 7550 7150 30 0000 C CNN
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+F 2 "" H 7500 7050 60 0000 C CNN
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+ 8 7500 7050
+ -1 0 0 1
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diff --git a/library/SubcircuitLibrary/MAX7410.sub b/library/SubcircuitLibrary/MAX7410.sub new file mode 100644 index 00000000..ffdfd1fc --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410.sub @@ -0,0 +1,40 @@ +* Subcircuit MAX7410
+.subckt MAX7410 ? net-_m1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_c8-pad1_ ? gnd gnd
+* e:\esim\fossee\esim\library\subcircuitlibrary\max7410\max7410.cir
+.include lm_741.sub
+.include NMOS-180nm.lib
+x2 ? net-_c3-pad1_ net-_c4-pad1_ net-_u1-pad4_ ? net-_c5-pad1_ net-_u1-pad3_ ? lm_741
+r7 net-_c3-pad1_ net-_c5-pad1_ 13.82k
+r6 net-_c3-pad1_ gnd 10k
+c4 net-_c4-pad1_ gnd 0.05n
+c3 net-_c3-pad1_ gnd 0.008u
+c5 net-_c5-pad1_ net-_c5-pad2_ 0.05n
+x3 ? net-_c6-pad1_ net-_c7-pad1_ net-_u1-pad4_ ? net-_c8-pad1_ net-_u1-pad3_ ? lm_741
+r11 net-_c6-pad1_ net-_c8-pad1_ 3.52k
+r10 net-_c6-pad1_ gnd 10k
+c7 net-_c7-pad1_ gnd 0.05n
+c6 net-_c6-pad1_ gnd 0.01u
+c8 net-_c8-pad1_ net-_c8-pad2_ 0.05n
+x1 ? net-_c1-pad1_ net-_c2-pad1_ net-_u1-pad4_ ? net-_m7-pad2_ net-_u1-pad3_ ? lm_741
+r3 net-_c1-pad1_ net-_m7-pad2_ 10k
+r2 net-_c1-pad1_ gnd 10k
+c2 net-_c2-pad1_ gnd 0.05n
+c1 net-_c1-pad1_ gnd 0.001u
+m1 net-_c9-pad1_ net-_m1-pad2_ net-_m1-pad2_ net-_m1-pad2_ CMOSN W=100u L=100u M=1
+m3 net-_c2-pad1_ net-_m1-pad2_ net-_c9-pad1_ net-_m1-pad2_ CMOSN W=100u L=100u M=1
+c9 net-_c9-pad1_ gnd 0.05n
+m9 net-_c13-pad1_ net-_c5-pad2_ net-_c5-pad2_ net-_c5-pad2_ CMOSN W=100u L=100u M=1
+m10 net-_c4-pad1_ net-_c5-pad2_ net-_c13-pad1_ net-_c5-pad2_ CMOSN W=100u L=100u M=1
+c13 net-_c13-pad1_ gnd 0.005n
+m7 net-_c12-pad1_ net-_m7-pad2_ net-_m7-pad2_ net-_m7-pad2_ CMOSN W=100u L=100u M=1
+m8 net-_c5-pad2_ net-_m7-pad2_ net-_c12-pad1_ net-_m7-pad2_ CMOSN W=100u L=100u M=1
+c12 net-_c12-pad1_ gnd 0.005n
+m5 net-_c11-pad1_ net-_c8-pad2_ net-_c8-pad2_ net-_c8-pad2_ CMOSN W=100u L=100u M=1
+m6 net-_c7-pad1_ net-_c8-pad2_ net-_c11-pad1_ net-_c8-pad2_ CMOSN W=100u L=100u M=1
+c11 net-_c11-pad1_ gnd 0.05n
+m2 net-_c10-pad1_ net-_c5-pad1_ net-_c5-pad1_ net-_c5-pad1_ CMOSN W=100u L=100u M=1
+m4 net-_c8-pad2_ net-_c5-pad1_ net-_c10-pad1_ net-_c5-pad1_ CMOSN W=100u L=100u M=1
+c10 net-_c10-pad1_ gnd 0.05n
+* Control Statements
+
+.ends MAX7410
\ No newline at end of file diff --git a/library/SubcircuitLibrary/MAX7410_Previous_Values.xml b/library/SubcircuitLibrary/MAX7410_Previous_Values.xml new file mode 100644 index 00000000..e5b8b256 --- /dev/null +++ b/library/SubcircuitLibrary/MAX7410_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model /><devicemodel><m1><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m1><m3><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m3><m9><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m9><m10><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m10><m7><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m7><m8><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m5><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m5><m6><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m6><m2><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m4><field>E:\ESIM\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m4></devicemodel><subcircuit><x2><field>E:\ESIM\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x2><x3><field>E:\ESIM\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x3><x1><field>E:\ESIM\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency">1</field4><field5 name="Stop Frequency">10</field5><field6 name="No. of points">2000</field6><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">KHz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/analysis b/library/SubcircuitLibrary/analysis index 52ccc5ec..dddfa4da 100644 --- a/library/SubcircuitLibrary/analysis +++ b/library/SubcircuitLibrary/analysis @@ -1 +1 @@ -.ac lin 0 0Hz 0Hz
\ No newline at end of file +.ac lin 2000 1Hz 10KHz
\ No newline at end of file |