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authorvelugotiashokkumar2025-06-08 17:47:17 +0530
committervelugotiashokkumar2025-06-08 17:47:17 +0530
commit52ef3dc3e1a818e9e3751d978a54c8c1010daf09 (patch)
tree443d14f901ef5ca99f4c293ac905f816e2ee19e4
parente657a2f53be85c79230e719c84f335afc85c439b (diff)
downloadeSim-52ef3dc3e1a818e9e3751d978a54c8c1010daf09.tar.gz
eSim-52ef3dc3e1a818e9e3751d978a54c8c1010daf09.tar.bz2
eSim-52ef3dc3e1a818e9e3751d978a54c8c1010daf09.zip
TL072
Diffstat
-rw-r--r--library/SubcircuitLibrary/TL072/D.lib2
-rw-r--r--library/SubcircuitLibrary/TL072/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/TL072/PJF.lib5
-rw-r--r--library/SubcircuitLibrary/TL072/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/TL072/TL072-cache.lib144
-rw-r--r--library/SubcircuitLibrary/TL072/TL072.cir70
-rw-r--r--library/SubcircuitLibrary/TL072/TL072.cir.out80
-rw-r--r--library/SubcircuitLibrary/TL072/TL072.pro73
-rw-r--r--library/SubcircuitLibrary/TL072/TL072.sch1079
-rw-r--r--library/SubcircuitLibrary/TL072/TL072.sub74
-rw-r--r--library/SubcircuitLibrary/TL072/TL072_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/TL072/analysis1
12 files changed, 1537 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/TL072/D.lib b/library/SubcircuitLibrary/TL072/D.lib
new file mode 100644
index 00000000..f53bf3e0
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/TL072/NPN.lib b/library/SubcircuitLibrary/TL072/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/TL072/PJF.lib b/library/SubcircuitLibrary/TL072/PJF.lib
new file mode 100644
index 00000000..5589571d
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/PJF.lib
@@ -0,0 +1,5 @@
+.model J2N3820 PJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
+
diff --git a/library/SubcircuitLibrary/TL072/PNP.lib b/library/SubcircuitLibrary/TL072/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/TL072/TL072-cache.lib b/library/SubcircuitLibrary/TL072/TL072-cache.lib
new file mode 100644
index 00000000..f35727ea
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072-cache.lib
@@ -0,0 +1,144 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_CP1
+#
+DEF eSim_CP1 C 0 10 N N 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_CP1" 25 -100 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS capacitor_polarised
+$FPLIST
+ CP_*
+$ENDFPLIST
+DRAW
+A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
+P 2 0 1 20 -80 30 80 30 N
+P 2 0 1 0 -70 90 -30 90 N
+P 2 0 1 0 -50 70 -50 110 N
+X ~ 1 0 150 110 D 50 50 1 1 P
+X ~ 2 0 -150 130 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PJF
+#
+DEF eSim_PJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_PJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_p
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 -45 0 -5 15 -5 -15 -45 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# zener
+#
+DEF zener U 0 40 Y Y 1 F N
+F0 "U" -50 -100 60 H V C CNN
+F1 "zener" 0 100 60 H V C CNN
+F2 "" 50 0 60 H V C CNN
+F3 "" 50 0 60 H V C CNN
+DRAW
+P 2 0 1 0 100 -50 50 -100 N
+P 2 0 1 0 100 50 100 -50 N
+P 2 0 1 0 100 50 150 100 N
+P 4 0 1 0 0 50 0 -50 100 0 0 50 N
+X ~ IN -200 0 200 R 50 43 1 1 I
+X ~ OUT 300 0 200 L 50 43 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/TL072/TL072.cir b/library/SubcircuitLibrary/TL072/TL072.cir
new file mode 100644
index 00000000..6d38774f
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072.cir
@@ -0,0 +1,70 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\TL072\TL072.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 3/14/2025 8:54:06 PM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+J1 Net-_J1-Pad1_ ? Net-_J1-Pad3_ jfet_p
+J2 Net-_J1-Pad1_ ? Net-_C1-Pad1_ jfet_p
+Q3 Net-_J1-Pad1_ Net-_Q12-Pad2_ Net-_Q3-Pad3_ eSim_PNP
+R3 Vcc Net-_Q3-Pad3_ 30R
+Q1 Net-_J1-Pad3_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN
+Q4 Net-_C1-Pad1_ Net-_Q1-Pad2_ Net-_Q4-Pad3_ eSim_NPN
+Q2 Vcc Net-_J1-Pad3_ Net-_Q1-Pad2_ eSim_NPN
+Q5 Vcc Net-_C1-Pad1_ Net-_Q5-Pad3_ eSim_NPN
+R1 Net-_Q1-Pad3_ Vee 1kR
+R4 Net-_Q4-Pad3_ Vee 1kR
+R2 Net-_Q1-Pad2_ Vee 50kR
+R5 Net-_Q5-Pad3_ Vee 50kR
+D1 Net-_C1-Pad1_ Net-_C1-Pad2_ eSim_Diode
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 18pF
+Q7 Vcc Net-_Q12-Pad2_ Net-_Q10-Pad2_ eSim_PNP
+Q12 Vcc Net-_Q12-Pad2_ Net-_Q12-Pad2_ eSim_PNP
+Q6 Net-_Q10-Pad2_ Net-_Q10-Pad2_ Net-_Q6-Pad3_ eSim_NPN
+Q10 Vcc Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN
+Q9 Net-_Q10-Pad2_ Net-_Q6-Pad3_ Net-_C1-Pad2_ eSim_NPN
+R8 Net-_Q10-Pad3_ Net-_R10-Pad1_ 100R
+R9 Net-_R10-Pad1_ Net-_Q11-Pad1_ 100R
+Q11 Net-_Q11-Pad1_ Net-_C1-Pad2_ Vee eSim_PNP
+Q8 Net-_C1-Pad2_ Net-_Q5-Pad3_ Net-_Q8-Pad3_ eSim_NPN
+R7 Net-_Q8-Pad3_ Vee 100R
+Q13 Net-_Q12-Pad2_ Net-_J3-Pad3_ Net-_Q13-Pad3_ eSim_NPN
+R11 Net-_Q13-Pad3_ Vee 5kR
+U1 Vee Net-_J3-Pad3_ zener
+R10 Net-_R10-Pad1_ ? 200R
+R6 Net-_Q6-Pad3_ Net-_C1-Pad2_ 100R
+J3 Vcc Vcc Net-_J3-Pad3_ jfet_p
+J4 Net-_J4-Pad1_ ? Net-_J4-Pad3_ jfet_p
+J5 Net-_J4-Pad1_ ? Net-_C2-Pad1_ jfet_p
+Q16 Net-_J4-Pad1_ Net-_Q16-Pad2_ Net-_Q16-Pad3_ eSim_PNP
+R14 Vcc Net-_Q16-Pad3_ 30R
+Q14 Net-_J4-Pad3_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN
+Q17 Net-_C2-Pad1_ Net-_Q14-Pad2_ Net-_Q17-Pad3_ eSim_NPN
+Q15 Vcc Net-_J4-Pad3_ Net-_Q14-Pad2_ eSim_NPN
+Q18 Vcc Net-_C2-Pad1_ Net-_Q18-Pad3_ eSim_NPN
+R12 Net-_Q14-Pad3_ Vee 1kR
+R15 Net-_Q17-Pad3_ Vee 1kR
+R13 Net-_Q14-Pad2_ Vee 50kR
+R16 Net-_Q18-Pad3_ Vee 50kR
+D2 Net-_C2-Pad1_ Net-_C2-Pad2_ eSim_Diode
+C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 18pF
+Q20 Vcc Net-_Q16-Pad2_ Net-_Q19-Pad1_ eSim_PNP
+Q25 Vcc Net-_Q16-Pad2_ Net-_Q16-Pad2_ eSim_PNP
+Q19 Net-_Q19-Pad1_ Net-_Q19-Pad1_ Net-_Q19-Pad3_ eSim_NPN
+Q23 Vcc Net-_Q19-Pad1_ Net-_Q23-Pad3_ eSim_NPN
+Q22 Net-_Q19-Pad1_ Net-_Q19-Pad3_ Net-_C2-Pad2_ eSim_NPN
+R19 Net-_Q23-Pad3_ Net-_R19-Pad2_ 100R
+R20 Net-_R19-Pad2_ Net-_Q24-Pad1_ 100R
+Q24 Net-_Q24-Pad1_ Net-_C2-Pad2_ Vee eSim_PNP
+Q21 Net-_C2-Pad2_ Net-_Q18-Pad3_ Net-_Q21-Pad3_ eSim_NPN
+R18 Net-_Q21-Pad3_ Vee 100R
+Q26 Net-_Q16-Pad2_ Net-_J6-Pad3_ Net-_Q26-Pad3_ eSim_NPN
+R22 Net-_Q26-Pad3_ Vee 5kR
+U2 Vee Net-_J6-Pad3_ zener
+R21 Net-_R19-Pad2_ ? 200R
+R17 Net-_Q19-Pad3_ Net-_C2-Pad2_ 100R
+J6 Vcc Vcc Net-_J6-Pad3_ jfet_p
+
+.end
diff --git a/library/SubcircuitLibrary/TL072/TL072.cir.out b/library/SubcircuitLibrary/TL072/TL072.cir.out
new file mode 100644
index 00000000..e043813c
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072.cir.out
@@ -0,0 +1,80 @@
+* c:\fossee\esim\library\subcircuitlibrary\tl072\tl072.cir
+
+.include NPN.lib
+.include PNP.lib
+.include PJF.lib
+.include D.lib
+j1 net-_j1-pad1_ vin11 net-_j1-pad3_ J2N3820
+j2 net-_j1-pad1_ vin12 net-_c1-pad1_ J2N3820
+q3 net-_j1-pad1_ net-_q12-pad2_ net-_q3-pad3_ Q2N2907A
+r3 vcc net-_q3-pad3_ 30r
+q1 net-_j1-pad3_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+q4 net-_c1-pad1_ net-_q1-pad2_ net-_q4-pad3_ Q2N2222
+q2 vcc net-_j1-pad3_ net-_q1-pad2_ Q2N2222
+q5 vcc net-_c1-pad1_ net-_q5-pad3_ Q2N2222
+r1 net-_q1-pad3_ vee 1kr
+r4 net-_q4-pad3_ vee 1kr
+r2 net-_q1-pad2_ vee 50kr
+r5 net-_q5-pad3_ vee 50kr
+d1 net-_c1-pad1_ net-_c1-pad2_ 1N4148
+c1 net-_c1-pad1_ net-_c1-pad2_ 18pf
+q7 vcc net-_q12-pad2_ net-_q10-pad2_ Q2N2907A
+q12 vcc net-_q12-pad2_ net-_q12-pad2_ Q2N2907A
+q6 net-_q10-pad2_ net-_q10-pad2_ net-_q6-pad3_ Q2N2222
+q10 vcc net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+q9 net-_q10-pad2_ net-_q6-pad3_ net-_c1-pad2_ Q2N2222
+r8 net-_q10-pad3_ net-_r10-pad1_ 100r
+r9 net-_r10-pad1_ net-_q11-pad1_ 100r
+q11 net-_q11-pad1_ net-_c1-pad2_ vee Q2N2907A
+q8 net-_c1-pad2_ net-_q5-pad3_ net-_q8-pad3_ Q2N2222
+r7 net-_q8-pad3_ vee 100r
+q13 net-_q12-pad2_ net-_j3-pad3_ net-_q13-pad3_ Q2N2222
+r11 net-_q13-pad3_ vee 5kr
+* u1 vee net-_j3-pad3_ zener
+r10 net-_r10-pad1_ vout1 200r
+r6 net-_q6-pad3_ net-_c1-pad2_ 100r
+j3 vcc vcc net-_j3-pad3_ J2N3820
+j4 net-_j4-pad1_ vin21 net-_j4-pad3_ J2N3820
+j5 net-_j4-pad1_ vin22 net-_c2-pad1_ J2N3820
+q16 net-_j4-pad1_ net-_q16-pad2_ net-_q16-pad3_ Q2N2907A
+r14 vcc net-_q16-pad3_ 30r
+q14 net-_j4-pad3_ net-_q14-pad2_ net-_q14-pad3_ Q2N2222
+q17 net-_c2-pad1_ net-_q14-pad2_ net-_q17-pad3_ Q2N2222
+q15 vcc net-_j4-pad3_ net-_q14-pad2_ Q2N2222
+q18 vcc net-_c2-pad1_ net-_q18-pad3_ Q2N2222
+r12 net-_q14-pad3_ vee 1kr
+r15 net-_q17-pad3_ vee 1kr
+r13 net-_q14-pad2_ vee 50kr
+r16 net-_q18-pad3_ vee 50kr
+d2 net-_c2-pad1_ net-_c2-pad2_ 1N4148
+c2 net-_c2-pad1_ net-_c2-pad2_ 18pf
+q20 vcc net-_q16-pad2_ net-_q19-pad1_ Q2N2907A
+q25 vcc net-_q16-pad2_ net-_q16-pad2_ Q2N2907A
+q19 net-_q19-pad1_ net-_q19-pad1_ net-_q19-pad3_ Q2N2222
+q23 vcc net-_q19-pad1_ net-_q23-pad3_ Q2N2222
+q22 net-_q19-pad1_ net-_q19-pad3_ net-_c2-pad2_ Q2N2222
+r19 net-_q23-pad3_ net-_r19-pad2_ 100r
+r20 net-_r19-pad2_ net-_q24-pad1_ 100r
+q24 net-_q24-pad1_ net-_c2-pad2_ vee Q2N2907A
+q21 net-_c2-pad2_ net-_q18-pad3_ net-_q21-pad3_ Q2N2222
+r18 net-_q21-pad3_ vee 100r
+q26 net-_q16-pad2_ net-_j6-pad3_ net-_q26-pad3_ Q2N2222
+r22 net-_q26-pad3_ vee 5kr
+* u2 vee net-_j6-pad3_ zener
+r21 net-_r19-pad2_ vout2 200r
+r17 net-_q19-pad3_ net-_c2-pad2_ 100r
+j6 vcc vcc net-_j6-pad3_ J2N3820
+a1 vee net-_j3-pad3_ u1
+a2 vee net-_j6-pad3_ u2
+* Schematic Name: zener, NgSpice Name: zener
+.model u1 zener(v_breakdown=6 i_breakdown=2.0e-6 i_sat=1.0e-12 n_forward=1 limit_switch=TRUE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u2 zener(v_breakdown=6 i_breakdown=2.0e-6 i_sat=1.0e-12 n_forward=1 limit_switch=TRUE )
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/TL072/TL072.pro b/library/SubcircuitLibrary/TL072/TL072.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/TL072/TL072.sch b/library/SubcircuitLibrary/TL072/TL072.sch
new file mode 100644
index 00000000..0bbf6310
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072.sch
@@ -0,0 +1,1079 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:TL071-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
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+Comment2 ""
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+$EndComp
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+ -1 0 0 1
+$EndComp
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+P 7000 1850
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+$EndComp
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+P 5250 5100
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+$EndComp
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+U 1 1 67D449CC
+P 7250 4100
+F 0 "Q13" H 7150 4150 50 0000 R CNN
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+$EndComp
+$Comp
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+U 1 1 67D449CD
+P 7100 4750
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+ 1 7100 4750
+ 0 1 1 0
+$EndComp
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+U 1 1 67D449CE
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+ 1 7600 4900
+ 0 -1 -1 0
+$EndComp
+$Comp
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+U 1 1 67D449CF
+P 6750 3300
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+ 1 6750 3300
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+$EndComp
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Connection ~ 7150 5500
+Wire Wire Line
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+Connection ~ 7600 1350
+Text GLabel 8450 3050 2 60 Input ~ 0
+Vout1
+Text GLabel 1650 3250 0 60 Input ~ 0
+V11
+Text GLabel 1650 2850 0 60 Input ~ 0
+V12
+Text GLabel 1750 1350 0 60 Input ~ 0
+Vcc
+Connection ~ 2800 1350
+Text GLabel 1400 5500 0 60 Input ~ 0
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+Connection ~ 3250 3900
+$Comp
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+U 1 1 67D449D0
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+$EndComp
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+U 1 1 67D449D1
+P 7700 3400
+F 0 "J3" H 7600 3450 50 0000 R CNN
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+U 1 1 67D45485
+P 10650 3050
+F 0 "J4" H 10550 3100 50 0000 R CNN
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+ 1 10650 3050
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+U 1 1 67D4548B
+P 11850 3050
+F 0 "J5" H 11750 3100 50 0000 R CNN
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+F 2 "" H 12050 3150 29 0000 C CNN
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+ 1 11850 3050
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+U 1 1 67D45491
+P 11400 2200
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+ 1 11400 2200
+ -1 0 0 1
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+U 1 1 67D45497
+P 11250 1550
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+F 3 "" V 11300 1600 30 0000 C CNN
+ 1 11250 1550
+ 0 1 1 0
+$EndComp
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+U 1 1 67D4549D
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+U 1 1 67D454A3
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+U 1 1 67D454A9
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+$EndComp
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+U 1 1 67D454AF
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+$EndComp
+$Comp
+L resistor R12
+U 1 1 67D454B5
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+$EndComp
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+U 1 1 67D454BB
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+U 1 1 67D454C1
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+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R16
+U 1 1 67D454C7
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+ 0 1 1 0
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+U 1 1 67D454CD
+P 12300 3350
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+F 2 "" H 12300 3350 60 0000 C CNN
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+ 1 12300 3350
+ 1 0 0 -1
+$EndComp
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+L capacitor_polarised C2
+U 1 1 67D454D3
+P 12300 3700
+F 0 "C2" H 12325 3800 50 0000 L CNN
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+F 3 "" H 12300 3700 50 0001 C CNN
+ 1 12300 3700
+ 0 -1 -1 0
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+U 1 1 67D454D9
+P 13700 1650
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+F 2 "" H 13900 1750 29 0000 C CNN
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+ 1 13700 1650
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+L eSim_PNP Q25
+U 1 1 67D454DF
+P 15500 1650
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+U 1 1 67D454E5
+P 13600 2550
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+U 1 1 67D454EB
+P 14900 2300
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+U 1 1 67D454F1
+P 13750 3150
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+$EndComp
+$Comp
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+U 1 1 67D454F7
+P 14950 2750
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+ 0 1 1 0
+$EndComp
+$Comp
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+U 1 1 67D454FD
+P 14950 3250
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+ 0 1 1 0
+$EndComp
+$Comp
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+U 1 1 67D45503
+P 14900 3850
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+U 1 1 67D45509
+P 13700 4400
+F 0 "Q21" H 13600 4450 50 0000 R CNN
+F 1 "eSim_NPN" H 13650 4550 50 0000 R CNN
+F 2 "" H 13900 4500 29 0000 C CNN
+F 3 "" H 13700 4400 60 0000 C CNN
+ 1 13700 4400
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R18
+U 1 1 67D4550F
+P 13750 4900
+F 0 "R18" H 13800 5030 50 0000 C CNN
+F 1 "100R" H 13800 4850 50 0000 C CNN
+F 2 "" H 13800 4880 30 0000 C CNN
+F 3 "" V 13800 4950 30 0000 C CNN
+ 1 13750 4900
+ 0 1 1 0
+$EndComp
+Wire Wire Line
+ 11300 1750 11300 2000
+Wire Wire Line
+ 10750 2850 10750 2700
+Wire Wire Line
+ 10750 2700 11750 2700
+Wire Wire Line
+ 11750 2700 11750 2850
+Wire Wire Line
+ 11300 2400 11300 2700
+Connection ~ 11300 2700
+Wire Wire Line
+ 10750 3250 10750 4350
+Wire Wire Line
+ 11750 3250 11750 4350
+Wire Wire Line
+ 11250 3950 11250 3900
+Wire Wire Line
+ 11250 3900 12850 3900
+Wire Wire Line
+ 11050 4550 11450 4550
+Wire Wire Line
+ 11250 4350 11250 4700
+Connection ~ 11250 4550
+Wire Wire Line
+ 10950 4150 10750 4150
+Connection ~ 10750 4150
+Wire Wire Line
+ 12100 4100 11750 4100
+Connection ~ 11750 4100
+Wire Wire Line
+ 12400 4300 12400 4650
+Wire Wire Line
+ 11750 4750 11750 5000
+Wire Wire Line
+ 12450 3350 12450 3700
+Wire Wire Line
+ 12150 3350 11750 3350
+Connection ~ 11750 3350
+Wire Wire Line
+ 10750 4750 10750 5000
+Wire Wire Line
+ 9900 5300 16100 5300
+Wire Wire Line
+ 11250 5000 11250 5300
+Connection ~ 11250 5300
+Wire Wire Line
+ 12400 5300 12400 4950
+Connection ~ 11750 5300
+Wire Wire Line
+ 15000 2500 15000 2650
+Wire Wire Line
+ 15000 2950 15000 3150
+Wire Wire Line
+ 15000 3450 15000 3650
+Wire Wire Line
+ 13800 1450 13800 1150
+Wire Wire Line
+ 15600 1150 15600 1450
+Wire Wire Line
+ 11600 2200 12750 2200
+Wire Wire Line
+ 12750 2200 12750 1950
+Wire Wire Line
+ 12750 1950 15650 1950
+Wire Wire Line
+ 15600 1950 15600 1850
+Wire Wire Line
+ 15300 1650 15300 1950
+Connection ~ 15300 1950
+Wire Wire Line
+ 13500 1650 13500 1950
+Connection ~ 13500 1950
+Wire Wire Line
+ 15000 2100 15000 1150
+Connection ~ 15000 1150
+Wire Wire Line
+ 13800 1850 13800 2950
+Wire Wire Line
+ 13500 2350 13500 2250
+Wire Wire Line
+ 13500 2250 13800 2250
+Connection ~ 13800 2250
+Wire Wire Line
+ 13500 2750 13500 3400
+Wire Wire Line
+ 13500 3150 13550 3150
+Wire Wire Line
+ 13800 2950 13850 2950
+Connection ~ 13800 2550
+Wire Wire Line
+ 14700 2300 13800 2300
+Connection ~ 13800 2300
+Wire Wire Line
+ 13100 3850 14700 3850
+Wire Wire Line
+ 13850 3850 13850 3350
+Wire Wire Line
+ 13800 3850 13800 4200
+Connection ~ 13850 3850
+Wire Wire Line
+ 13800 4600 13800 4800
+Wire Wire Line
+ 13800 5300 13800 5100
+Connection ~ 12400 5300
+Wire Wire Line
+ 13500 4400 12400 4400
+Connection ~ 12400 4400
+Wire Wire Line
+ 15000 5300 15000 4050
+Connection ~ 13800 5300
+Wire Wire Line
+ 11300 1450 11300 1150
+Connection ~ 13800 1150
+$Comp
+L eSim_NPN Q26
+U 1 1 67D45557
+P 15750 3900
+F 0 "Q26" H 15650 3950 50 0000 R CNN
+F 1 "eSim_NPN" H 15700 4050 50 0000 R CNN
+F 2 "" H 15950 4000 29 0000 C CNN
+F 3 "" H 15750 3900 60 0000 C CNN
+ 1 15750 3900
+ -1 0 0 -1
+$EndComp
+$Comp
+L resistor R22
+U 1 1 67D4555D
+P 15600 4550
+F 0 "R22" H 15650 4680 50 0000 C CNN
+F 1 "5kR" H 15650 4500 50 0000 C CNN
+F 2 "" H 15650 4530 30 0000 C CNN
+F 3 "" V 15650 4600 30 0000 C CNN
+ 1 15600 4550
+ 0 1 1 0
+$EndComp
+$Comp
+L zener U2
+U 1 1 67D45563
+P 16100 4700
+F 0 "U2" H 16050 4600 60 0000 C CNN
+F 1 "zener" H 16100 4800 60 0000 C CNN
+F 2 "" H 16150 4700 60 0000 C CNN
+F 3 "" H 16150 4700 60 0000 C CNN
+ 1 16100 4700
+ 0 -1 -1 0
+$EndComp
+$Comp
+L resistor R21
+U 1 1 67D45569
+P 15250 3100
+F 0 "R21" H 15300 3230 50 0000 C CNN
+F 1 "200R" H 15300 3050 50 0000 C CNN
+F 2 "" H 15300 3080 30 0000 C CNN
+F 3 "" V 15300 3150 30 0000 C CNN
+ 1 15250 3100
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 15150 3050 15000 3050
+Connection ~ 15000 3050
+Wire Wire Line
+ 15650 1950 15650 3700
+Connection ~ 15600 1950
+Wire Wire Line
+ 15650 4100 15650 4450
+Wire Wire Line
+ 15650 5300 15650 4750
+Connection ~ 15000 5300
+Wire Wire Line
+ 16100 3400 16100 4400
+Wire Wire Line
+ 15950 3900 16100 3900
+Connection ~ 16100 3900
+Wire Wire Line
+ 16100 5300 16100 4900
+Connection ~ 15650 5300
+Wire Wire Line
+ 16100 1150 16100 3000
+Connection ~ 15600 1150
+Connection ~ 16100 1150
+Text GLabel 16950 2850 2 60 Input ~ 0
+Vout2
+Text GLabel 10150 3050 0 60 Input ~ 0
+V21
+Text GLabel 10150 2650 0 60 Input ~ 0
+V22
+Text GLabel 10250 1150 0 60 Input ~ 0
+Vcc
+Connection ~ 11300 1150
+Text GLabel 9900 5300 0 60 Input ~ 0
+Vee
+Connection ~ 10750 5300
+Wire Wire Line
+ 12150 3700 11750 3700
+Connection ~ 11750 3700
+$Comp
+L resistor R17
+U 1 1 67D4558F
+P 13450 3500
+F 0 "R17" H 13500 3630 50 0000 C CNN
+F 1 "100R" H 13500 3450 50 0000 C CNN
+F 2 "" H 13500 3480 30 0000 C CNN
+F 3 "" V 13500 3550 30 0000 C CNN
+ 1 13450 3500
+ 0 1 1 0
+$EndComp
+Connection ~ 13500 3150
+Wire Wire Line
+ 13500 3700 13500 3850
+Connection ~ 13800 3850
+Wire Wire Line
+ 12450 3350 13100 3350
+Wire Wire Line
+ 13100 3350 13100 3850
+Connection ~ 13500 3850
+Wire Wire Line
+ 12850 3900 12850 1150
+Connection ~ 12850 1150
+Connection ~ 12400 3900
+Wire Wire Line
+ 10150 2650 12050 2650
+Wire Wire Line
+ 12050 2650 12050 3050
+Wire Wire Line
+ 10450 3050 10150 3050
+Wire Wire Line
+ 16950 2850 15450 2850
+Wire Wire Line
+ 15450 2850 15450 3050
+Wire Wire Line
+ 10250 1150 16500 1150
+Wire Wire Line
+ 16500 3200 16400 3200
+Wire Wire Line
+ 16500 1150 16500 3200
+$Comp
+L jfet_p J6
+U 1 1 67D455A6
+P 16200 3200
+F 0 "J6" H 16100 3250 50 0000 R CNN
+F 1 "jfet_p" H 16150 3350 50 0000 R CNN
+F 2 "" H 16400 3300 29 0000 C CNN
+F 3 "" H 16200 3200 60 0000 C CNN
+ 1 16200 3200
+ -1 0 0 -1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/TL072/TL072.sub b/library/SubcircuitLibrary/TL072/TL072.sub
new file mode 100644
index 00000000..e894b2c1
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072.sub
@@ -0,0 +1,74 @@
+* Subcircuit TL072
+* c:\fossee\esim\library\subcircuitlibrary\tl072\tl072.sub
+.subckt TL072 vout1 vin11 vin12 vee vin22 vin21 vout2 vcc
+.include NPN.lib
+.include PNP.lib
+.include PJF.lib
+.include D.lib
+j1 net-_j1-pad1_ vin11 net-_j1-pad3_ J2N3820
+j2 net-_j1-pad1_ vin12 net-_c1-pad1_ J2N3820
+q3 net-_j1-pad1_ net-_q12-pad2_ net-_q3-pad3_ Q2N2907A
+r3 vcc net-_q3-pad3_ 30r
+q1 net-_j1-pad3_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222
+q4 net-_c1-pad1_ net-_q1-pad2_ net-_q4-pad3_ Q2N2222
+q2 vcc net-_j1-pad3_ net-_q1-pad2_ Q2N2222
+q5 vcc net-_c1-pad1_ net-_q5-pad3_ Q2N2222
+r1 net-_q1-pad3_ vee 1kr
+r4 net-_q4-pad3_ vee 1kr
+r2 net-_q1-pad2_ vee 50kr
+r5 net-_q5-pad3_ vee 50kr
+d1 net-_c1-pad1_ net-_c1-pad2_ 1N4148
+c1 net-_c1-pad1_ net-_c1-pad2_ 18pf
+q7 vcc net-_q12-pad2_ net-_q10-pad2_ Q2N2907A
+q12 vcc net-_q12-pad2_ net-_q12-pad2_ Q2N2907A
+q6 net-_q10-pad2_ net-_q10-pad2_ net-_q6-pad3_ Q2N2222
+q10 vcc net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+q9 net-_q10-pad2_ net-_q6-pad3_ net-_c1-pad2_ Q2N2222
+r8 net-_q10-pad3_ net-_r10-pad1_ 100r
+r9 net-_r10-pad1_ net-_q11-pad1_ 100r
+q11 net-_q11-pad1_ net-_c1-pad2_ vee Q2N2907A
+q8 net-_c1-pad2_ net-_q5-pad3_ net-_q8-pad3_ Q2N2222
+r7 net-_q8-pad3_ vee 100r
+q13 net-_q12-pad2_ net-_j3-pad3_ net-_q13-pad3_ Q2N2222
+r11 net-_q13-pad3_ vee 5kr
+* u1 vee net-_j3-pad3_ zener
+r10 net-_r10-pad1_ vout1 200r
+r6 net-_q6-pad3_ net-_c1-pad2_ 100r
+j3 vcc vcc net-_j3-pad3_ J2N3820
+j4 net-_j4-pad1_ vin21 net-_j4-pad3_ J2N3820
+j5 net-_j4-pad1_ vin22 net-_c2-pad1_ J2N3820
+q16 net-_j4-pad1_ net-_q16-pad2_ net-_q16-pad3_ Q2N2907A
+r14 vcc net-_q16-pad3_ 30r
+q14 net-_j4-pad3_ net-_q14-pad2_ net-_q14-pad3_ Q2N2222
+q17 net-_c2-pad1_ net-_q14-pad2_ net-_q17-pad3_ Q2N2222
+q15 vcc net-_j4-pad3_ net-_q14-pad2_ Q2N2222
+q18 vcc net-_c2-pad1_ net-_q18-pad3_ Q2N2222
+r12 net-_q14-pad3_ vee 1kr
+r15 net-_q17-pad3_ vee 1kr
+r13 net-_q14-pad2_ vee 50kr
+r16 net-_q18-pad3_ vee 50kr
+d2 net-_c2-pad1_ net-_c2-pad2_ 1N4148
+c2 net-_c2-pad1_ net-_c2-pad2_ 18pf
+q20 vcc net-_q16-pad2_ net-_q19-pad1_ Q2N2907A
+q25 vcc net-_q16-pad2_ net-_q16-pad2_ Q2N2907A
+q19 net-_q19-pad1_ net-_q19-pad1_ net-_q19-pad3_ Q2N2222
+q23 vcc net-_q19-pad1_ net-_q23-pad3_ Q2N2222
+q22 net-_q19-pad1_ net-_q19-pad3_ net-_c2-pad2_ Q2N2222
+r19 net-_q23-pad3_ net-_r19-pad2_ 100r
+r20 net-_r19-pad2_ net-_q24-pad1_ 100r
+q24 net-_q24-pad1_ net-_c2-pad2_ vee Q2N2907A
+q21 net-_c2-pad2_ net-_q18-pad3_ net-_q21-pad3_ Q2N2222
+r18 net-_q21-pad3_ vee 100r
+q26 net-_q16-pad2_ net-_j6-pad3_ net-_q26-pad3_ Q2N2222
+r22 net-_q26-pad3_ vee 5kr
+* u2 vee net-_j6-pad3_ zener
+r21 net-_r19-pad2_ vout2 200r
+r17 net-_q19-pad3_ net-_c2-pad2_ 100r
+j6 vcc vcc net-_j6-pad3_ J2N3820
+a1 vee net-_j3-pad3_ u1
+a2 vee net-_j6-pad3_ u2
+* Schematic Name: zener, NgSpice Name: zener
+.model u1 zener(v_breakdown=6 i_breakdown=2.0e-6 i_sat=1.0e-12 n_forward=1 limit_switch=TRUE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u2 zener(v_breakdown=6 i_breakdown=2.0e-6 i_sat=1.0e-12 n_forward=1 limit_switch=TRUE )
+.ends TL072 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/TL072/TL072_Previous_Values.xml b/library/SubcircuitLibrary/TL072/TL072_Previous_Values.xml
new file mode 100644
index 00000000..d69bed0e
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/TL072_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis><source /><model><u1 name="type">zener<field1 name="Enter Breakdown Voltage (default=5.6)">6</field1><field2 name="Enter Breakdown Current (default=2.0e-2)">2.0e-6</field2><field3 name="Enter Saturation Current (default=1.0e-12)">1.0e-12</field3><field4 name="Enter Forward Emission Coefficient (default=1.0)">1</field4><field5 name="Enter Switch for Limiting (default=FALSE)">TRUE</field5></u1><u2 name="type">zener<field6 name="Enter Breakdown Voltage (default=5.6)">6</field6><field7 name="Enter Breakdown Current (default=2.0e-2)">2.0e-6</field7><field8 name="Enter Saturation Current (default=1.0e-12)">1.0e-12</field8><field9 name="Enter Forward Emission Coefficient (default=1.0)">1</field9><field10 name="Enter Switch for Limiting (default=FALSE)">TRUE</field10></u2></model><devicemodel><j1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j1><j2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q7><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q11><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><j3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j3><j4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j4><j5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j5><q16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q16><q14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q14><q17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q17><q15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q15><q18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q18><d2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><q20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q20><q25><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q25><q19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q19><q23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q23><q22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q22><q24><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q24><q21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q21><q26><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q26><j6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j6></devicemodel><subcircuit /></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/TL072/analysis b/library/SubcircuitLibrary/TL072/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/TL072/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
generated by cgit (git 2.34.1) at 2025-06-30 15:40:18 +0000