DM74185A - BINARY TO BCD CONVERTER

33 files changed, 3332 insertions, 0 deletions

diff --git a/library/SubcircuitLibrary/DM74185A/3_and-cache.lib b/library/SubcircuitLibrary/DM74185A/3_and-cache.lib
new file mode 100644
index 00000000..af058641
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and-cache.lib
@@ -0,0 +1,61 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM74185A/3_and.cir b/library/SubcircuitLibrary/DM74185A/3_and.cir
new file mode 100644
index 00000000..ba296cf0
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and.cir
@@ -0,0 +1,13 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and		
+U3  Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/3_and.cir.out b/library/SubcircuitLibrary/DM74185A/3_and.cir.out
new file mode 100644
index 00000000..d7cf79a0
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and.cir.out
@@ -0,0 +1,20 @@
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+
+* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/3_and.pro b/library/SubcircuitLibrary/DM74185A/3_and.pro
new file mode 100644
index 00000000..00597a5a
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and.pro
@@ -0,0 +1,43 @@
+update=05/31/19 15:26:09
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Plot
+LibName7=eSim_Power
+LibName8=eSim_User
+LibName9=eSim_Sources
+LibName10=eSim_Subckt
diff --git a/library/SubcircuitLibrary/DM74185A/3_and.sch b/library/SubcircuitLibrary/DM74185A/3_and.sch
new file mode 100644
index 00000000..d6ac89f9
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and.sch
@@ -0,0 +1,130 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:3_and-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_and U2
+U 1 1 5C9A24D8
+P 4250 2700
+F 0 "U2" H 4250 2700 60  0000 C CNN
+F 1 "d_and" H 4300 2800 60  0000 C CNN
+F 2 "" H 4250 2700 60  0000 C CNN
+F 3 "" H 4250 2700 60  0000 C CNN
+	1    4250 2700
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_and U3
+U 1 1 5C9A2538
+P 5150 2900
+F 0 "U3" H 5150 2900 60  0000 C CNN
+F 1 "d_and" H 5200 3000 60  0000 C CNN
+F 2 "" H 5150 2900 60  0000 C CNN
+F 3 "" H 5150 2900 60  0000 C CNN
+	1    5150 2900
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 5C9A259A
+P 3050 2600
+F 0 "U1" H 3100 2700 30  0000 C CNN
+F 1 "PORT" H 3050 2600 30  0000 C CNN
+F 2 "" H 3050 2600 60  0000 C CNN
+F 3 "" H 3050 2600 60  0000 C CNN
+	1    3050 2600
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9A25D9
+P 3050 2800
+F 0 "U1" H 3100 2900 30  0000 C CNN
+F 1 "PORT" H 3050 2800 30  0000 C CNN
+F 2 "" H 3050 2800 60  0000 C CNN
+F 3 "" H 3050 2800 60  0000 C CNN
+	2    3050 2800
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5C9A260A
+P 3050 3100
+F 0 "U1" H 3100 3200 30  0000 C CNN
+F 1 "PORT" H 3050 3100 30  0000 C CNN
+F 2 "" H 3050 3100 60  0000 C CNN
+F 3 "" H 3050 3100 60  0000 C CNN
+	3    3050 3100
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5C9A2637
+P 6900 2850
+F 0 "U1" H 6950 2950 30  0000 C CNN
+F 1 "PORT" H 6900 2850 30  0000 C CNN
+F 2 "" H 6900 2850 60  0000 C CNN
+F 3 "" H 6900 2850 60  0000 C CNN
+	4    6900 2850
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	4700 2650 4700 2800
+Wire Wire Line
+	5600 2850 6650 2850
+Wire Wire Line
+	3800 2600 3300 2600
+Wire Wire Line
+	3800 2700 3300 2700
+Wire Wire Line
+	3300 2700 3300 2800
+Wire Wire Line
+	3300 3100 4700 3100
+Wire Wire Line
+	4700 3100 4700 2900
+Text Notes 3500 2600 0    60   ~ 12
+in1
+Text Notes 3450 2800 0    60   ~ 12
+in2\n
+Text Notes 3500 3100 0    60   ~ 12
+in3
+Text Notes 6100 2850 0    60   ~ 12
+out
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/DM74185A/3_and.sub b/library/SubcircuitLibrary/DM74185A/3_and.sub
new file mode 100644
index 00000000..3d9120bb
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and.sub
@@ -0,0 +1,14 @@
+* Subcircuit 3_and
+.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ 
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3  net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 3_and
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/3_and_Previous_Values.xml b/library/SubcircuitLibrary/DM74185A/3_and_Previous_Values.xml
new file mode 100644
index 00000000..abc5faaa
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/3_and_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR-cache.lib b/library/SubcircuitLibrary/DM74185A/4_OR-cache.lib
new file mode 100644
index 00000000..155f5e60
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR-cache.lib
@@ -0,0 +1,63 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_or
+#
+DEF d_or U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_or" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
+A -25 -124 325 574 323 0 1 0 N 150 150 250 50
+A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
+P 2 0 1 0  -250 -50  150 -50 N
+P 2 0 1 0  -250 150  150 150 N
+X IN1 1 -450 100 215 R 50 50 1 1 I
+X IN2 2 -450 0 215 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR.cir b/library/SubcircuitLibrary/DM74185A/4_OR.cir
new file mode 100644
index 00000000..b338b7b5
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR.cir
@@ -0,0 +1,14 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\4_OR\4_OR.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/28/19 22:47:12
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_or		
+U3  Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U3-Pad3_ d_or		
+U4  Net-_U2-Pad3_ Net-_U3-Pad3_ Net-_U1-Pad5_ d_or		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR.cir.out b/library/SubcircuitLibrary/DM74185A/4_OR.cir.out
new file mode 100644
index 00000000..adb6b01b
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR.cir.out
@@ -0,0 +1,24 @@
+* c:\users\malli\esim\src\subcircuitlibrary\4_or\4_or.cir
+
+* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or
+* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or
+* u4  net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad5_ d_or
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ port
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3
+a3 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad5_ u4
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR.pro b/library/SubcircuitLibrary/DM74185A/4_OR.pro
new file mode 100644
index 00000000..881563eb
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR.pro
@@ -0,0 +1,44 @@
+update=06/01/19 12:36:09
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=power
+LibName2=eSim_Analog
+LibName3=eSim_Devices
+LibName4=eSim_Digital
+LibName5=eSim_Hybrid
+LibName6=eSim_Miscellaneous
+LibName7=eSim_Plot
+LibName8=eSim_Power
+LibName9=eSim_User
+LibName10=eSim_Sources
+LibName11=eSim_Subckt
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR.sch b/library/SubcircuitLibrary/DM74185A/4_OR.sch
new file mode 100644
index 00000000..11896865
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR.sch
@@ -0,0 +1,150 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_or U2
+U 1 1 5C9D00E1
+P 4300 2950
+F 0 "U2" H 4300 2950 60  0000 C CNN
+F 1 "d_or" H 4300 3050 60  0000 C CNN
+F 2 "" H 4300 2950 60  0000 C CNN
+F 3 "" H 4300 2950 60  0000 C CNN
+	1    4300 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_or U3
+U 1 1 5C9D011F
+P 4300 3350
+F 0 "U3" H 4300 3350 60  0000 C CNN
+F 1 "d_or" H 4300 3450 60  0000 C CNN
+F 2 "" H 4300 3350 60  0000 C CNN
+F 3 "" H 4300 3350 60  0000 C CNN
+	1    4300 3350
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_or U4
+U 1 1 5C9D0141
+P 5250 3150
+F 0 "U4" H 5250 3150 60  0000 C CNN
+F 1 "d_or" H 5250 3250 60  0000 C CNN
+F 2 "" H 5250 3150 60  0000 C CNN
+F 3 "" H 5250 3150 60  0000 C CNN
+	1    5250 3150
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	4800 3050 4800 2900
+Wire Wire Line
+	4800 2900 4750 2900
+Wire Wire Line
+	4800 3150 4800 3300
+Wire Wire Line
+	4800 3300 4750 3300
+Wire Wire Line
+	3350 2850 3850 2850
+Wire Wire Line
+	3850 2950 3600 2950
+Wire Wire Line
+	3850 3250 3350 3250
+Wire Wire Line
+	3600 2950 3600 3000
+Wire Wire Line
+	3600 3000 3350 3000
+Wire Wire Line
+	3850 3350 3850 3400
+Wire Wire Line
+	3850 3400 3350 3400
+Wire Wire Line
+	5700 3100 6200 3100
+$Comp
+L PORT U1
+U 1 1 5C9D01F4
+P 3100 2850
+F 0 "U1" H 3150 2950 30  0000 C CNN
+F 1 "PORT" H 3100 2850 30  0000 C CNN
+F 2 "" H 3100 2850 60  0000 C CNN
+F 3 "" H 3100 2850 60  0000 C CNN
+	1    3100 2850
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9D022F
+P 3100 3000
+F 0 "U1" H 3150 3100 30  0000 C CNN
+F 1 "PORT" H 3100 3000 30  0000 C CNN
+F 2 "" H 3100 3000 60  0000 C CNN
+F 3 "" H 3100 3000 60  0000 C CNN
+	2    3100 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5C9D0271
+P 3100 3250
+F 0 "U1" H 3150 3350 30  0000 C CNN
+F 1 "PORT" H 3100 3250 30  0000 C CNN
+F 2 "" H 3100 3250 60  0000 C CNN
+F 3 "" H 3100 3250 60  0000 C CNN
+	3    3100 3250
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5C9D0299
+P 3100 3400
+F 0 "U1" H 3150 3500 30  0000 C CNN
+F 1 "PORT" H 3100 3400 30  0000 C CNN
+F 2 "" H 3100 3400 60  0000 C CNN
+F 3 "" H 3100 3400 60  0000 C CNN
+	4    3100 3400
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 5C9D02C2
+P 6450 3100
+F 0 "U1" H 6500 3200 30  0000 C CNN
+F 1 "PORT" H 6450 3100 30  0000 C CNN
+F 2 "" H 6450 3100 60  0000 C CNN
+F 3 "" H 6450 3100 60  0000 C CNN
+	5    6450 3100
+	-1   0    0    1   
+$EndComp
+Text Notes 3450 2850 0    60   ~ 12
+in1
+Text Notes 3450 3000 0    60   ~ 12
+in2
+Text Notes 3450 3250 0    60   ~ 12
+in3
+Text Notes 3450 3400 0    60   ~ 12
+in4
+Text Notes 5800 3100 0    60   ~ 12
+out
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR.sub b/library/SubcircuitLibrary/DM74185A/4_OR.sub
new file mode 100644
index 00000000..d1fd3a24
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR.sub
@@ -0,0 +1,18 @@
+* Subcircuit 4_OR
+.subckt 4_OR net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ 
+* c:\users\malli\esim\src\subcircuitlibrary\4_or\4_or.cir
+* u2  net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or
+* u3  net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or
+* u4  net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad5_ d_or
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3
+a3 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad5_ u4
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 4_OR
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/4_OR_Previous_Values.xml b/library/SubcircuitLibrary/DM74185A/4_OR_Previous_Values.xml
new file mode 100644
index 00000000..0683d9eb
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_OR_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_or<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_or<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3><u4 name="type">d_or<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u4></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/4_and-cache.lib b/library/SubcircuitLibrary/DM74185A/4_and-cache.lib
new file mode 100644
index 00000000..60f1a83d
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and-cache.lib
@@ -0,0 +1,79 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and-RESCUE-4_and
+#
+DEF 3_and-RESCUE-4_and X 0 40 Y Y 1 F N
+F0 "X" 900 300 60 H V C CNN
+F1 "3_and-RESCUE-4_and" 950 500 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250
+P 2 0 1 0  650 550  1000 550 N
+P 3 0 1 0  650 550  650 250  1000 250 N
+X in1 1 450 500 200 R 50 50 1 1 I
+X in2 2 450 400 200 R 50 50 1 1 I
+X in3 3 450 300 200 R 50 50 1 1 I
+X out 4 1300 400 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0  150 -50  -250 -50  -250 150  150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM74185A/4_and-rescue.lib b/library/SubcircuitLibrary/DM74185A/4_and-rescue.lib
new file mode 100644
index 00000000..e3833051
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and-rescue.lib
@@ -0,0 +1,22 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and-RESCUE-4_and
+#
+DEF 3_and-RESCUE-4_and X 0 40 Y Y 1 F N
+F0 "X" 900 300 60 H V C CNN
+F1 "3_and-RESCUE-4_and" 950 500 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250
+P 2 0 1 0  650 550  1000 550 N
+P 3 0 1 0  650 550  650 250  1000 250 N
+X in1 1 450 500 200 R 50 50 1 1 I
+X in2 2 450 400 200 R 50 50 1 1 I
+X in3 3 450 300 200 R 50 50 1 1 I
+X out 4 1300 400 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM74185A/4_and.cir b/library/SubcircuitLibrary/DM74185A/4_and.cir
new file mode 100644
index 00000000..fdf2e107
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and.cir
@@ -0,0 +1,13 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\4_and\4_and.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/01/19 13:09:58
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U2-Pad1_ 3_and		
+U2  Net-_U2-Pad1_ Net-_U1-Pad4_ Net-_U1-Pad5_ d_and		
+U1  Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/4_and.cir.out b/library/SubcircuitLibrary/DM74185A/4_and.cir.out
new file mode 100644
index 00000000..f40e5bc6
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and.cir.out
@@ -0,0 +1,18 @@
+* c:\users\malli\esim\src\subcircuitlibrary\4_and\4_and.cir
+
+.include 3_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ 3_and
+* u2  net-_u2-pad1_ net-_u1-pad4_ net-_u1-pad5_ d_and
+* u1  net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ port
+a1 [net-_u2-pad1_ net-_u1-pad4_ ] net-_u1-pad5_ u2
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/4_and.pro b/library/SubcircuitLibrary/DM74185A/4_and.pro
new file mode 100644
index 00000000..b13a0a82
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and.pro
@@ -0,0 +1,57 @@
+update=Wed Mar 18 19:54:24 2020
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=4_and-rescue
+LibName2=texas
+LibName3=intel
+LibName4=audio
+LibName5=interface
+LibName6=digital-audio
+LibName7=philips
+LibName8=display
+LibName9=cypress
+LibName10=siliconi
+LibName11=opto
+LibName12=atmel
+LibName13=contrib
+LibName14=valves
+LibName15=eSim_Analog
+LibName16=eSim_Devices
+LibName17=eSim_Digital
+LibName18=eSim_Hybrid
+LibName19=eSim_Miscellaneous
+LibName20=eSim_Plot
+LibName21=eSim_Power
+LibName22=eSim_Sources
+LibName23=eSim_Subckt
+LibName24=eSim_User
diff --git a/library/SubcircuitLibrary/DM74185A/4_and.sch b/library/SubcircuitLibrary/DM74185A/4_and.sch
new file mode 100644
index 00000000..f5e8febd
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and.sch
@@ -0,0 +1,151 @@
+EESchema Schematic File Version 2
+LIBS:4_and-rescue
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:4_and-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L 3_and-RESCUE-4_and X1
+U 1 1 5C9A2915
+P 3700 3500
+F 0 "X1" H 4600 3800 60  0000 C CNN
+F 1 "3_and" H 4650 4000 60  0000 C CNN
+F 2 "" H 3700 3500 60  0000 C CNN
+F 3 "" H 3700 3500 60  0000 C CNN
+	1    3700 3500
+	1    0    0    -1  
+$EndComp
+$Comp
+L d_and U2
+U 1 1 5C9A2940
+P 5450 3400
+F 0 "U2" H 5450 3400 60  0000 C CNN
+F 1 "d_and" H 5500 3500 60  0000 C CNN
+F 2 "" H 5450 3400 60  0000 C CNN
+F 3 "" H 5450 3400 60  0000 C CNN
+	1    5450 3400
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	5000 3100 5000 3300
+Wire Wire Line
+	4150 3000 4150 2700
+Wire Wire Line
+	4150 2700 3200 2700
+Wire Wire Line
+	4150 3100 4000 3100
+Wire Wire Line
+	4000 3100 4000 3000
+Wire Wire Line
+	4000 3000 3200 3000
+Wire Wire Line
+	4150 3200 4150 3300
+Wire Wire Line
+	4150 3300 3250 3300
+Wire Wire Line
+	5000 3400 5000 3550
+Wire Wire Line
+	5000 3550 3250 3550
+Wire Wire Line
+	5900 3350 6500 3350
+$Comp
+L PORT U1
+U 1 1 5C9A29B1
+P 2950 2700
+F 0 "U1" H 3000 2800 30  0000 C CNN
+F 1 "PORT" H 2950 2700 30  0000 C CNN
+F 2 "" H 2950 2700 60  0000 C CNN
+F 3 "" H 2950 2700 60  0000 C CNN
+	1    2950 2700
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9A29E9
+P 2950 3000
+F 0 "U1" H 3000 3100 30  0000 C CNN
+F 1 "PORT" H 2950 3000 30  0000 C CNN
+F 2 "" H 2950 3000 60  0000 C CNN
+F 3 "" H 2950 3000 60  0000 C CNN
+	2    2950 3000
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5C9A2A0D
+P 3000 3300
+F 0 "U1" H 3050 3400 30  0000 C CNN
+F 1 "PORT" H 3000 3300 30  0000 C CNN
+F 2 "" H 3000 3300 60  0000 C CNN
+F 3 "" H 3000 3300 60  0000 C CNN
+	3    3000 3300
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5C9A2A3C
+P 3000 3550
+F 0 "U1" H 3050 3650 30  0000 C CNN
+F 1 "PORT" H 3000 3550 30  0000 C CNN
+F 2 "" H 3000 3550 60  0000 C CNN
+F 3 "" H 3000 3550 60  0000 C CNN
+	4    3000 3550
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 5C9A2A68
+P 6750 3350
+F 0 "U1" H 6800 3450 30  0000 C CNN
+F 1 "PORT" H 6750 3350 30  0000 C CNN
+F 2 "" H 6750 3350 60  0000 C CNN
+F 3 "" H 6750 3350 60  0000 C CNN
+	5    6750 3350
+	-1   0    0    1   
+$EndComp
+Text Notes 3450 2650 0    60   ~ 12
+in1
+Text Notes 3450 2950 0    60   ~ 12
+in2
+Text Notes 3500 3300 0    60   ~ 12
+in3
+Text Notes 3500 3550 0    60   ~ 12
+in4
+Text Notes 6150 3350 0    60   ~ 12
+out
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/DM74185A/4_and.sub b/library/SubcircuitLibrary/DM74185A/4_and.sub
new file mode 100644
index 00000000..8663f37e
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and.sub
@@ -0,0 +1,12 @@
+* Subcircuit 4_and
+.subckt 4_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ 
+* c:\users\malli\esim\src\subcircuitlibrary\4_and\4_and.cir
+.include 3_and.sub
+x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ 3_and
+* u2  net-_u2-pad1_ net-_u1-pad4_ net-_u1-pad5_ d_and
+a1 [net-_u2-pad1_ net-_u1-pad4_ ] net-_u1-pad5_ u2
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 4_and
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/4_and_Previous_Values.xml b/library/SubcircuitLibrary/DM74185A/4_and_Previous_Values.xml
new file mode 100644
index 00000000..f2ba0130
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/4_and_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit><x1><field>C:\Users\malli\eSim\src\SubcircuitLibrary\3_and</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A-cache.lib b/library/SubcircuitLibrary/DM74185A/DM74185A-cache.lib
new file mode 100644
index 00000000..cf2ced68
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A-cache.lib
@@ -0,0 +1,165 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and
+#
+DEF 3_and X 0 40 Y Y 1 F N
+F0 "X" 100 -50 60 H V C CNN
+F1 "3_and" 150 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 150 50 158 716 -716 0 1 0 N 200 200 200 -100
+P 2 0 1 0 -150 200 200 200 N
+P 3 0 1 0 -150 200 -150 -100 200 -100 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X out 4 500 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_OR
+#
+DEF 4_OR X 0 40 Y Y 1 F N
+F0 "X" 150 -100 60 H V C CNN
+F1 "4_OR" 150 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -800 0 650 226 -226 0 1 0 N -200 250 -200 -250
+A -73 134 444 -599 -176 0 1 0 N 150 -250 350 0
+A -30 -99 393 627 146 0 1 0 N 150 250 350 0
+P 2 0 1 0 -200 -250 150 -250 N
+P 2 0 1 0 -200 250 150 250 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X in4 4 -350 -150 200 R 50 50 1 1 I
+X out 5 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_and
+#
+DEF 4_and X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "4_and" 100 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 206 760 -760 0 1 0 N 150 200 150 -200
+P 2 0 1 0 -200 200 150 200 N
+P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N
+X in1 1 -400 150 200 R 50 50 1 1 I
+X in2 2 -400 50 200 R 50 50 1 1 I
+X in3 3 -400 -50 200 R 50 50 1 1 I
+X in4 4 -400 -150 200 R 50 50 1 1 I
+X out 5 500 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_or
+#
+DEF d_or U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_or" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
+A -25 -124 325 574 323 0 1 0 N 150 150 250 50
+A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
+P 2 0 1 0 -250 -50 150 -50 N
+P 2 0 1 0 -250 150 150 150 N
+X IN1 1 -450 100 215 R 50 50 1 1 I
+X IN2 2 -450 0 215 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# eSim_GND
+#
+DEF eSim_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "eSim_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.bck b/library/SubcircuitLibrary/DM74185A/DM74185A.bck
new file mode 100644
index 00000000..1980d0d1
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.bck
@@ -0,0 +1,7 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP SCR
+D Thyristor
+$ENDCMP
+#
+#End Doc Library
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.cir b/library/SubcircuitLibrary/DM74185A/DM74185A.cir
new file mode 100644
index 00000000..38b8f458
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.cir
@@ -0,0 +1,40 @@
+* C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\DM74185A\DM74185A.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/30/25 16:33:50
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2  /B Net-_U2-Pad2_ d_inverter		
+U3  /C Net-_U3-Pad2_ d_inverter		
+U4  /D Net-_U4-Pad2_ d_inverter		
+U5  /E Net-_U5-Pad2_ d_inverter		
+U6  /A /A /Y1 d_or		
+X1  Net-_U5-Pad2_ Net-_U4-Pad2_ Net-_U3-Pad2_ /B Net-_X1-Pad5_ 4_and		
+X2  Net-_U5-Pad2_ Net-_U4-Pad2_ /C /B Net-_X2-Pad5_ 4_and		
+X4  Net-_U5-Pad2_ /D /C Net-_U2-Pad2_ Net-_X3-Pad3_ 4_and		
+X5  /E Net-_U4-Pad2_ Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_X3-Pad4_ 4_and		
+X7  /E Net-_U4-Pad2_ /C /B Net-_X6-Pad3_ 4_and		
+X8  /E /D Net-_U3-Pad2_ /B Net-_X6-Pad4_ 4_and		
+X3  Net-_X1-Pad5_ Net-_X2-Pad5_ Net-_X3-Pad3_ Net-_X3-Pad4_ Net-_X3-Pad5_ 4_OR		
+X6  Net-_X3-Pad5_ Net-_X3-Pad5_ Net-_X6-Pad3_ Net-_X6-Pad4_ /Y2 4_OR		
+X11  Net-_U5-Pad2_ /D /C /B Net-_X11-Pad5_ 4_and		
+X17  /E Net-_U4-Pad2_ Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_X12-Pad4_ 4_and		
+X9  Net-_U5-Pad2_ Net-_U4-Pad2_ /C Net-_X12-Pad1_ 3_and		
+X15  /E /D Net-_U3-Pad2_ Net-_X12-Pad3_ 3_and		
+X12  Net-_X12-Pad1_ Net-_X11-Pad5_ Net-_X12-Pad3_ Net-_X12-Pad4_ /Y3 4_OR		
+X18  Net-_U5-Pad2_ /D Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_X18-Pad5_ 4_and		
+X19  /E Net-_U4-Pad2_ Net-_U3-Pad2_ /B Net-_X19-Pad5_ 4_and		
+X21  /E /D /C Net-_U2-Pad2_ Net-_X20-Pad4_ 4_and		
+X20  Net-_X18-Pad5_ Net-_X18-Pad5_ Net-_X19-Pad5_ Net-_X20-Pad4_ /Y4 4_OR		
+X16  /B /C /D /E Net-_X13-Pad4_ 4_and		
+X14  Net-_U3-Pad2_ Net-_U4-Pad2_ /E Net-_X13-Pad3_ 3_and		
+U9  /C /B Net-_U9-Pad3_ d_or		
+X10  Net-_U5-Pad2_ /D Net-_U9-Pad3_ Net-_X10-Pad4_ 3_and		
+X13  Net-_X10-Pad4_ Net-_X10-Pad4_ Net-_X13-Pad3_ Net-_X13-Pad4_ /Y5 4_OR		
+U8  /D /C Net-_U7-Pad2_ d_or		
+U7  /E Net-_U7-Pad2_ /Y6 d_and		
+U1  /A /B /C /D /E ? ? ? /Y1 GND /Y2 GND /Y6 /Y3 /Y5 /Y4 PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.cir.out b/library/SubcircuitLibrary/DM74185A/DM74185A.cir.out
new file mode 100644
index 00000000..6533d338
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.cir.out
@@ -0,0 +1,68 @@
+* c:\users\hp\onedrive\documents\fossee\esim\library\subcircuitlibrary\dm74185a\dm74185a.cir
+
+.include 3_and.sub
+.include 4_and.sub
+.include 4_OR.sub
+* u2  /b net-_u2-pad2_ d_inverter
+* u3  /c net-_u3-pad2_ d_inverter
+* u4  /d net-_u4-pad2_ d_inverter
+* u5  /e net-_u5-pad2_ d_inverter
+* u6  /a /a /y1 d_or
+x1 net-_u5-pad2_ net-_u4-pad2_ net-_u3-pad2_ /b net-_x1-pad5_ 4_and
+x2 net-_u5-pad2_ net-_u4-pad2_ /c /b net-_x2-pad5_ 4_and
+x4 net-_u5-pad2_ /d /c net-_u2-pad2_ net-_x3-pad3_ 4_and
+x5 /e net-_u4-pad2_ net-_u3-pad2_ net-_u2-pad2_ net-_x3-pad4_ 4_and
+x7 /e net-_u4-pad2_ /c /b net-_x6-pad3_ 4_and
+x8 /e /d net-_u3-pad2_ /b net-_x6-pad4_ 4_and
+x3 net-_x1-pad5_ net-_x2-pad5_ net-_x3-pad3_ net-_x3-pad4_ net-_x3-pad5_ 4_OR
+x6 net-_x3-pad5_ net-_x3-pad5_ net-_x6-pad3_ net-_x6-pad4_ /y2 4_OR
+x11 net-_u5-pad2_ /d /c /b net-_x11-pad5_ 4_and
+x17 /e net-_u4-pad2_ net-_u3-pad2_ net-_u2-pad2_ net-_x12-pad4_ 4_and
+x9 net-_u5-pad2_ net-_u4-pad2_ /c net-_x12-pad1_ 3_and
+x15 /e /d net-_u3-pad2_ net-_x12-pad3_ 3_and
+x12 net-_x12-pad1_ net-_x11-pad5_ net-_x12-pad3_ net-_x12-pad4_ /y3 4_OR
+x18 net-_u5-pad2_ /d net-_u3-pad2_ net-_u2-pad2_ net-_x18-pad5_ 4_and
+x19 /e net-_u4-pad2_ net-_u3-pad2_ /b net-_x19-pad5_ 4_and
+x21 /e /d /c net-_u2-pad2_ net-_x20-pad4_ 4_and
+x20 net-_x18-pad5_ net-_x18-pad5_ net-_x19-pad5_ net-_x20-pad4_ /y4 4_OR
+x16 /b /c /d /e net-_x13-pad4_ 4_and
+x14 net-_u3-pad2_ net-_u4-pad2_ /e net-_x13-pad3_ 3_and
+* u9  /c /b net-_u9-pad3_ d_or
+x10 net-_u5-pad2_ /d net-_u9-pad3_ net-_x10-pad4_ 3_and
+x13 net-_x10-pad4_ net-_x10-pad4_ net-_x13-pad3_ net-_x13-pad4_ /y5 4_OR
+* u8  /d /c net-_u7-pad2_ d_or
+* u7  /e net-_u7-pad2_ /y6 d_and
+* u1  /a /b /c /d /e ? ? ? /y1 gnd /y2 gnd /y6 /y3 /y5 /y4 port
+a1 /b net-_u2-pad2_ u2
+a2 /c net-_u3-pad2_ u3
+a3 /d net-_u4-pad2_ u4
+a4 /e net-_u5-pad2_ u5
+a5 [/a /a ] /y1 u6
+a6 [/c /b ] net-_u9-pad3_ u9
+a7 [/d /c ] net-_u7-pad2_ u8
+a8 [/e net-_u7-pad2_ ] /y6 u7
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_or, NgSpice Name: d_or
+.model u6 d_or(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_or, NgSpice Name: d_or
+.model u9 d_or(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_or, NgSpice Name: d_or
+.model u8 d_or(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+* Schematic Name:                             d_and, NgSpice Name: d_and
+.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) 
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.dcm b/library/SubcircuitLibrary/DM74185A/DM74185A.dcm
new file mode 100644
index 00000000..1980d0d1
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.dcm
@@ -0,0 +1,7 @@
+EESchema-DOCLIB  Version 2.0
+#
+$CMP SCR
+D Thyristor
+$ENDCMP
+#
+#End Doc Library
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.lib b/library/SubcircuitLibrary/DM74185A/DM74185A.lib
new file mode 100644
index 00000000..0ff5542e
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.lib
@@ -0,0 +1,975 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 10bitDAC
+#
+DEF 10bitDAC X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "10bitDAC" -50 -50 60 H V C CNN
+F2 "" 0 50 60 H I C CNN
+F3 "" 0 50 60 H I C CNN
+DRAW
+S -500 500 400 -600 0 1 0 N
+X D0 1 -700 -500 200 R 50 50 1 1 I
+X D1 2 -700 -400 200 R 50 50 1 1 I
+X D2 3 -700 -300 200 R 50 50 1 1 I
+X D3 4 -700 -200 200 R 50 50 1 1 I
+X D4 5 -700 -100 200 R 50 50 1 1 I
+X D5 6 -700 0 200 R 50 50 1 1 I
+X D6 7 -700 100 200 R 50 50 1 1 I
+X D7 8 -700 200 200 R 50 50 1 1 I
+X D8 9 -700 300 200 R 50 50 1 1 I
+X D9 10 -700 400 200 R 50 50 1 1 I
+X AnalogOut 11 600 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 2BITMUL
+#
+DEF 2BITMUL X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "2BITMUL" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -300 400 300 -400 0 1 0 N
+X A0 1 -500 300 200 R 50 50 1 1 I
+X A1 2 -500 150 200 R 50 50 1 1 I
+X B0 3 -500 -50 200 R 50 50 1 1 I
+X B1 4 -500 -250 200 R 50 50 1 1 I
+X M0 5 500 250 200 L 50 50 1 1 O
+X M1 6 500 100 200 L 50 50 1 1 O
+X M2 7 500 -50 200 L 50 50 1 1 O
+X M3 8 500 -250 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 3_and
+#
+DEF 3_and X 0 40 Y Y 1 F N
+F0 "X" 100 -50 60 H V C CNN
+F1 "3_and" 150 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 150 50 158 716 -716 0 1 0 N 200 200 200 -100
+P 2 0 1 0 -150 200 200 200 N
+P 3 0 1 0 -150 200 -150 -100 200 -100 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X out 4 500 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_OR
+#
+DEF 4_OR X 0 40 Y Y 1 F N
+F0 "X" 150 -100 60 H V C CNN
+F1 "4_OR" 150 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -800 0 650 226 -226 0 1 0 N -200 250 -200 -250
+A -73 134 444 -599 -176 0 1 0 N 150 -250 350 0
+A -30 -99 393 627 146 0 1 0 N 150 250 350 0
+P 2 0 1 0 -200 -250 150 -250 N
+P 2 0 1 0 -200 250 150 250 N
+X in1 1 -350 150 200 R 50 50 1 1 I
+X in2 2 -350 50 200 R 50 50 1 1 I
+X in3 3 -350 -50 200 R 50 50 1 1 I
+X in4 4 -350 -150 200 R 50 50 1 1 I
+X out 5 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 4_and
+#
+DEF 4_and X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "4_and" 100 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 206 760 -760 0 1 0 N 150 200 150 -200
+P 2 0 1 0 -200 200 150 200 N
+P 4 0 1 0 -200 200 -200 -200 50 -200 150 -200 N
+X in1 1 -400 150 200 R 50 50 1 1 I
+X in2 2 -400 50 200 R 50 50 1 1 I
+X in3 3 -400 -50 200 R 50 50 1 1 I
+X in4 4 -400 -150 200 R 50 50 1 1 I
+X out 5 500 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 54HC164
+#
+DEF 54HC164 X 0 40 Y Y 1 F N
+F0 "X" 200 250 60 H V C CNN
+F1 "54HC164" 200 550 60 H V C CNN
+F2 "" 200 250 60 H I C CNN
+F3 "" 200 250 60 H I C CNN
+DRAW
+S -450 1450 900 -700 0 1 0 N
+X A 1 -650 1200 200 R 50 50 1 1 I
+X B 2 -650 950 200 R 50 50 1 1 I
+X CLR_BAR 3 -650 700 200 R 50 50 1 1 I
+X CLK 4 -650 450 200 R 50 50 1 1 I
+X QA 5 -650 150 200 R 50 50 1 1 O
+X QE 6 -650 -150 200 R 50 50 1 1 O
+X QB 7 -650 -450 200 R 50 50 1 1 O
+X QF 8 1100 -450 200 L 50 50 1 1 O
+X QC 9 1100 -150 200 L 50 50 1 1 O
+X QG 10 1100 150 200 L 50 50 1 1 O
+X QD 11 1100 450 200 L 50 50 1 1 O
+X QH 12 1100 700 200 L 50 50 1 1 O
+X VCC 13 1100 950 200 L 50 50 1 1 I
+X GND 14 1100 1200 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 556
+#
+DEF 556 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "556" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 250 -550 0 1 0 N
+X dis1 1 -500 150 200 R 50 50 1 1 I
+X thr1 2 -500 -150 200 R 50 50 1 1 I
+X cv1 3 -150 -750 200 U 50 50 1 1 I
+X rst1 4 -200 600 200 D 50 50 1 1 I
+X out1 5 -500 0 200 R 50 50 1 1 O
+X trig1 6 -500 -300 200 R 50 50 1 1 I
+X gnd 7 0 -750 200 U 50 50 1 1 I
+X trig2 8 450 -300 200 L 50 50 1 1 I
+X out2 9 450 0 200 L 50 50 1 1 O
+X rst2 10 100 600 200 D 50 50 1 1 I
+X cv2 11 150 -750 200 U 50 50 1 1 I
+X thr2 12 450 -150 200 L 50 50 1 1 I
+X dis2 13 450 150 200 L 50 50 1 1 I
+X vcc 14 -50 600 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 5_and
+#
+DEF 5_and X 0 40 Y Y 1 F N
+F0 "X" 50 -100 60 H V C CNN
+F1 "5_and" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 100 0 255 787 -787 0 1 0 N 150 250 150 -250
+P 2 0 1 0 -250 250 150 250 N
+P 3 0 1 0 -250 250 -250 -250 150 -250 N
+X in1 1 -450 200 200 R 50 50 1 1 I
+X in2 2 -450 100 200 R 50 50 1 1 I
+X in3 3 -450 0 200 R 50 50 1 1 I
+X in4 4 -450 -100 200 R 50 50 1 1 I
+X in5 5 -450 -200 200 R 50 50 1 1 I
+X out 6 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# 8282
+#
+DEF 8282 X 0 40 Y Y 1 F N
+F0 "X" 100 0 60 H V C CNN
+F1 "8282" 100 100 60 H V C CNN
+F2 "" 100 0 60 H I C CNN
+F3 "" 100 0 60 H I C CNN
+DRAW
+S -1450 600 1450 -550 0 1 0 N
+X A3 1 -150 800 200 D 50 50 1 1 I
+X A0 2 -1100 800 200 D 50 50 1 1 I
+X A1 3 -750 800 200 D 50 50 1 1 I
+X A2 4 -450 800 200 D 50 50 1 1 I
+X STB 5 -1650 250 200 R 50 50 1 1 I
+X OE_BAR 6 -1650 -150 200 R 50 50 1 1 I
+X B0 7 -1050 -750 200 U 50 50 1 1 O
+X B1 8 -750 -750 200 U 50 50 1 1 O
+X B2 9 -450 -750 200 U 50 50 1 1 O
+X B3 10 -150 -750 200 U 50 50 1 1 O
+X GND 20 1650 -200 200 L 50 50 1 1 I
+X A4 11 200 800 200 D 50 50 1 1 I
+X A5 12 500 800 200 D 50 50 1 1 I
+X A6 13 800 800 200 D 50 50 1 1 I
+X A7 14 1100 800 200 D 50 50 1 1 I
+X B4 15 200 -750 200 U 50 50 1 1 O
+X B5 16 550 -750 200 U 50 50 1 1 O
+X B6 17 850 -750 200 U 50 50 1 1 O
+X B7 18 1150 -750 200 U 50 50 1 1 O
+X VCC 19 1650 250 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# 8286
+#
+DEF 8286 X 0 40 Y Y 1 F N
+F0 "X" 150 -100 60 H V C CNN
+F1 "8286" 100 50 60 H V C CNN
+F2 "" 150 -100 60 H I C CNN
+F3 "" 150 -100 60 H I C CNN
+DRAW
+S -1150 500 1400 -500 0 1 0 N
+X OE_BAR 1 -1350 -200 200 R 50 50 1 1 I
+X TRANS/RXR_BAR 2 -1350 150 200 R 50 50 1 1 I
+X A0 3 -850 700 200 D 50 50 1 1 B
+X B0 4 -800 -700 200 U 50 50 1 1 B
+X A1 5 -600 700 200 D 50 50 1 1 B
+X B1 6 -600 -700 200 U 50 50 1 1 B
+X A2 7 -350 700 200 D 50 50 1 1 B
+X B2 8 -350 -700 200 U 50 50 1 1 B
+X A3 9 -100 700 200 D 50 50 1 1 B
+X B3 10 -100 -700 200 U 50 50 1 1 B
+X GND 20 1200 -700 200 U 50 50 1 1 I
+X A4 11 150 700 200 D 50 50 1 1 B
+X B4 12 150 -700 200 U 50 50 1 1 B
+X A5 13 400 700 200 D 50 50 1 1 B
+X B5 14 450 -700 200 U 50 50 1 1 B
+X A6 15 650 700 200 D 50 50 1 1 B
+X B6 16 700 -700 200 U 50 50 1 1 B
+X A7 17 950 700 200 D 50 50 1 1 B
+X B7 18 950 -700 200 U 50 50 1 1 B
+X VCC 19 1200 700 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# CMOS_NAND
+#
+DEF CMOS_NAND X 0 40 Y Y 1 F N
+F0 "X" -100 -150 60 H V C CNN
+F1 "CMOS_NAND" 0 -50 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+A 150 -50 381 668 -668 0 1 0 N 300 300 300 -400
+C 550 0 50 0 1 0 N
+P 2 0 1 0 -350 300 300 300 N
+P 3 0 1 0 -350 300 -350 -400 300 -400 N
+X in1 1 -550 250 200 R 50 50 1 1 I
+X in2 2 -550 -300 200 R 50 50 1 1 I
+X out 3 800 0 279 L 79 79 1 1 I
+ENDDRAW
+ENDDEF
+#
+# Clock_pulse_generator
+#
+DEF Clock_pulse_generator X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Clock_pulse_generator" 0 -100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -550 200 600 -300 0 1 0 N
+X Vdd 1 -750 100 200 R 50 50 1 1 I
+X R 2 -750 -50 200 R 50 50 1 1 I
+X C 3 -750 -200 200 R 50 50 1 1 I
+X Clkout 4 800 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# DM74185A
+#
+DEF DM74185A X 0 40 Y Y 1 F N
+F0 "X" -250 900 60 H V C CNN
+F1 "DM74185A" -250 1100 60 H V C CNN
+F2 "" -250 850 60 H I C CNN
+F3 "" -250 850 60 H I C CNN
+DRAW
+S -800 1900 250 100 0 1 0 N
+X A 1 -1000 1700 200 R 50 50 1 1 I
+X B 2 -1000 1500 200 R 50 50 1 1 I
+X C 3 -1000 1300 200 R 50 50 1 1 I
+X D 4 -1000 1100 200 R 50 50 1 1 I
+X E 5 -1000 900 200 R 50 50 1 1 I
+X E_BAR 6 -1000 700 200 R 50 50 1 1 I
+X VCC 7 -1000 500 200 R 50 50 1 1 I
+X GND 8 -1000 300 200 R 50 50 1 1 I
+X Y1 9 450 300 200 L 50 50 1 1 O
+X Y8 10 450 500 200 L 50 50 1 1 O
+X Y2 11 450 700 200 L 50 50 1 1 O
+X Y7 12 450 900 200 L 50 50 1 1 O
+X Y6 13 450 1100 200 L 50 50 1 1 O
+X Y3 14 450 1300 200 L 50 50 1 1 O
+X Y5 15 450 1500 200 L 50 50 1 1 O
+X Y4 16 450 1700 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# ICL7660
+#
+DEF ICL7660 X 0 40 Y Y 1 F N
+F0 "X" 100 -200 60 H V C CNN
+F1 "ICL7660" 100 250 60 H V C CNN
+F2 "" 100 -200 60 H I C CNN
+F3 "" 100 -200 60 H I C CNN
+DRAW
+S -450 800 600 -650 0 1 0 N
+X NC 1 -650 450 200 R 50 50 1 1 N
+X CAP+ 2 -650 150 200 R 50 50 1 1 I
+X CAP- 3 -650 -150 200 R 50 50 1 1 I
+X GND 4 -650 -400 200 R 50 50 1 1 I
+X LV 5 800 -400 200 L 50 50 1 1 I
+X VIN 6 800 -150 200 L 50 50 1 1 I
+X OSC 7 800 150 200 L 50 50 1 1 N
+X OUT 8 800 450 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# ICTEST_741
+#
+DEF ICTEST_741 X 0 40 Y Y 1 F N
+F0 "X" -150 -150 60 H V C CNN
+F1 "ICTEST_741" -100 50 60 H V C CNN
+F2 "" -150 -150 60 H I C CNN
+F3 "" -150 -150 60 H I C CNN
+DRAW
+S -750 800 500 -750 0 1 0 N
+X NON_INV 1 -950 500 200 R 50 50 1 1 I
+X OFF_NULL 2 -950 150 200 R 50 50 1 1 I
+X OFF_NULL 3 -950 -200 200 R 50 50 1 1 I
+X INV 4 -950 -450 200 R 50 50 1 1 I
+X NC 5 700 -450 200 L 50 50 1 1 N
+X OUT 6 700 -200 200 L 50 50 1 1 O
+X VCC 7 700 150 200 L 50 50 1 1 I
+X VEE 8 700 500 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4002
+#
+DEF IC_4002 X 0 40 Y Y 1 F N
+F0 "X" 0 150 60 H V C CNN
+F1 "IC_4002" 0 0 60 H V C CNN
+F2 "" 50 -150 60 H V C CNN
+F3 "" 50 -150 60 H V C CNN
+DRAW
+S -250 350 250 -400 0 1 0 N
+X 1Y 1 -450 250 200 R 50 50 1 1 O
+X 1A 2 -450 150 200 R 50 50 1 1 I
+X 1B 3 -450 50 200 R 50 50 1 1 I
+X 1C 4 -450 -50 200 R 50 50 1 1 I
+X 1D 5 -450 -150 200 R 50 50 1 1 I
+X NC 6 -450 -250 200 R 50 50 1 1 I
+X GND 7 -450 -350 200 R 50 50 1 1 I
+X NC 8 450 -350 200 L 50 50 1 1 I
+X 2A 9 450 -250 200 L 50 50 1 1 I
+X 2B 10 450 -150 200 L 50 50 1 1 I
+X 2C 11 450 -50 200 L 50 50 1 1 I
+X 2D 12 450 50 200 L 50 50 1 1 I
+X 2Y 13 450 150 200 L 50 50 1 1 O
+X VCC 14 450 250 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4012
+#
+DEF IC_4012 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "IC_4012" 0 200 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 350 -400 0 1 0 N
+X Q1 1 -500 300 200 R 50 50 1 1 O
+X A1 2 -500 200 200 R 50 50 1 1 I
+X B1 3 -500 100 200 R 50 50 1 1 I
+X C1 4 -500 0 200 R 50 50 1 1 I
+X D1 5 -500 -100 200 R 50 50 1 1 I
+X NC 6 -500 -200 200 R 50 50 1 1 N
+X VSS 7 -500 -300 200 R 50 50 1 1 I
+X NC 8 550 -300 200 L 50 50 1 1 N
+X A2 9 550 -200 200 L 50 50 1 1 I
+X B2 10 550 -100 200 L 50 50 1 1 I
+X C2 11 550 0 200 L 50 50 1 1 I
+X D2 12 550 100 200 L 50 50 1 1 I
+X Q2 13 550 200 200 L 50 50 1 1 O
+X VDD 14 550 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4017
+#
+DEF IC_4017 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "IC_4017" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -350 850 400 -850 0 1 0 N
+X 1 1 600 650 200 L 50 50 1 1 O
+X 2 2 600 500 200 L 50 50 1 1 O
+X 3 3 600 350 200 L 50 50 1 1 O
+X 4 4 600 200 200 L 50 50 1 1 O
+X 5 5 600 50 200 L 50 50 1 1 O
+X 6 6 600 -100 200 L 50 50 1 1 O
+X 7 7 600 -250 200 L 50 50 1 1 O
+X 8 8 600 -400 200 L 50 50 1 1 O
+X 9 9 600 -600 200 L 50 50 1 1 O
+X 10 10 600 -750 200 L 50 50 1 1 O
+X RST 11 -550 -400 200 R 50 50 1 1 I
+X CLK 12 -550 350 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4023
+#
+DEF IC_4023 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4023" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 450 300 -450 0 1 0 N
+X A1 1 -500 300 200 R 50 50 1 1 I
+X B1 2 -500 200 200 R 50 50 1 1 I
+X A2 3 -500 100 200 R 50 50 1 1 I
+X B2 4 -500 0 200 R 50 50 1 1 I
+X C2 5 -500 -100 200 R 50 50 1 1 I
+X Q2 6 -500 -200 200 R 50 50 1 1 O
+X Vss 7 -500 -300 200 R 50 50 1 1 I
+X C1 8 500 -300 200 L 50 50 1 1 I
+X Q1 9 500 -200 200 L 50 50 1 1 O
+X Q3 10 500 -100 200 L 50 50 1 1 O
+X C3 11 500 0 200 L 50 50 1 1 I
+X B3 12 500 100 200 L 50 50 1 1 I
+X A3 13 500 200 200 L 50 50 1 1 I
+X Vdd 14 500 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_4028
+#
+DEF IC_4028 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4028" 0 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 450 300 -450 0 1 0 N
+X Q4 1 -500 350 200 R 50 50 1 1 O
+X Q2 2 -500 250 200 R 50 50 1 1 O
+X Q0 3 -500 150 200 R 50 50 1 1 O
+X Q7 4 -500 50 200 R 50 50 1 1 O
+X Q9 5 -500 -50 200 R 50 50 1 1 O
+X Q5 6 -500 -150 200 R 50 50 1 1 O
+X Q6 7 -500 -250 200 R 50 50 1 1 O
+X Vss 8 -500 -350 200 R 50 50 1 1 I
+X Q8 9 500 -350 200 L 50 50 1 1 O
+X A0 10 500 -250 200 L 50 50 1 1 I
+X A3 11 500 -150 200 L 50 50 1 1 I
+X A2 12 500 -50 200 L 50 50 1 1 I
+X A1 13 500 50 200 L 50 50 1 1 I
+X Q1 14 500 150 200 L 50 50 1 1 O
+X Q3 15 500 250 200 L 50 50 1 1 O
+X Vdd 16 500 350 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_4073
+#
+DEF IC_4073 X 0 40 Y Y 1 F N
+F0 "X" 0 -100 60 H V C CNN
+F1 "IC_4073" 0 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -300 400 300 -400 0 1 0 N
+X A1 1 -500 300 200 R 50 50 1 1 I
+X B1 2 -500 200 200 R 50 50 1 1 I
+X A2 3 -500 100 200 R 50 50 1 1 I
+X B2 4 -500 0 200 R 50 50 1 1 I
+X C2 5 -500 -100 200 R 50 50 1 1 I
+X Q2 6 -500 -200 200 R 50 50 1 1 O
+X Vss 7 -500 -300 200 R 50 50 1 1 I
+X C1 8 500 -300 200 L 50 50 1 1 I
+X Q1 9 500 -200 200 L 50 50 1 1 O
+X Q3 10 500 -100 200 L 50 50 1 1 O
+X A3 11 500 0 200 L 50 50 1 1 I
+X B3 12 500 100 200 L 50 50 1 1 I
+X C3 13 500 200 200 L 50 50 1 1 I
+X Vdd 14 500 300 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# IC_74153
+#
+DEF IC_74153 X 0 40 Y Y 1 F N
+F0 "X" 100 50 60 H V C CNN
+F1 "IC_74153" 100 150 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 100 -200 60 0 0 0 4:1 Normal 0 C C
+T 0 100 -100 60 0 0 0 DUAL Normal 0 C C
+T 0 100 -300 60 0 0 0 MUX Normal 0 C C
+S -200 500 350 -550 0 1 0 N
+X a0 1 -400 350 200 R 50 50 1 1 I
+X a1 2 -400 250 200 R 50 50 1 1 I
+X a2 3 -400 150 200 R 50 50 1 1 I
+X a3 4 -400 50 200 R 50 50 1 1 I
+X EA 5 0 700 200 D 50 50 1 1 I I
+X b0 6 -400 -150 200 R 50 50 1 1 I
+X b1 7 -400 -250 200 R 50 50 1 1 I
+X b2 8 -400 -350 200 R 50 50 1 1 I
+X b3 9 -400 -450 200 R 50 50 1 1 I
+X EB 10 200 700 200 D 50 50 1 1 I I
+X s1 11 50 -750 200 U 50 50 1 1 I
+X s0 12 150 -750 200 U 50 50 1 1 I
+X ya 13 550 250 200 L 50 50 1 1 O
+X yb 14 550 -300 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_74154
+#
+DEF IC_74154 X 0 40 Y Y 1 F N
+F0 "X" 0 -200 60 H V C CNN
+F1 "IC_74154" 50 -50 60 H V C CNN
+F2 "" 0 50 60 H V C CNN
+F3 "" 0 50 60 H V C CNN
+DRAW
+T 0 0 400 60 0 0 0 4:16~ Normal 0 C C
+T 0 0 250 60 0 0 0 decoder Normal 0 C C
+S -350 700 400 -700 0 0 0 N
+X ~Y0 1 -550 550 200 R 50 50 1 1 O I
+X ~Y1 2 -550 450 200 R 50 50 1 1 O I
+X ~Y2 3 -550 350 200 R 50 50 1 1 O I
+X ~Y3 4 -550 250 200 R 50 50 1 1 O I
+X ~Y4 5 -550 150 200 R 50 50 1 1 O I
+X ~Y5 6 -550 50 200 R 50 50 1 1 O I
+X ~Y6 7 -550 -50 200 R 50 50 1 1 O I
+X ~Y7 8 -550 -150 200 R 50 50 1 1 O I
+X ~Y8 9 -550 -250 200 R 50 50 1 1 O I
+X ~Y9 10 -550 -350 200 R 50 50 1 1 O I
+X A3 20 600 150 200 L 50 50 1 1 I
+X ~Y10 11 -550 -450 200 R 50 50 1 1 O I
+X A2 21 600 250 200 L 50 50 1 1 I
+X GND 12 -550 -550 200 R 50 50 1 1 I
+X A1 22 600 350 200 L 50 50 1 1 I
+X ~Y11 13 600 -550 200 L 50 50 1 1 O I
+X A0 23 600 450 200 L 50 50 1 1 I
+X ~Y12 14 600 -450 200 L 50 50 1 1 O I
+X Vcc 24 600 550 200 L 50 50 1 1 I
+X ~Y13 15 600 -350 200 L 50 50 1 1 O I
+X ~Y14 16 600 -250 200 L 50 50 1 1 O I
+X ~Y15 17 600 -150 200 L 50 50 1 1 O I
+X ~E0 18 600 -50 200 L 50 50 1 1 I I
+X ~E1 19 600 50 200 L 50 50 1 1 I I
+ENDDRAW
+ENDDEF
+#
+# IC_74157
+#
+DEF IC_74157 X 0 40 Y Y 1 F N
+F0 "X" 50 -50 60 H V C CNN
+F1 "IC_74157" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 50 -300 60 0 0 0 2:1 Normal 0 C C
+T 0 50 -400 60 0 0 0 MUX Normal 0 C C
+T 0 50 -200 60 0 0 0 QUAD Normal 0 C C
+S -350 550 400 -650 0 1 0 N
+X a0 1 -550 450 200 R 50 50 1 1 I
+X a1 2 -550 300 200 R 50 50 1 1 I
+X b0 3 -550 200 200 R 50 50 1 1 I
+X b1 4 -550 100 200 R 50 50 1 1 I
+X c0 5 -550 0 200 R 50 50 1 1 I
+X c1 6 -550 -100 200 R 50 50 1 1 I
+X d0 7 -550 -200 200 R 50 50 1 1 I
+X d1 8 -550 -300 200 R 50 50 1 1 I
+X EN 9 -550 -550 200 R 50 50 1 1 I I
+X S 10 -550 -450 200 R 50 50 1 1 I
+X Yd 11 600 0 200 L 50 50 1 1 O
+X Ya 12 600 300 200 L 50 50 1 1 O
+X Yb 13 600 200 200 L 50 50 1 1 O
+X Yc 14 600 100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# IC_7485
+#
+DEF IC_7485 X 0 40 Y Y 1 F N
+F0 "X" -50 -100 60 H V C CNN
+F1 "IC_7485" -50 50 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+T 0 0 550 60 0 0 0 4~BIT~comparator Normal 0 C C
+S -350 450 400 -400 0 1 0 N
+X A<B(in) 1 600 -100 200 L 50 50 1 1 I
+X A=B(in) 2 600 -200 200 L 50 50 1 1 I
+X A>B(in) 3 600 -300 200 L 50 50 1 1 I
+X A3 4 -550 100 200 R 50 50 1 1 I
+X B3 5 -550 -350 200 R 50 50 1 1 I
+X A2 6 -550 200 200 R 50 50 1 1 I
+X B2 7 -550 -250 200 R 50 50 1 1 I
+X A1 8 -550 300 200 R 50 50 1 1 I
+X B1 9 -550 -150 200 R 50 50 1 1 I
+X A0 10 -550 400 200 R 50 50 1 1 I
+X B0 11 -550 -50 200 R 50 50 1 1 I
+X A>B(out) 12 600 350 200 L 50 50 1 1 O
+X A=B(out) 13 600 250 200 L 50 50 1 1 O
+X A<B(out) 14 600 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# INVCMOS
+#
+DEF INVCMOS X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "INVCMOS" -450 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+C 400 0 112 0 1 0 N
+S -250 200 -250 -200 0 1 0 N
+P 3 0 1 0 -250 200 300 0 -250 -200 N
+X in 1 -450 0 200 R 50 50 1 1 P
+X out 2 700 0 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# LM158
+#
+DEF LM158 X 0 40 Y Y 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "LM158" 50 500 60 H V C CNN
+F2 "" 0 -50 60 H I C CNN
+F3 "" 0 -50 60 H I C CNN
+DRAW
+S -400 450 450 -550 0 1 0 N
+X INV 1 -600 150 200 R 50 50 1 1 I
+X NON-INV 2 -600 -200 200 R 50 50 1 1 I
+X VCC 4 650 150 200 L 50 50 1 1 I
+X OUT 5 650 -150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# LM555N
+#
+DEF LM555N X 0 40 Y Y 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "LM555N" 0 100 60 H V C CNN
+F2 "" -50 0 60 H V C CNN
+F3 "" -50 0 60 H V C CNN
+DRAW
+S 350 -400 -350 400 0 1 0 N
+X GND 1 0 -600 200 U 50 50 1 1 W
+X TR 2 -550 250 200 R 50 50 1 1 I
+X Q 3 550 250 200 L 50 50 1 1 O
+X R 4 -550 -250 200 R 50 50 1 1 I I
+X CV 5 -550 0 200 R 50 50 1 1 I
+X THR 6 550 -250 200 L 50 50 1 1 I
+X DIS 7 550 0 200 L 50 50 1 1 I
+X VCC 8 0 600 200 D 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# LM748
+#
+DEF LM748 X 0 40 Y Y 1 F N
+F0 "X" 0 -150 60 H V C CNN
+F1 "LM748" 0 150 60 H V C CNN
+F2 "" 0 -150 60 H I C CNN
+F3 "" 0 -150 60 H I C CNN
+DRAW
+S -700 750 700 -750 0 1 0 N
+X INV 1 -900 450 200 R 50 50 1 1 I
+X NON_INV 2 -900 150 200 R 50 50 1 1 I
+X PHASE_COMP1 3 -900 -150 200 R 50 50 1 1 I
+X OFFSET_NULL 4 -900 -450 200 R 50 50 1 1 I
+X PHASE_COMP2 5 900 -450 200 L 50 50 1 1 I
+X V- 6 900 -150 200 L 50 50 1 1 I
+X V+ 7 900 150 200 L 50 50 1 1 I
+X OUT 8 900 450 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# LM_7812
+#
+DEF LM_7812 X 0 40 Y Y 1 F N
+F0 "X" 0 50 60 H V C CNN
+F1 "LM_7812" 0 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 200 350 -200 0 1 0 N
+X IN 1 -550 0 200 R 50 50 1 1 I
+X GND 2 0 -400 200 U 50 50 1 1 I
+X OUT 3 550 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# Lm_7805
+#
+DEF Lm_7805 X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "Lm_7805" 50 150 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -350 100 350 -200 0 1 0 N
+X Vin 1 -550 0 200 R 50 50 1 1 P
+X GND 2 0 -400 200 U 50 50 1 1 P
+X Vout 3 550 0 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# NE555
+#
+DEF NE555 X 0 40 Y Y 1 F N
+F0 "X" 50 -700 60 H V C CNN
+F1 "NE555" 0 850 60 H V C CNN
+F2 "" 50 -700 60 H I C CNN
+F3 "" 50 -700 60 H I C CNN
+DRAW
+S -600 800 750 -650 0 1 0 N
+X CONT 1 -800 550 200 R 50 50 1 1 I
+X THRES 2 -800 250 200 R 50 50 1 1 I
+X TRIG 3 -800 -100 200 R 50 50 1 1 I
+X RESET 4 -800 -400 200 R 50 50 1 1 I
+X DISCH 5 950 -400 200 L 50 50 1 1 O
+X VCC 6 950 -100 200 L 50 50 1 1 I
+X GND 7 950 250 200 L 50 50 1 1 I
+X OUT 8 950 550 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# SCR
+#
+DEF SCR X 0 10 Y N 1 F N
+F0 "X" 150 200 50 H V C CNN
+F1 "SCR" 150 -350 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 0 0 -200 -150 200 -150 N
+P 2 0 1 0 0 -150 -200 -400 N
+P 3 0 1 0 -150 100 150 100 0 -150 F
+X A 1 0 400 300 D 60 60 1 1 I
+X K 2 0 -550 400 U 60 70 1 1 I
+X G 3 -350 -400 150 R 60 60 1 1 I
+ENDDRAW
+ENDDEF
+#
+# SN5454
+#
+DEF SN5454 X 0 40 Y Y 1 F N
+F0 "X" 0 -350 60 H V C CNN
+F1 "SN5454" 0 50 60 H V C CNN
+F2 "" 0 -350 60 H I C CNN
+F3 "" 0 -350 60 H I C CNN
+DRAW
+S -600 1150 550 -1200 0 1 0 N
+X A 1 -800 900 200 R 50 50 1 1 I
+X C 2 -800 600 200 R 50 50 1 1 I
+X D 3 -800 300 200 R 50 50 1 1 I
+X B 4 -800 0 200 R 50 50 1 1 I
+X E 5 -800 -300 200 R 50 50 1 1 I
+X F 6 -800 -600 200 R 50 50 1 1 I
+X GND 7 -800 -900 200 R 50 50 1 1 I
+X G 8 750 900 200 L 50 50 1 1 I
+X H 9 750 600 200 L 50 50 1 1 I
+X VDD 10 750 300 200 L 50 50 1 1 I
+X OUT 11 750 0 200 L 50 50 1 1 O
+X NC 12 750 -300 200 L 50 50 1 1 N
+X NU 13 750 -600 200 L 50 50 1 1 I
+X NU 14 750 -900 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# UJT
+#
+DEF UJT X 0 40 Y Y 1 F N
+F0 "X" -50 -50 60 H V C CNN
+F1 "UJT" 50 -50 60 H V C CNN
+F2 "" -50 -50 60 H I C CNN
+F3 "" -50 -50 60 H I C CNN
+DRAW
+C -50 -50 206 0 1 0 N
+P 2 0 1 0 -100 100 -100 -200 N
+P 3 0 1 0 -250 0 -200 0 -100 -100 N
+P 3 0 1 0 -200 -50 -150 -50 -150 0 N
+P 3 0 1 0 -100 -150 0 -150 0 -250 N
+P 3 0 1 0 -100 50 0 50 0 150 N
+X E 1 -450 0 200 R 50 50 1 1 I
+X B1 2 0 -450 200 U 50 50 1 1 B
+X B2 3 0 350 200 D 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_74LS04
+#
+DEF eSim_74LS04 X 0 40 Y Y 1 F N
+F0 "X" 0 100 60 H V C CNN
+F1 "eSim_74LS04" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S 350 500 -350 -500 0 1 0 N
+X ~ 1 -550 450 200 R 50 50 1 1 P
+X ~ 2 -550 300 200 R 50 50 1 1 P I
+X ~ 3 -550 150 200 R 50 50 1 1 P
+X ~ 4 -550 0 200 R 50 50 1 1 P I
+X ~ 5 -550 -150 200 R 50 50 1 1 P
+X ~ 6 -550 -300 200 R 50 50 1 1 P I
+X GND 7 -550 -450 200 R 50 50 1 1 P
+X ~ 8 550 -450 200 L 50 50 1 1 P I
+X ~ 9 550 -300 200 L 50 50 1 1 P
+X ~ 10 550 -150 200 L 50 50 1 1 P I
+X ~ 11 550 0 200 L 50 50 1 1 P
+X ~ 12 550 150 200 L 50 50 1 1 P I
+X ~ 13 550 300 200 L 50 50 1 1 P
+X VCC 14 550 450 200 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# full_adder
+#
+DEF full_adder X 0 40 Y Y 1 F N
+F0 "X" 1400 700 60 H V C CNN
+F1 "full_adder" 1400 600 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 800 1150 1950 0 0 1 0 N
+X IN1 1 600 950 200 R 50 50 1 1 I
+X IN2 2 600 550 200 R 50 50 1 1 I
+X CIN 3 600 150 200 R 50 50 1 1 I
+X SUM 4 2150 950 200 L 50 50 1 1 O
+X COUT 5 2150 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# full_sub
+#
+DEF full_sub X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "full_sub" 0 0 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -550 650 450 -600 0 1 0 N
+X A 1 -750 400 200 R 50 50 1 1 I
+X B 2 -750 200 200 R 50 50 1 1 I
+X BIN 3 -750 -200 200 R 50 50 1 1 I
+X DIFF 4 650 450 200 L 50 50 1 1 O
+X BORROW 5 650 150 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# half_adder
+#
+DEF half_adder X 0 40 Y Y 1 F N
+F0 "X" 900 500 60 H V C CNN
+F1 "half_adder" 900 400 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S 500 800 1250 0 0 1 0 N
+X IN1 1 300 700 200 R 50 50 1 1 I
+X IN2 2 300 100 200 R 50 50 1 1 I
+X SUM 3 1450 700 200 L 50 50 1 1 O
+X COUT 4 1450 100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# half_sub
+#
+DEF half_sub X 0 40 Y Y 1 F N
+F0 "X" 0 0 60 H V C CNN
+F1 "half_sub" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -300 300 300 -300 0 1 0 N
+X A 1 -500 200 200 R 50 50 1 1 I
+X B 2 -500 -100 200 R 50 50 1 1 I
+X D 3 500 150 200 L 50 50 1 1 O
+X BORROW 4 500 -100 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+# lm_748
+#
+DEF lm_748 x 0 40 Y Y 1 F N
+F0 "x" -50 -200 60 H V C CNN
+F1 "lm_748" -50 50 60 H V C CNN
+F2 "" -50 -200 60 H I C CNN
+F3 "" -50 -200 60 H I C CNN
+DRAW
+S -550 600 500 -550 0 1 0 N
+X PHASE_COMP 1 -750 400 200 R 50 50 1 1 I
+X NON_INV 2 -750 150 200 R 50 50 1 1 I
+X OFFSET_NULL 3 -750 -100 200 R 50 50 1 1 I
+X INV 4 -750 -350 200 R 50 50 1 1 I
+X PHASE_COMP 5 700 -350 200 L 50 50 1 1 I
+X VCC 6 700 -100 200 L 50 50 1 1 I
+X OUT 7 700 150 200 L 50 50 1 1 O
+X VEE 8 700 400 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# sn54als29827
+#
+DEF sn54als29827 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "sn54als29827" -200 300 39 H V C CNN
+F2 "" -200 0 60 H I C CNN
+F3 "" -200 0 60 H I C CNN
+DRAW
+S -350 250 -50 -400 0 1 0 N
+X g1 1 -550 200 200 R 31 31 1 1 I
+X g2 2 -550 150 200 R 31 31 1 1 I
+X a1 3 -550 100 200 R 31 31 1 1 I
+X a2 4 -550 50 200 R 31 31 1 1 I
+X y1 5 150 200 200 L 31 31 1 1 O
+X y2 6 150 150 200 L 31 31 1 1 O
+X a9 7 -550 -300 200 R 31 31 1 1 I
+X a8 8 -550 -250 200 R 31 31 1 1 I
+X a10 9 -550 -350 200 R 31 31 1 1 I
+X a7 10 -550 -200 200 R 31 31 1 1 I
+X y6 20 150 -50 200 L 31 31 1 1 O
+X a6 11 -550 -150 200 R 31 31 1 1 I
+X y10 21 150 -250 200 L 31 31 1 1 O
+X a4 12 -550 -50 200 R 31 31 1 1 I
+X y9 22 150 -200 200 L 31 31 1 1 O
+X a3 13 -550 0 200 R 31 31 1 1 I
+X vcc 23 150 -300 200 L 31 31 1 1 O
+X a5 14 -550 -100 200 R 31 31 1 1 I
+X gnd 24 150 -350 200 L 31 31 1 1 O
+X y4 15 150 50 200 L 31 31 1 1 O
+X y5 16 150 0 200 L 31 31 1 1 O
+X y7 17 150 -100 200 L 31 31 1 1 O
+X y8 18 150 -150 200 L 31 31 1 1 O
+X y3 19 150 100 200 L 31 31 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.pro b/library/SubcircuitLibrary/DM74185A/DM74185A.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.sch b/library/SubcircuitLibrary/DM74185A/DM74185A.sch
new file mode 100644
index 00000000..d6ed3e91
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.sch
@@ -0,0 +1,984 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
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+Comment2 ""
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+Comment4 ""
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+$EndComp
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+$EndComp
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+	3    1300 400 
+	0    1    1    0   
+$EndComp
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+	4    1750 400 
+	0    1    1    0   
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+	5    2150 400 
+	0    1    1    0   
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+	8    4100 650 
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+NoConn ~ 3850 900 
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diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A.sub b/library/SubcircuitLibrary/DM74185A/DM74185A.sub
new file mode 100644
index 00000000..f9c0b4c3
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A.sub
@@ -0,0 +1,62 @@
+* Subcircuit DM74185A
+.subckt DM74185A /a /b /c /d /e ? ? ? /y1 gnd /y2 gnd /y6 /y3 /y5 /y4 
+* c:\users\hp\onedrive\documents\fossee\esim\library\subcircuitlibrary\dm74185a\dm74185a.cir
+.include 3_and.sub
+.include 4_and.sub
+.include 4_OR.sub
+* u2  /b net-_u2-pad2_ d_inverter
+* u3  /c net-_u3-pad2_ d_inverter
+* u4  /d net-_u4-pad2_ d_inverter
+* u5  /e net-_u5-pad2_ d_inverter
+* u6  /a /a /y1 d_or
+x1 net-_u5-pad2_ net-_u4-pad2_ net-_u3-pad2_ /b net-_x1-pad5_ 4_and
+x2 net-_u5-pad2_ net-_u4-pad2_ /c /b net-_x2-pad5_ 4_and
+x4 net-_u5-pad2_ /d /c net-_u2-pad2_ net-_x3-pad3_ 4_and
+x5 /e net-_u4-pad2_ net-_u3-pad2_ net-_u2-pad2_ net-_x3-pad4_ 4_and
+x7 /e net-_u4-pad2_ /c /b net-_x6-pad3_ 4_and
+x8 /e /d net-_u3-pad2_ /b net-_x6-pad4_ 4_and
+x3 net-_x1-pad5_ net-_x2-pad5_ net-_x3-pad3_ net-_x3-pad4_ net-_x3-pad5_ 4_OR
+x6 net-_x3-pad5_ net-_x3-pad5_ net-_x6-pad3_ net-_x6-pad4_ /y2 4_OR
+x11 net-_u5-pad2_ /d /c /b net-_x11-pad5_ 4_and
+x17 /e net-_u4-pad2_ net-_u3-pad2_ net-_u2-pad2_ net-_x12-pad4_ 4_and
+x9 net-_u5-pad2_ net-_u4-pad2_ /c net-_x12-pad1_ 3_and
+x15 /e /d net-_u3-pad2_ net-_x12-pad3_ 3_and
+x12 net-_x12-pad1_ net-_x11-pad5_ net-_x12-pad3_ net-_x12-pad4_ /y3 4_OR
+x18 net-_u5-pad2_ /d net-_u3-pad2_ net-_u2-pad2_ net-_x18-pad5_ 4_and
+x19 /e net-_u4-pad2_ net-_u3-pad2_ /b net-_x19-pad5_ 4_and
+x21 /e /d /c net-_u2-pad2_ net-_x20-pad4_ 4_and
+x20 net-_x18-pad5_ net-_x18-pad5_ net-_x19-pad5_ net-_x20-pad4_ /y4 4_OR
+x16 /b /c /d /e net-_x13-pad4_ 4_and
+x14 net-_u3-pad2_ net-_u4-pad2_ /e net-_x13-pad3_ 3_and
+* u9  /c /b net-_u9-pad3_ d_or
+x10 net-_u5-pad2_ /d net-_u9-pad3_ net-_x10-pad4_ 3_and
+x13 net-_x10-pad4_ net-_x10-pad4_ net-_x13-pad3_ net-_x13-pad4_ /y5 4_OR
+* u8  /d /c net-_u7-pad2_ d_or
+* u7  /e net-_u7-pad2_ /y6 d_and
+a1 /b net-_u2-pad2_ u2
+a2 /c net-_u3-pad2_ u3
+a3 /d net-_u4-pad2_ u4
+a4 /e net-_u5-pad2_ u5
+a5 [/a /a ] /y1 u6
+a6 [/c /b ] net-_u9-pad3_ u9
+a7 [/d /c ] net-_u7-pad2_ u8
+a8 [/e net-_u7-pad2_ ] /y6 u7
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_inverter, NgSpice Name: d_inverter
+.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_or, NgSpice Name: d_or
+.model u6 d_or(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_or, NgSpice Name: d_or
+.model u9 d_or(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_or, NgSpice Name: d_or
+.model u8 d_or(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Schematic Name:                             d_and, NgSpice Name: d_and
+.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
+* Control Statements
+
+.ends DM74185A
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/DM74185A_Previous_Values.xml b/library/SubcircuitLibrary/DM74185A/DM74185A_Previous_Values.xml
new file mode 100644
index 00000000..39063644
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/DM74185A_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_inverter<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_inverter<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_inverter<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u5><u6 name="type">d_or<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u6><u9 name="type">d_or<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u9><u8 name="type">d_or<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u8><u7 name="type">d_and<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u7></model><devicemodel /><subcircuit><x1><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x1><x2><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x2><x4><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x4><x5><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x5><x7><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x7><x8><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x8><x3><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_OR</field></x3><x6><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_OR</field></x6><x11><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x11><x17><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x17><x9><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\3_and</field></x9><x15><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\3_and</field></x15><x12><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_OR</field></x12><x18><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x18><x19><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x19><x21><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x21><x20><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_OR</field></x20><x16><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_and</field></x16><x14><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\3_and</field></x14><x10><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\3_and</field></x10><x13><field>C:\Users\HP\OneDrive\Documents\FOSSEE\eSim\library\SubcircuitLibrary\4_OR</field></x13></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/DM74185A/analysis b/library/SubcircuitLibrary/DM74185A/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/DM74185A/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file