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authorunknown2025-06-06 22:07:46 +0530
committerunknown2025-06-06 22:07:46 +0530
commit11de4d1fdc1a7069fa99b46e9cfad27d4ba62c28 (patch)
tree97e15d362ed9d353c3d897eb7704732c10631f0f
parentf15d612508423c373faed8e4b509babbba8844e7 (diff)
downloadeSim-11de4d1fdc1a7069fa99b46e9cfad27d4ba62c28.tar.gz
eSim-11de4d1fdc1a7069fa99b46e9cfad27d4ba62c28.tar.bz2
eSim-11de4d1fdc1a7069fa99b46e9cfad27d4ba62c28.zip
adding LT1460
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460-cache.lib126
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460.cir32
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460.cir.out36
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460.pro73
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460.sch454
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460.sub30
-rw-r--r--library/SubcircuitLibrary/LT1460/LT1460_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/LT1460/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/LT1460/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/LT1460/PowerDiode.lib20
-rw-r--r--library/SubcircuitLibrary/LT1460/analysis1
-rw-r--r--library/SubcircuitLibrary/LT1460/schottky.lib1
12 files changed, 782 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/LT1460/LT1460-cache.lib b/library/SubcircuitLibrary/LT1460/LT1460-cache.lib
new file mode 100644
index 00000000..fa8f67b2
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460-cache.lib
@@ -0,0 +1,126 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LT1460/LT1460.cir b/library/SubcircuitLibrary/LT1460/LT1460.cir
new file mode 100644
index 00000000..ab1056c5
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460.cir
@@ -0,0 +1,32 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\LT1460\LT1460.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/27/25 15:09:37
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+R1 VOUT Net-_Q2-Pad2_ 150k
+R2 Net-_Q2-Pad2_ GND 48k
+Q2 Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN
+Q4 Net-_Q3-Pad1_ Net-_Q2-Pad2_ Net-_Q4-Pad3_ eSim_NPN
+R5 Net-_Q4-Pad3_ Net-_Q2-Pad3_ 1k
+R6 Net-_Q2-Pad3_ GND 21k
+R3 VOUT Net-_Q1-Pad3_ 25k
+R4 VOUT Net-_Q3-Pad3_ 50k
+Q1 Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_PNP
+Q3 Net-_Q3-Pad1_ Net-_Q1-Pad2_ Net-_Q3-Pad3_ eSim_PNP
+Q5 GND Net-_Q3-Pad1_ Net-_Q1-Pad2_ eSim_PNP
+Q6 GND Net-_Q1-Pad1_ Net-_D1-Pad2_ eSim_PNP
+Q10 GND Net-_Q1-Pad1_ VOUT eSim_PNP
+D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode
+Q7 Net-_D1-Pad1_ Net-_Q7-Pad2_ VCC eSim_PNP
+Q8 Net-_Q7-Pad2_ Net-_Q7-Pad2_ VCC eSim_PNP
+Q9 Net-_Q7-Pad2_ Net-_D1-Pad1_ Net-_Q9-Pad3_ eSim_NPN
+R7 Net-_Q9-Pad3_ VOUT 100
+Q12 Net-_Q11-Pad1_ Net-_Q11-Pad1_ VCC eSim_PNP
+Q13 VOUT Net-_Q11-Pad1_ VCC eSim_PNP
+Q11 Net-_Q11-Pad1_ Net-_D1-Pad1_ VOUT eSim_NPN
+U1 VCC VOUT GND PORT
+
+.end
diff --git a/library/SubcircuitLibrary/LT1460/LT1460.cir.out b/library/SubcircuitLibrary/LT1460/LT1460.cir.out
new file mode 100644
index 00000000..7ec9b5d6
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460.cir.out
@@ -0,0 +1,36 @@
+* c:\fossee\esim\library\subcircuitlibrary\lt1460\lt1460.cir
+
+.include NPN.lib
+.include PowerDiode.lib
+.include PNP.lib
+r1 vout net-_q2-pad2_ 150k
+r2 net-_q2-pad2_ gnd 48k
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
+q4 net-_q3-pad1_ net-_q2-pad2_ net-_q4-pad3_ Q2N2222
+r5 net-_q4-pad3_ net-_q2-pad3_ 1k
+r6 net-_q2-pad3_ gnd 21k
+r3 vout net-_q1-pad3_ 25k
+r4 vout net-_q3-pad3_ 50k
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A
+q3 net-_q3-pad1_ net-_q1-pad2_ net-_q3-pad3_ Q2N2907A
+q5 gnd net-_q3-pad1_ net-_q1-pad2_ Q2N2907A
+q6 gnd net-_q1-pad1_ net-_d1-pad2_ Q2N2907A
+q10 gnd net-_q1-pad1_ vout Q2N2907A
+d1 net-_d1-pad1_ net-_d1-pad2_ PowerDiode
+q7 net-_d1-pad1_ net-_q7-pad2_ vcc Q2N2907A
+q8 net-_q7-pad2_ net-_q7-pad2_ vcc Q2N2907A
+q9 net-_q7-pad2_ net-_d1-pad1_ net-_q9-pad3_ Q2N2222
+r7 net-_q9-pad3_ vout 100
+q12 net-_q11-pad1_ net-_q11-pad1_ vcc Q2N2907A
+q13 vout net-_q11-pad1_ vcc Q2N2907A
+q11 net-_q11-pad1_ net-_d1-pad1_ vout Q2N2222
+* u1 vcc vout gnd port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/LT1460/LT1460.pro b/library/SubcircuitLibrary/LT1460/LT1460.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/LT1460/LT1460.sch b/library/SubcircuitLibrary/LT1460/LT1460.sch
new file mode 100644
index 00000000..e2ff12eb
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460.sch
@@ -0,0 +1,454 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
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+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
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+F 1 "eSim_PNP" H 5300 1400 50 0000 R CNN
+F 2 "" H 5550 1350 29 0000 C CNN
+F 3 "" H 5350 1250 60 0000 C CNN
+ 1 5350 1250
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q13
+U 1 1 6835871C
+P 5900 1250
+F 0 "Q13" H 5800 1300 50 0000 R CNN
+F 1 "eSim_PNP" H 5850 1400 50 0000 R CNN
+F 2 "" H 6100 1350 29 0000 C CNN
+F 3 "" H 5900 1250 60 0000 C CNN
+ 1 5900 1250
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q11
+U 1 1 68358722
+P 5150 1850
+F 0 "Q11" H 5050 1900 50 0000 R CNN
+F 1 "eSim_NPN" H 5100 2000 50 0000 R CNN
+F 2 "" H 5350 1950 29 0000 C CNN
+F 3 "" H 5150 1850 60 0000 C CNN
+ 1 5150 1850
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 5550 1250 5700 1250
+Wire Wire Line
+ 5600 1250 5600 1550
+Connection ~ 5600 1250
+Wire Wire Line
+ 5250 2050 5250 2750
+Wire Wire Line
+ 5250 900 5250 1050
+Wire Wire Line
+ 6000 900 6000 1050
+Wire Wire Line
+ 5250 1450 5250 1650
+Wire Wire Line
+ 4000 1850 4950 1850
+Connection ~ 4000 1850
+Connection ~ 4450 1850
+Wire Wire Line
+ 5600 1550 5250 1550
+Connection ~ 5250 1550
+Wire Wire Line
+ 6000 2750 6000 1450
+Connection ~ 5250 2750
+Connection ~ 6000 900
+Connection ~ 6000 2750
+$Comp
+L PORT U1
+U 1 1 68358FA0
+P 6650 900
+F 0 "U1" H 6700 1000 30 0000 C CNN
+F 1 "PORT" H 6650 900 30 0000 C CNN
+F 2 "" H 6650 900 60 0000 C CNN
+F 3 "" H 6650 900 60 0000 C CNN
+ 1 6650 900
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 68358FE7
+P 6750 2750
+F 0 "U1" H 6800 2850 30 0000 C CNN
+F 1 "PORT" H 6750 2750 30 0000 C CNN
+F 2 "" H 6750 2750 60 0000 C CNN
+F 3 "" H 6750 2750 60 0000 C CNN
+ 2 6750 2750
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 68359573
+P 7200 6200
+F 0 "U1" H 7250 6300 30 0000 C CNN
+F 1 "PORT" H 7200 6200 30 0000 C CNN
+F 2 "" H 7200 6200 60 0000 C CNN
+F 3 "" H 7200 6200 60 0000 C CNN
+ 3 7200 6200
+ -1 0 0 -1
+$EndComp
+Text GLabel 7000 5950 2 60 Input ~ 0
+GND
+Wire Wire Line
+ 7000 5950 6600 5950
+Wire Wire Line
+ 6600 5950 6600 6200
+Connection ~ 6600 6200
+Text GLabel 6550 2500 2 60 Input ~ 0
+VOUT
+Wire Wire Line
+ 6550 2500 6400 2500
+Wire Wire Line
+ 6400 2500 6400 2750
+Connection ~ 6400 2750
+Text GLabel 6500 650 2 60 Input ~ 0
+VCC
+Wire Wire Line
+ 6500 650 6300 650
+Wire Wire Line
+ 6300 650 6300 900
+Connection ~ 6300 900
+Connection ~ 4750 900
+Connection ~ 5250 900
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/LT1460/LT1460.sub b/library/SubcircuitLibrary/LT1460/LT1460.sub
new file mode 100644
index 00000000..8824fcc8
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460.sub
@@ -0,0 +1,30 @@
+* Subcircuit LT1460
+.subckt LT1460 vcc vout gnd
+* c:\fossee\esim\library\subcircuitlibrary\lt1460\lt1460.cir
+.include NPN.lib
+.include PowerDiode.lib
+.include PNP.lib
+r1 vout net-_q2-pad2_ 150k
+r2 net-_q2-pad2_ gnd 48k
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ Q2N2222
+q4 net-_q3-pad1_ net-_q2-pad2_ net-_q4-pad3_ Q2N2222
+r5 net-_q4-pad3_ net-_q2-pad3_ 1k
+r6 net-_q2-pad3_ gnd 21k
+r3 vout net-_q1-pad3_ 25k
+r4 vout net-_q3-pad3_ 50k
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2907A
+q3 net-_q3-pad1_ net-_q1-pad2_ net-_q3-pad3_ Q2N2907A
+q5 gnd net-_q3-pad1_ net-_q1-pad2_ Q2N2907A
+q6 gnd net-_q1-pad1_ net-_d1-pad2_ Q2N2907A
+q10 gnd net-_q1-pad1_ vout Q2N2907A
+d1 net-_d1-pad1_ net-_d1-pad2_ PowerDiode
+q7 net-_d1-pad1_ net-_q7-pad2_ vcc Q2N2907A
+q8 net-_q7-pad2_ net-_q7-pad2_ vcc Q2N2907A
+q9 net-_q7-pad2_ net-_d1-pad1_ net-_q9-pad3_ Q2N2222
+r7 net-_q9-pad3_ vout 100
+q12 net-_q11-pad1_ net-_q11-pad1_ vcc Q2N2907A
+q13 vout net-_q11-pad1_ vcc Q2N2907A
+q11 net-_q11-pad1_ net-_d1-pad1_ vout Q2N2222
+* Control Statements
+
+.ends LT1460 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LT1460/LT1460_Previous_Values.xml b/library/SubcircuitLibrary/LT1460/LT1460_Previous_Values.xml
new file mode 100644
index 00000000..77f4797a
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/LT1460_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q6><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q10><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\PowerDiode.lib</field></d1><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q7><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q8><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q13><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LT1460/NPN.lib b/library/SubcircuitLibrary/LT1460/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/LT1460/PNP.lib b/library/SubcircuitLibrary/LT1460/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/LT1460/PowerDiode.lib b/library/SubcircuitLibrary/LT1460/PowerDiode.lib
new file mode 100644
index 00000000..a2f61dce
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/PowerDiode.lib
@@ -0,0 +1,20 @@
+.MODEL PowerDiode D(
++ Vj=.75
++ Nbvl=14.976
++ Cjo=175p
++ Rs=.25
++ Isr=1.859n
++ Eg=1.11
++ M=.5516
++ Nbv=1.6989
++ N=1
++ Tbv1=-21.277u
++ bv=1800
++ Fc=.5
++ Ikf=0
++ Nr=2
++ Ibv=20.245m
++ Is=2.2E-15
++ Xti=3
++ Ibvl=1.9556m
+) \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LT1460/analysis b/library/SubcircuitLibrary/LT1460/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LT1460/schottky.lib b/library/SubcircuitLibrary/LT1460/schottky.lib
new file mode 100644
index 00000000..9579f735
--- /dev/null
+++ b/library/SubcircuitLibrary/LT1460/schottky.lib
@@ -0,0 +1 @@
+.model 1N5819 D(IS=390n RS=0.115 BV=40.0 IBV=1.00m CJO=203p M=0.333 N=1.70 TT=4.32u)