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authorSiddhant Ranade2015-09-30 12:53:53 +0530
committerSiddhant Ranade2015-09-30 13:03:22 +0530
commit870400289effc021c83632d3df8b0a367ad1583a (patch)
treec198c32a770c335801bd95f4d8affe43c9285a46
parent3285bfc8fbbd857866e1fd424508e60ce26b5b03 (diff)
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parser and libParser are now independent.
parser now no longer needs the PSpice .lib files to be present. Side-effect: -cache.lib is no longer generated.
-rw-r--r--parser.cpp54
1 files changed, 8 insertions, 46 deletions
diff --git a/parser.cpp b/parser.cpp
index ea0872a..f849822 100644
--- a/parser.cpp
+++ b/parser.cpp
@@ -9,10 +9,8 @@ See LICENSE.txt
#include "lib/header.h"
string descr="EESchema Schematic File Version 2 date %s\nLIBS:power\nLIBS:device\nLIBS:transistors\nLIBS:conn\nLIBS:linear\nLIBS:regul\nLIBS:74xx\nLIBS:cmos4000\nLIBS:adc-dac\nLIBS:memory\nLIBS:xilinx\nLIBS:special\nLIBS:microcontrollers\nLIBS:dsp\nLIBS:microchip\nLIBS:analog_switches\nLIBS:motorola\nLIBS:texas\nLIBS:intel\nLIBS:audio\nLIBS:interface\nLIBS:digital-audio\nLIBS:philips\nLIBS:display\nLIBS:cypress\nLIBS:siliconi\nLIBS:opto\nLIBS:atmel\nLIBS:contrib\nLIBS:valves\nLIBS:%name\nEELAYER 25 0\nEELAYER END\n$Descr A4 11700 8267\nencoding utf-8\nSheet 1 1\nTitle \"\"\nDate \"%s\"\nRev \"\"\nComp \"\"\nComment1 \"\"\nComment2 \"\"\nComment3 \"\"\nComment4 \"\"\n$EndDescr\n";
-string libDescr="EESchema-LIBRARY Version 2.3 Date: %s\n#encoding utf-8\n";
string proDescr="update=%s\nlast_client=eeschema\n[eeschema]\nversion=1\nLibDir=\nNetFmt=1\nHPGLSpd=20\nHPGLDm=15\nHPGLNum=1\noffX_A4=0\noffY_A4=0\noffX_A3=0\noffY_A3=0\noffX_A2=0\noffY_A2=0\noffX_A1=0\noffY_A1=0\noffX_A0=0\noffY_A0=0\noffX_A=0\noffY_A=0\noffX_B=0\noffY_B=0\noffX_C=0\noffY_C=0\noffX_D=0\noffY_D=0\noffX_E=0\noffY_E=0\nRptD_X=0\nRptD_Y=100\nRptLab=1\nLabSize=60\n[eeschema/libraries]\nLibName1=power\nLibName2=device\nLibName3=transistors\nLibName4=conn\nLibName5=linear\nLibName6=regul\nLibName7=74xx\nLibName8=cmos4000\nLibName9=adc-dac\nLibName10=memory\nLibName11=xilinx\nLibName12=special\nLibName13=microcontrollers\nLibName14=dsp\nLibName15=microchip\nLibName16=analog_switches\nLibName17=motorola\nLibName18=texas\nLibName19=intel\nLibName20=audio\nLibName21=interface\nLibName22=digital-audio\nLibName23=philips\nLibName24=display\nLibName25=cypress\nLibName26=siliconi\nLibName27=opto\nLibName28=atmel\nLibName29=contrib\nLibName30=valves";
ofstream fsch;
-ofstream flib;
const int MULT=10; //Pspice coordinates are too small. They need to be scaled up 10 times to be usable in kicad.
const string nameAppend="_PSPICE";
@@ -34,14 +32,12 @@ int main(int argc, char* argv[]){
//Generate the output files
string fname=string(argv[2])+"/"+fbasename+string(".sch");
- string flname=string(argv[2])+"/"+fbasename+string("-cache.lib");
string fprojname=string(argv[2])+"/"+fbasename+string(".proj");
string fproname=string(argv[2])+"/"+fbasename+string(".pro");
fsch.open(fname.c_str());
- flib.open(flname.c_str());
- cerr<<"Schematic file name: "<<fname<<endl;///<<"Library file name: "<<flname<<endl;
+ cerr<<"Schematic file name: "<<fname<<endl;
string textline;
skipTo(file, "@status");
@@ -73,18 +69,11 @@ int main(int argc, char* argv[]){
description=descr.replace(d, 5, string(argv[2])+string("-cache"));
fsch<<description;
-
- //Write -cache.lib header:
- d=libDescr.find("%s");
- string libDescription=libDescr.replace(d, 2, date);
-
- flib<<libDescription;
-
+
//Ports
skipTo(file, "@ports");
vector<ComponentInstance> componentInstances;
- map<string, Component> components;
- //Create components and instances (ports)
+ //Create component instances (and ports)
//"Safely" read a line using getline, so that we can go back to it later:
int g=file.tellg();
@@ -119,28 +108,10 @@ int main(int argc, char* argv[]){
while(textline.substr(0, 4)=="part"){
file.seekg(g);
ComponentInstance ci(file);
- if(components.find(ci.type)==components.end()){
- string libName=findLibrary(ci.type);
- if(libName!=""){
- ///cerr<<libName<<endl; ///DEBUG
- ifstream PLib(libName.c_str());
- ///cerr<<"Lib opened "<<libName<<" to create "<<ci.type<<endl; ///DEBUG
- Component c(PLib, ci.type);
- ///cerr<<"Comp created "<<ci.type<<endl; ///DEBUG
- fixComp(c);
- fixInst(ci);
- c.type=c.type+nameAppend;
- components[ci.type]=c;
- ci.type=ci.type+nameAppend;
- componentInstances.push_back(ci);
- }
- ///else cerr<<"Library not found for: "<<ci.type<<endl;
- }
- else{
- fixInst(ci);
- ci.type=ci.type+nameAppend;
- componentInstances.push_back(ci);
- }
+ fixInst(ci);
+ ci.type=ci.type+nameAppend;
+ componentInstances.push_back(ci);
+
///cerr<<ci.type<<endl; ///DEBUG
g=file.tellg();
getline(file, textline);
@@ -155,11 +126,6 @@ int main(int argc, char* argv[]){
componentInstances[i].print(fsch);
}
///cerr<<"Components instances written"<<endl; ///DEBUG
- //Print components to -cache.lib file
- for(map<string, Component>::iterator i=components.begin(); i!=components.end(); i++){
- (i->second).print(flib);
- }
- ///cerr<<"Components written"<<endl; ///DEBUG
//Connections (Wires)
skipTo(file, "@conn");
@@ -177,9 +143,5 @@ int main(int argc, char* argv[]){
}
//Write schematic file footer:
fsch<<"$EndSCHEMATC"<<endl;
- fsch.close();
-
- //Write -cache.lib file footer:
- flib<<"#\n#End Library"<<endl;
- flib.close();
+ fsch.close();
}